vc4_qir.h revision 4ae137534a8718db4611782dbfec773504b6e3be
1/* 2 * Copyright © 2014 Broadcom 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24#ifndef VC4_QIR_H 25#define VC4_QIR_H 26 27#include <assert.h> 28#include <stdio.h> 29#include <stdlib.h> 30#include <stdbool.h> 31#include <stdint.h> 32#include <string.h> 33 34#include "util/macros.h" 35#include "glsl/nir/nir.h" 36#include "util/list.h" 37#include "util/u_math.h" 38 39#include "vc4_screen.h" 40#include "pipe/p_state.h" 41 42struct nir_builder; 43 44enum qfile { 45 QFILE_NULL, 46 QFILE_TEMP, 47 QFILE_VARY, 48 QFILE_UNIF, 49 QFILE_VPM, 50 51 /** 52 * Stores an immediate value in the index field that can be turned 53 * into a small immediate field by qpu_encode_small_immediate(). 54 */ 55 QFILE_SMALL_IMM, 56}; 57 58struct qreg { 59 enum qfile file; 60 uint32_t index; 61 int pack; 62}; 63 64enum qop { 65 QOP_UNDEF, 66 QOP_MOV, 67 QOP_FADD, 68 QOP_FSUB, 69 QOP_FMUL, 70 QOP_MUL24, 71 QOP_FMIN, 72 QOP_FMAX, 73 QOP_FMINABS, 74 QOP_FMAXABS, 75 QOP_ADD, 76 QOP_SUB, 77 QOP_SHL, 78 QOP_SHR, 79 QOP_ASR, 80 QOP_MIN, 81 QOP_MAX, 82 QOP_AND, 83 QOP_OR, 84 QOP_XOR, 85 QOP_NOT, 86 87 /* Note: Orderings of these compares must be the same as in 88 * qpu_defines.h. Selects the src[0] if the ns flag bit is set, 89 * otherwise 0. */ 90 QOP_SEL_X_0_ZS, 91 QOP_SEL_X_0_ZC, 92 QOP_SEL_X_0_NS, 93 QOP_SEL_X_0_NC, 94 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */ 95 QOP_SEL_X_Y_ZS, 96 QOP_SEL_X_Y_ZC, 97 QOP_SEL_X_Y_NS, 98 QOP_SEL_X_Y_NC, 99 100 QOP_FTOI, 101 QOP_ITOF, 102 QOP_RCP, 103 QOP_RSQ, 104 QOP_EXP2, 105 QOP_LOG2, 106 QOP_VW_SETUP, 107 QOP_VR_SETUP, 108 QOP_PACK_8888_F, 109 QOP_PACK_8A_F, 110 QOP_PACK_8B_F, 111 QOP_PACK_8C_F, 112 QOP_PACK_8D_F, 113 QOP_PACK_16A_I, 114 QOP_PACK_16B_I, 115 QOP_TLB_DISCARD_SETUP, 116 QOP_TLB_STENCIL_SETUP, 117 QOP_TLB_Z_WRITE, 118 QOP_TLB_COLOR_WRITE, 119 QOP_TLB_COLOR_READ, 120 QOP_VARY_ADD_C, 121 122 QOP_FRAG_X, 123 QOP_FRAG_Y, 124 QOP_FRAG_Z, 125 QOP_FRAG_W, 126 QOP_FRAG_REV_FLAG, 127 128 QOP_UNPACK_8A_F, 129 QOP_UNPACK_8B_F, 130 QOP_UNPACK_8C_F, 131 QOP_UNPACK_8D_F, 132 QOP_UNPACK_16A_F, 133 QOP_UNPACK_16B_F, 134 135 QOP_UNPACK_8A_I, 136 QOP_UNPACK_8B_I, 137 QOP_UNPACK_8C_I, 138 QOP_UNPACK_8D_I, 139 QOP_UNPACK_16A_I, 140 QOP_UNPACK_16B_I, 141 142 /** Texture x coordinate parameter write */ 143 QOP_TEX_S, 144 /** Texture y coordinate parameter write */ 145 QOP_TEX_T, 146 /** Texture border color parameter or cube map z coordinate write */ 147 QOP_TEX_R, 148 /** Texture LOD bias parameter write */ 149 QOP_TEX_B, 150 151 /** 152 * Texture-unit 4-byte read with address provided direct in S 153 * cooordinate. 154 * 155 * The first operand is the offset from the start of the UBO, and the 156 * second is the uniform that has the UBO's base pointer. 157 */ 158 QOP_TEX_DIRECT, 159 160 /** 161 * Signal of texture read being necessary and then reading r4 into 162 * the destination 163 */ 164 QOP_TEX_RESULT, 165}; 166 167struct queued_qpu_inst { 168 struct list_head link; 169 uint64_t inst; 170}; 171 172struct qinst { 173 struct list_head link; 174 175 enum qop op; 176 struct qreg dst; 177 struct qreg *src; 178 bool sf; 179}; 180 181enum qstage { 182 /** 183 * Coordinate shader, runs during binning, before the VS, and just 184 * outputs position. 185 */ 186 QSTAGE_COORD, 187 QSTAGE_VERT, 188 QSTAGE_FRAG, 189}; 190 191enum quniform_contents { 192 /** 193 * Indicates that a constant 32-bit value is copied from the program's 194 * uniform contents. 195 */ 196 QUNIFORM_CONSTANT, 197 /** 198 * Indicates that the program's uniform contents are used as an index 199 * into the GL uniform storage. 200 */ 201 QUNIFORM_UNIFORM, 202 203 /** @{ 204 * Scaling factors from clip coordinates to relative to the viewport 205 * center. 206 * 207 * This is used by the coordinate and vertex shaders to produce the 208 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed 209 * point offsets from the viewport ccenter. 210 */ 211 QUNIFORM_VIEWPORT_X_SCALE, 212 QUNIFORM_VIEWPORT_Y_SCALE, 213 /** @} */ 214 215 QUNIFORM_VIEWPORT_Z_OFFSET, 216 QUNIFORM_VIEWPORT_Z_SCALE, 217 218 QUNIFORM_USER_CLIP_PLANE, 219 220 /** 221 * A reference to a texture config parameter 0 uniform. 222 * 223 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which 224 * defines texture type, miplevels, and such. It will be found as a 225 * parameter to the first QOP_TEX_[STRB] instruction in a sequence. 226 */ 227 QUNIFORM_TEXTURE_CONFIG_P0, 228 229 /** 230 * A reference to a texture config parameter 1 uniform. 231 * 232 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which 233 * defines texture width, height, filters, and wrap modes. It will be 234 * found as a parameter to the second QOP_TEX_[STRB] instruction in a 235 * sequence. 236 */ 237 QUNIFORM_TEXTURE_CONFIG_P1, 238 239 /** A reference to a texture config parameter 2 cubemap stride uniform */ 240 QUNIFORM_TEXTURE_CONFIG_P2, 241 242 QUNIFORM_UBO_ADDR, 243 244 QUNIFORM_TEXRECT_SCALE_X, 245 QUNIFORM_TEXRECT_SCALE_Y, 246 247 QUNIFORM_TEXTURE_BORDER_COLOR, 248 249 QUNIFORM_BLEND_CONST_COLOR_X, 250 QUNIFORM_BLEND_CONST_COLOR_Y, 251 QUNIFORM_BLEND_CONST_COLOR_Z, 252 QUNIFORM_BLEND_CONST_COLOR_W, 253 254 QUNIFORM_STENCIL, 255 256 QUNIFORM_ALPHA_REF, 257}; 258 259struct vc4_varying_semantic { 260 uint8_t semantic; 261 uint8_t index; 262 uint8_t swizzle; 263}; 264 265struct vc4_compiler_ubo_range { 266 /** 267 * offset in bytes from the start of the ubo where this range is 268 * uploaded. 269 * 270 * Only set once used is set. 271 */ 272 uint32_t dst_offset; 273 274 /** 275 * offset in bytes from the start of the gallium uniforms where the 276 * data comes from. 277 */ 278 uint32_t src_offset; 279 280 /** size in bytes of this ubo range */ 281 uint32_t size; 282 283 /** 284 * Set if this range is used by the shader for indirect uniforms 285 * access. 286 */ 287 bool used; 288}; 289 290struct vc4_key { 291 struct vc4_uncompiled_shader *shader_state; 292 struct { 293 enum pipe_format format; 294 unsigned compare_mode:1; 295 unsigned compare_func:3; 296 unsigned wrap_s:3; 297 unsigned wrap_t:3; 298 uint8_t swizzle[4]; 299 } tex[VC4_MAX_TEXTURE_SAMPLERS]; 300 uint8_t ucp_enables; 301}; 302 303struct vc4_fs_key { 304 struct vc4_key base; 305 enum pipe_format color_format; 306 bool depth_enabled; 307 bool stencil_enabled; 308 bool stencil_twoside; 309 bool stencil_full_writemasks; 310 bool is_points; 311 bool is_lines; 312 bool alpha_test; 313 bool point_coord_upper_left; 314 bool light_twoside; 315 uint8_t alpha_test_func; 316 uint8_t logicop_func; 317 uint32_t point_sprite_mask; 318 319 struct pipe_rt_blend_state blend; 320}; 321 322struct vc4_vs_key { 323 struct vc4_key base; 324 325 /** 326 * This is a proxy for the array of FS input semantics, which is 327 * larger than we would want to put in the key. 328 */ 329 uint64_t compiled_fs_id; 330 331 enum pipe_format attr_formats[8]; 332 bool is_coord; 333 bool per_vertex_point_size; 334}; 335 336struct vc4_compile { 337 struct vc4_context *vc4; 338 nir_shader *s; 339 nir_function_impl *impl; 340 struct exec_list *cf_node_list; 341 342 /** 343 * Mapping from nir_register * or nir_ssa_def * to array of struct 344 * qreg for the values. 345 */ 346 struct hash_table *def_ht; 347 348 /* For each temp, the instruction generating its value. */ 349 struct qinst **defs; 350 uint32_t defs_array_size; 351 352 /** 353 * Inputs to the shader, arranged by TGSI declaration order. 354 * 355 * Not all fragment shader QFILE_VARY reads are present in this array. 356 */ 357 struct qreg *inputs; 358 struct qreg *outputs; 359 uint32_t inputs_array_size; 360 uint32_t outputs_array_size; 361 uint32_t uniforms_array_size; 362 363 struct vc4_compiler_ubo_range *ubo_ranges; 364 uint32_t ubo_ranges_array_size; 365 /** Number of uniform areas declared in ubo_ranges. */ 366 uint32_t num_uniform_ranges; 367 /** Number of uniform areas used for indirect addressed loads. */ 368 uint32_t num_ubo_ranges; 369 uint32_t next_ubo_dst_offset; 370 371 struct qreg line_x, point_x, point_y; 372 struct qreg discard; 373 374 uint8_t vattr_sizes[8]; 375 376 /** 377 * Array of the TGSI semantics of all FS QFILE_VARY reads. 378 * 379 * This includes those that aren't part of the VPM varyings, like 380 * point/line coordinates. 381 */ 382 struct vc4_varying_semantic *input_semantics; 383 uint32_t num_input_semantics; 384 uint32_t input_semantics_array_size; 385 386 /** 387 * An entry per outputs[] in the VS indicating what the semantic of 388 * the output is. Used to emit from the VS in the order that the FS 389 * needs. 390 */ 391 struct vc4_varying_semantic *output_semantics; 392 393 struct pipe_shader_state *shader_state; 394 struct vc4_key *key; 395 struct vc4_fs_key *fs_key; 396 struct vc4_vs_key *vs_key; 397 398 uint32_t *uniform_data; 399 enum quniform_contents *uniform_contents; 400 uint32_t uniform_array_size; 401 uint32_t num_uniforms; 402 uint32_t num_outputs; 403 uint32_t num_texture_samples; 404 uint32_t output_position_index; 405 uint32_t output_clipvertex_index; 406 uint32_t output_color_index; 407 uint32_t output_point_size_index; 408 409 struct qreg undef; 410 enum qstage stage; 411 uint32_t num_temps; 412 struct list_head instructions; 413 uint32_t immediates[1024]; 414 415 struct list_head qpu_inst_list; 416 uint64_t *qpu_insts; 417 uint32_t qpu_inst_count; 418 uint32_t qpu_inst_size; 419 uint32_t num_inputs; 420 421 uint32_t program_id; 422 uint32_t variant_id; 423}; 424 425/* Special nir_load_input intrinsic index for loading the current TLB 426 * destination color. 427 */ 428#define VC4_NIR_TLB_COLOR_READ_INPUT 2000000000 429 430/* Special offset for nir_load_uniform values to get a QUNIFORM_* 431 * state-dependent value. 432 */ 433#define VC4_NIR_STATE_UNIFORM_OFFSET 2000000000 434 435struct vc4_compile *qir_compile_init(void); 436void qir_compile_destroy(struct vc4_compile *c); 437struct qinst *qir_inst(enum qop op, struct qreg dst, 438 struct qreg src0, struct qreg src1); 439struct qinst *qir_inst4(enum qop op, struct qreg dst, 440 struct qreg a, 441 struct qreg b, 442 struct qreg c, 443 struct qreg d); 444void qir_remove_instruction(struct vc4_compile *c, struct qinst *qinst); 445struct qreg qir_uniform(struct vc4_compile *c, 446 enum quniform_contents contents, 447 uint32_t data); 448void qir_reorder_uniforms(struct vc4_compile *c); 449 450void qir_emit(struct vc4_compile *c, struct qinst *inst); 451static inline void qir_emit_nodef(struct vc4_compile *c, struct qinst *inst) 452{ 453 list_addtail(&inst->link, &c->instructions); 454} 455 456struct qreg qir_get_temp(struct vc4_compile *c); 457int qir_get_op_nsrc(enum qop qop); 458bool qir_reg_equals(struct qreg a, struct qreg b); 459bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst); 460bool qir_has_side_effect_reads(struct vc4_compile *c, struct qinst *inst); 461bool qir_is_multi_instruction(struct qinst *inst); 462bool qir_is_mul(struct qinst *inst); 463bool qir_is_tex(struct qinst *inst); 464bool qir_depends_on_flags(struct qinst *inst); 465bool qir_writes_r4(struct qinst *inst); 466bool qir_src_needs_a_file(struct qinst *inst); 467struct qreg qir_follow_movs(struct vc4_compile *c, struct qreg reg); 468 469void qir_dump(struct vc4_compile *c); 470void qir_dump_inst(struct vc4_compile *c, struct qinst *inst); 471const char *qir_get_stage_name(enum qstage stage); 472 473void qir_optimize(struct vc4_compile *c); 474bool qir_opt_algebraic(struct vc4_compile *c); 475bool qir_opt_constant_folding(struct vc4_compile *c); 476bool qir_opt_copy_propagation(struct vc4_compile *c); 477bool qir_opt_cse(struct vc4_compile *c); 478bool qir_opt_dead_code(struct vc4_compile *c); 479bool qir_opt_small_immediates(struct vc4_compile *c); 480bool qir_opt_vpm_writes(struct vc4_compile *c); 481void vc4_nir_lower_blend(struct vc4_compile *c); 482void vc4_nir_lower_io(struct vc4_compile *c); 483nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b, 484 enum quniform_contents contents); 485nir_ssa_def *vc4_nir_get_swizzled_channel(struct nir_builder *b, 486 nir_ssa_def **srcs, int swiz); 487void qir_lower_uniforms(struct vc4_compile *c); 488 489void qpu_schedule_instructions(struct vc4_compile *c); 490 491void qir_SF(struct vc4_compile *c, struct qreg src); 492 493static inline struct qreg 494qir_uniform_ui(struct vc4_compile *c, uint32_t ui) 495{ 496 return qir_uniform(c, QUNIFORM_CONSTANT, ui); 497} 498 499static inline struct qreg 500qir_uniform_f(struct vc4_compile *c, float f) 501{ 502 return qir_uniform(c, QUNIFORM_CONSTANT, fui(f)); 503} 504 505#define QIR_ALU0(name) \ 506static inline struct qreg \ 507qir_##name(struct vc4_compile *c) \ 508{ \ 509 struct qreg t = qir_get_temp(c); \ 510 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \ 511 return t; \ 512} 513 514#define QIR_ALU1(name) \ 515static inline struct qreg \ 516qir_##name(struct vc4_compile *c, struct qreg a) \ 517{ \ 518 struct qreg t = qir_get_temp(c); \ 519 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \ 520 return t; \ 521} \ 522static inline void \ 523qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \ 524 struct qreg a) \ 525{ \ 526 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \ 527} 528 529#define QIR_ALU2(name) \ 530static inline struct qreg \ 531qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \ 532{ \ 533 struct qreg t = qir_get_temp(c); \ 534 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \ 535 return t; \ 536} \ 537static inline void \ 538qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \ 539 struct qreg a, struct qreg b) \ 540{ \ 541 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, b)); \ 542} 543 544#define QIR_NODST_1(name) \ 545static inline void \ 546qir_##name(struct vc4_compile *c, struct qreg a) \ 547{ \ 548 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \ 549} 550 551#define QIR_NODST_2(name) \ 552static inline void \ 553qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \ 554{ \ 555 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \ 556} 557 558#define QIR_PACK(name) \ 559static inline struct qreg \ 560qir_##name(struct vc4_compile *c, struct qreg dest, struct qreg a) \ 561{ \ 562 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \ 563 return dest; \ 564} 565 566QIR_ALU1(MOV) 567QIR_ALU2(FADD) 568QIR_ALU2(FSUB) 569QIR_ALU2(FMUL) 570QIR_ALU2(MUL24) 571QIR_ALU1(SEL_X_0_ZS) 572QIR_ALU1(SEL_X_0_ZC) 573QIR_ALU1(SEL_X_0_NS) 574QIR_ALU1(SEL_X_0_NC) 575QIR_ALU2(SEL_X_Y_ZS) 576QIR_ALU2(SEL_X_Y_ZC) 577QIR_ALU2(SEL_X_Y_NS) 578QIR_ALU2(SEL_X_Y_NC) 579QIR_ALU2(FMIN) 580QIR_ALU2(FMAX) 581QIR_ALU2(FMINABS) 582QIR_ALU2(FMAXABS) 583QIR_ALU1(FTOI) 584QIR_ALU1(ITOF) 585 586QIR_ALU2(ADD) 587QIR_ALU2(SUB) 588QIR_ALU2(SHL) 589QIR_ALU2(SHR) 590QIR_ALU2(ASR) 591QIR_ALU2(MIN) 592QIR_ALU2(MAX) 593QIR_ALU2(AND) 594QIR_ALU2(OR) 595QIR_ALU2(XOR) 596QIR_ALU1(NOT) 597 598QIR_ALU1(RCP) 599QIR_ALU1(RSQ) 600QIR_ALU1(EXP2) 601QIR_ALU1(LOG2) 602QIR_ALU1(PACK_8888_F) 603QIR_PACK(PACK_8A_F) 604QIR_PACK(PACK_8B_F) 605QIR_PACK(PACK_8C_F) 606QIR_PACK(PACK_8D_F) 607QIR_PACK(PACK_16A_I) 608QIR_PACK(PACK_16B_I) 609QIR_ALU1(VARY_ADD_C) 610QIR_NODST_2(TEX_S) 611QIR_NODST_2(TEX_T) 612QIR_NODST_2(TEX_R) 613QIR_NODST_2(TEX_B) 614QIR_NODST_2(TEX_DIRECT) 615QIR_ALU0(FRAG_X) 616QIR_ALU0(FRAG_Y) 617QIR_ALU0(FRAG_Z) 618QIR_ALU0(FRAG_W) 619QIR_ALU0(FRAG_REV_FLAG) 620QIR_ALU0(TEX_RESULT) 621QIR_ALU0(TLB_COLOR_READ) 622QIR_NODST_1(TLB_COLOR_WRITE) 623QIR_NODST_1(TLB_Z_WRITE) 624QIR_NODST_1(TLB_DISCARD_SETUP) 625QIR_NODST_1(TLB_STENCIL_SETUP) 626 627static inline struct qreg 628qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i) 629{ 630 struct qreg t = qir_get_temp(c); 631 qir_emit(c, qir_inst(QOP_UNPACK_8A_F + i, t, src, c->undef)); 632 return t; 633} 634 635static inline struct qreg 636qir_UNPACK_8_I(struct vc4_compile *c, struct qreg src, int i) 637{ 638 struct qreg t = qir_get_temp(c); 639 qir_emit(c, qir_inst(QOP_UNPACK_8A_I + i, t, src, c->undef)); 640 return t; 641} 642 643static inline struct qreg 644qir_UNPACK_16_F(struct vc4_compile *c, struct qreg src, int i) 645{ 646 struct qreg t = qir_get_temp(c); 647 qir_emit(c, qir_inst(QOP_UNPACK_16A_F + i, t, src, c->undef)); 648 return t; 649} 650 651static inline struct qreg 652qir_UNPACK_16_I(struct vc4_compile *c, struct qreg src, int i) 653{ 654 struct qreg t = qir_get_temp(c); 655 qir_emit(c, qir_inst(QOP_UNPACK_16A_I + i, t, src, c->undef)); 656 return t; 657} 658 659static inline struct qreg 660qir_PACK_8_F(struct vc4_compile *c, struct qreg dest, struct qreg val, int chan) 661{ 662 qir_emit(c, qir_inst(QOP_PACK_8A_F + chan, dest, val, c->undef)); 663 if (dest.file == QFILE_TEMP) 664 c->defs[dest.index] = NULL; 665 return dest; 666} 667 668static inline struct qreg 669qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y) 670{ 671 return qir_EXP2(c, qir_FMUL(c, 672 y, 673 qir_LOG2(c, x))); 674} 675 676static inline void 677qir_VPM_WRITE(struct vc4_compile *c, struct qreg val) 678{ 679 static const struct qreg vpm = { QFILE_VPM, 0 }; 680 qir_emit(c, qir_inst(QOP_MOV, vpm, val, c->undef)); 681} 682 683#endif /* VC4_QIR_H */ 684