vc4_qir.h revision 6b4dfd53ae9b4f86cda0377a4d67b79e9faf7cc8 
1/*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#ifndef VC4_QIR_H
25#define VC4_QIR_H
26
27#include <assert.h>
28#include <stdio.h>
29#include <stdlib.h>
30#include <stdbool.h>
31#include <stdint.h>
32#include <string.h>
33
34#include "util/macros.h"
35#include "glsl/nir/nir.h"
36#include "util/list.h"
37#include "util/u_math.h"
38
39#include "vc4_screen.h"
40#include "vc4_qpu_defines.h"
41#include "kernel/vc4_packet.h"
42#include "pipe/p_state.h"
43
44struct nir_builder;
45
46enum qfile {
47        QFILE_NULL,
48        QFILE_TEMP,
49        QFILE_VARY,
50        QFILE_UNIF,
51        QFILE_VPM,
52
53        /**
54         * Stores an immediate value in the index field that can be turned
55         * into a small immediate field by qpu_encode_small_immediate().
56         */
57        QFILE_SMALL_IMM,
58};
59
60struct qreg {
61        enum qfile file;
62        uint32_t index;
63        int pack;
64};
65
66enum qop {
67        QOP_UNDEF,
68        QOP_MOV,
69        QOP_FMOV,
70        QOP_MMOV,
71        QOP_FADD,
72        QOP_FSUB,
73        QOP_FMUL,
74        QOP_V8MULD,
75        QOP_V8MIN,
76        QOP_V8MAX,
77        QOP_V8ADDS,
78        QOP_V8SUBS,
79        QOP_MUL24,
80        QOP_FMIN,
81        QOP_FMAX,
82        QOP_FMINABS,
83        QOP_FMAXABS,
84        QOP_ADD,
85        QOP_SUB,
86        QOP_SHL,
87        QOP_SHR,
88        QOP_ASR,
89        QOP_MIN,
90        QOP_MAX,
91        QOP_AND,
92        QOP_OR,
93        QOP_XOR,
94        QOP_NOT,
95
96        /* Note: Orderings of these compares must be the same as in
97         * qpu_defines.h.  Selects the src[0] if the ns flag bit is set,
98         * otherwise 0. */
99        QOP_SEL_X_0_ZS,
100        QOP_SEL_X_0_ZC,
101        QOP_SEL_X_0_NS,
102        QOP_SEL_X_0_NC,
103        QOP_SEL_X_0_CS,
104        QOP_SEL_X_0_CC,
105        /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
106        QOP_SEL_X_Y_ZS,
107        QOP_SEL_X_Y_ZC,
108        QOP_SEL_X_Y_NS,
109        QOP_SEL_X_Y_NC,
110        QOP_SEL_X_Y_CS,
111        QOP_SEL_X_Y_CC,
112
113        QOP_FTOI,
114        QOP_ITOF,
115        QOP_RCP,
116        QOP_RSQ,
117        QOP_EXP2,
118        QOP_LOG2,
119        QOP_VW_SETUP,
120        QOP_VR_SETUP,
121        QOP_TLB_DISCARD_SETUP,
122        QOP_TLB_STENCIL_SETUP,
123        QOP_TLB_Z_WRITE,
124        QOP_TLB_COLOR_WRITE,
125        QOP_TLB_COLOR_WRITE_MS,
126        QOP_TLB_COLOR_READ,
127        QOP_MS_MASK,
128        QOP_VARY_ADD_C,
129
130        QOP_FRAG_X,
131        QOP_FRAG_Y,
132        QOP_FRAG_Z,
133        QOP_FRAG_W,
134        QOP_FRAG_REV_FLAG,
135
136        /** Texture x coordinate parameter write */
137        QOP_TEX_S,
138        /** Texture y coordinate parameter write */
139        QOP_TEX_T,
140        /** Texture border color parameter or cube map z coordinate write */
141        QOP_TEX_R,
142        /** Texture LOD bias parameter write */
143        QOP_TEX_B,
144
145        /**
146         * Texture-unit 4-byte read with address provided direct in S
147         * cooordinate.
148         *
149         * The first operand is the offset from the start of the UBO, and the
150         * second is the uniform that has the UBO's base pointer.
151         */
152        QOP_TEX_DIRECT,
153
154        /**
155         * Signal of texture read being necessary and then reading r4 into
156         * the destination
157         */
158        QOP_TEX_RESULT,
159};
160
161struct queued_qpu_inst {
162        struct list_head link;
163        uint64_t inst;
164};
165
166struct qinst {
167        struct list_head link;
168
169        enum qop op;
170        struct qreg dst;
171        struct qreg *src;
172        bool sf;
173};
174
175enum qstage {
176        /**
177         * Coordinate shader, runs during binning, before the VS, and just
178         * outputs position.
179         */
180        QSTAGE_COORD,
181        QSTAGE_VERT,
182        QSTAGE_FRAG,
183};
184
185enum quniform_contents {
186        /**
187         * Indicates that a constant 32-bit value is copied from the program's
188         * uniform contents.
189         */
190        QUNIFORM_CONSTANT,
191        /**
192         * Indicates that the program's uniform contents are used as an index
193         * into the GL uniform storage.
194         */
195        QUNIFORM_UNIFORM,
196
197        /** @{
198         * Scaling factors from clip coordinates to relative to the viewport
199         * center.
200         *
201         * This is used by the coordinate and vertex shaders to produce the
202         * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed
203         * point offsets from the viewport ccenter.
204         */
205        QUNIFORM_VIEWPORT_X_SCALE,
206        QUNIFORM_VIEWPORT_Y_SCALE,
207        /** @} */
208
209        QUNIFORM_VIEWPORT_Z_OFFSET,
210        QUNIFORM_VIEWPORT_Z_SCALE,
211
212        QUNIFORM_USER_CLIP_PLANE,
213
214        /**
215         * A reference to a texture config parameter 0 uniform.
216         *
217         * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
218         * defines texture type, miplevels, and such.  It will be found as a
219         * parameter to the first QOP_TEX_[STRB] instruction in a sequence.
220         */
221        QUNIFORM_TEXTURE_CONFIG_P0,
222
223        /**
224         * A reference to a texture config parameter 1 uniform.
225         *
226         * This is a uniform implicitly loaded with a QPU_W_TMU* write, which
227         * defines texture width, height, filters, and wrap modes.  It will be
228         * found as a parameter to the second QOP_TEX_[STRB] instruction in a
229         * sequence.
230         */
231        QUNIFORM_TEXTURE_CONFIG_P1,
232
233        /** A reference to a texture config parameter 2 cubemap stride uniform */
234        QUNIFORM_TEXTURE_CONFIG_P2,
235
236        QUNIFORM_TEXTURE_MSAA_ADDR,
237
238        QUNIFORM_UBO_ADDR,
239
240        QUNIFORM_TEXRECT_SCALE_X,
241        QUNIFORM_TEXRECT_SCALE_Y,
242
243        QUNIFORM_TEXTURE_BORDER_COLOR,
244
245        QUNIFORM_BLEND_CONST_COLOR_X,
246        QUNIFORM_BLEND_CONST_COLOR_Y,
247        QUNIFORM_BLEND_CONST_COLOR_Z,
248        QUNIFORM_BLEND_CONST_COLOR_W,
249        QUNIFORM_BLEND_CONST_COLOR_RGBA,
250        QUNIFORM_BLEND_CONST_COLOR_AAAA,
251
252        QUNIFORM_STENCIL,
253
254        QUNIFORM_ALPHA_REF,
255        QUNIFORM_SAMPLE_MASK,
256};
257
258struct vc4_varying_slot {
259        uint8_t slot;
260        uint8_t swizzle;
261};
262
263struct vc4_compiler_ubo_range {
264        /**
265         * offset in bytes from the start of the ubo where this range is
266         * uploaded.
267         *
268         * Only set once used is set.
269         */
270        uint32_t dst_offset;
271
272        /**
273         * offset in bytes from the start of the gallium uniforms where the
274         * data comes from.
275         */
276        uint32_t src_offset;
277
278        /** size in bytes of this ubo range */
279        uint32_t size;
280
281        /**
282         * Set if this range is used by the shader for indirect uniforms
283         * access.
284         */
285        bool used;
286};
287
288struct vc4_key {
289        struct vc4_uncompiled_shader *shader_state;
290        struct {
291                enum pipe_format format;
292                uint8_t swizzle[4];
293                union {
294                        struct {
295                                unsigned compare_mode:1;
296                                unsigned compare_func:3;
297                                unsigned wrap_s:3;
298                                unsigned wrap_t:3;
299                        };
300                        struct {
301                                uint16_t msaa_width, msaa_height;
302                        };
303                };
304        } tex[VC4_MAX_TEXTURE_SAMPLERS];
305        uint8_t ucp_enables;
306};
307
308struct vc4_fs_key {
309        struct vc4_key base;
310        enum pipe_format color_format;
311        bool depth_enabled;
312        bool stencil_enabled;
313        bool stencil_twoside;
314        bool stencil_full_writemasks;
315        bool is_points;
316        bool is_lines;
317        bool alpha_test;
318        bool point_coord_upper_left;
319        bool light_twoside;
320        bool msaa;
321        bool sample_coverage;
322        bool sample_alpha_to_coverage;
323        bool sample_alpha_to_one;
324        uint8_t alpha_test_func;
325        uint8_t logicop_func;
326        uint32_t point_sprite_mask;
327
328        struct pipe_rt_blend_state blend;
329};
330
331struct vc4_vs_key {
332        struct vc4_key base;
333
334        /**
335         * This is a proxy for the array of FS input semantics, which is
336         * larger than we would want to put in the key.
337         */
338        uint64_t compiled_fs_id;
339
340        enum pipe_format attr_formats[8];
341        bool is_coord;
342        bool per_vertex_point_size;
343};
344
345struct vc4_compile {
346        struct vc4_context *vc4;
347        nir_shader *s;
348        nir_function_impl *impl;
349        struct exec_list *cf_node_list;
350
351        /**
352         * Mapping from nir_register * or nir_ssa_def * to array of struct
353         * qreg for the values.
354         */
355        struct hash_table *def_ht;
356
357        /* For each temp, the instruction generating its value. */
358        struct qinst **defs;
359        uint32_t defs_array_size;
360
361        /**
362         * Inputs to the shader, arranged by TGSI declaration order.
363         *
364         * Not all fragment shader QFILE_VARY reads are present in this array.
365         */
366        struct qreg *inputs;
367        struct qreg *outputs;
368        bool msaa_per_sample_output;
369        struct qreg color_reads[VC4_MAX_SAMPLES];
370        struct qreg sample_colors[VC4_MAX_SAMPLES];
371        uint32_t inputs_array_size;
372        uint32_t outputs_array_size;
373        uint32_t uniforms_array_size;
374
375        struct vc4_compiler_ubo_range *ubo_ranges;
376        uint32_t ubo_ranges_array_size;
377        /** Number of uniform areas declared in ubo_ranges. */
378        uint32_t num_uniform_ranges;
379        /** Number of uniform areas used for indirect addressed loads. */
380        uint32_t num_ubo_ranges;
381        uint32_t next_ubo_dst_offset;
382
383        struct qreg line_x, point_x, point_y;
384        struct qreg discard;
385
386        uint8_t vattr_sizes[8];
387
388        /**
389         * Array of the VARYING_SLOT_* of all FS QFILE_VARY reads.
390         *
391         * This includes those that aren't part of the VPM varyings, like
392         * point/line coordinates.
393         */
394        struct vc4_varying_slot *input_slots;
395        uint32_t num_input_slots;
396        uint32_t input_slots_array_size;
397
398        /**
399         * An entry per outputs[] in the VS indicating what the VARYING_SLOT_*
400         * of the output is.  Used to emit from the VS in the order that the
401         * FS needs.
402         */
403        struct vc4_varying_slot *output_slots;
404
405        struct pipe_shader_state *shader_state;
406        struct vc4_key *key;
407        struct vc4_fs_key *fs_key;
408        struct vc4_vs_key *vs_key;
409
410        uint32_t *uniform_data;
411        enum quniform_contents *uniform_contents;
412        uint32_t uniform_array_size;
413        uint32_t num_uniforms;
414        uint32_t num_outputs;
415        uint32_t num_texture_samples;
416        uint32_t output_position_index;
417        uint32_t output_color_index;
418        uint32_t output_point_size_index;
419        uint32_t output_sample_mask_index;
420
421        struct qreg undef;
422        enum qstage stage;
423        uint32_t num_temps;
424        struct list_head instructions;
425        uint32_t immediates[1024];
426
427        struct list_head qpu_inst_list;
428        uint64_t *qpu_insts;
429        uint32_t qpu_inst_count;
430        uint32_t qpu_inst_size;
431        uint32_t num_inputs;
432
433        uint32_t program_id;
434        uint32_t variant_id;
435};
436
437/* Special nir_load_input intrinsic index for loading the current TLB
438 * destination color.
439 */
440#define VC4_NIR_TLB_COLOR_READ_INPUT		2000000000
441
442#define VC4_NIR_MS_MASK_OUTPUT			2000000000
443
444/* Special offset for nir_load_uniform values to get a QUNIFORM_*
445 * state-dependent value.
446 */
447#define VC4_NIR_STATE_UNIFORM_OFFSET		2000000000
448
449struct vc4_compile *qir_compile_init(void);
450void qir_compile_destroy(struct vc4_compile *c);
451struct qinst *qir_inst(enum qop op, struct qreg dst,
452                       struct qreg src0, struct qreg src1);
453struct qinst *qir_inst4(enum qop op, struct qreg dst,
454                        struct qreg a,
455                        struct qreg b,
456                        struct qreg c,
457                        struct qreg d);
458void qir_remove_instruction(struct vc4_compile *c, struct qinst *qinst);
459struct qreg qir_uniform(struct vc4_compile *c,
460                        enum quniform_contents contents,
461                        uint32_t data);
462void qir_reorder_uniforms(struct vc4_compile *c);
463
464void qir_emit(struct vc4_compile *c, struct qinst *inst);
465static inline void qir_emit_nodef(struct vc4_compile *c, struct qinst *inst)
466{
467        list_addtail(&inst->link, &c->instructions);
468}
469
470struct qreg qir_get_temp(struct vc4_compile *c);
471int qir_get_op_nsrc(enum qop qop);
472bool qir_reg_equals(struct qreg a, struct qreg b);
473bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst);
474bool qir_has_side_effect_reads(struct vc4_compile *c, struct qinst *inst);
475bool qir_is_multi_instruction(struct qinst *inst);
476bool qir_is_mul(struct qinst *inst);
477bool qir_is_raw_mov(struct qinst *inst);
478bool qir_is_tex(struct qinst *inst);
479bool qir_is_float_input(struct qinst *inst);
480bool qir_depends_on_flags(struct qinst *inst);
481bool qir_writes_r4(struct qinst *inst);
482struct qreg qir_follow_movs(struct vc4_compile *c, struct qreg reg);
483
484void qir_dump(struct vc4_compile *c);
485void qir_dump_inst(struct vc4_compile *c, struct qinst *inst);
486const char *qir_get_stage_name(enum qstage stage);
487
488void qir_optimize(struct vc4_compile *c);
489bool qir_opt_algebraic(struct vc4_compile *c);
490bool qir_opt_constant_folding(struct vc4_compile *c);
491bool qir_opt_copy_propagation(struct vc4_compile *c);
492bool qir_opt_cse(struct vc4_compile *c);
493bool qir_opt_dead_code(struct vc4_compile *c);
494bool qir_opt_small_immediates(struct vc4_compile *c);
495bool qir_opt_vpm_writes(struct vc4_compile *c);
496void vc4_nir_lower_blend(struct vc4_compile *c);
497void vc4_nir_lower_io(struct vc4_compile *c);
498nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b,
499                                       enum quniform_contents contents);
500nir_ssa_def *vc4_nir_get_swizzled_channel(struct nir_builder *b,
501                                          nir_ssa_def **srcs, int swiz);
502void vc4_nir_lower_txf_ms(struct vc4_compile *c);
503void qir_lower_uniforms(struct vc4_compile *c);
504
505void qpu_schedule_instructions(struct vc4_compile *c);
506
507void qir_SF(struct vc4_compile *c, struct qreg src);
508
509static inline struct qreg
510qir_uniform_ui(struct vc4_compile *c, uint32_t ui)
511{
512        return qir_uniform(c, QUNIFORM_CONSTANT, ui);
513}
514
515static inline struct qreg
516qir_uniform_f(struct vc4_compile *c, float f)
517{
518        return qir_uniform(c, QUNIFORM_CONSTANT, fui(f));
519}
520
521#define QIR_ALU0(name)                                                   \
522static inline struct qreg                                                \
523qir_##name(struct vc4_compile *c)                                        \
524{                                                                        \
525        struct qreg t = qir_get_temp(c);                                 \
526        qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef));        \
527        return t;                                                        \
528}
529
530#define QIR_ALU1(name)                                                   \
531static inline struct qreg                                                \
532qir_##name(struct vc4_compile *c, struct qreg a)                         \
533{                                                                        \
534        struct qreg t = qir_get_temp(c);                                 \
535        qir_emit(c, qir_inst(QOP_##name, t, a, c->undef));               \
536        return t;                                                        \
537}                                                                        \
538static inline void                                                       \
539qir_##name##_dest(struct vc4_compile *c, struct qreg dest,               \
540                  struct qreg a)                                         \
541{                                                                        \
542        qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef));      \
543}
544
545#define QIR_ALU2(name)                                                   \
546static inline struct qreg                                                \
547qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b)          \
548{                                                                        \
549        struct qreg t = qir_get_temp(c);                                 \
550        qir_emit(c, qir_inst(QOP_##name, t, a, b));                      \
551        return t;                                                        \
552}                                                                        \
553static inline void                                                       \
554qir_##name##_dest(struct vc4_compile *c, struct qreg dest,               \
555                  struct qreg a, struct qreg b)                          \
556{                                                                        \
557        qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, b));             \
558}
559
560#define QIR_NODST_1(name)                                               \
561static inline void                                                      \
562qir_##name(struct vc4_compile *c, struct qreg a)                        \
563{                                                                       \
564        qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef));       \
565}
566
567#define QIR_NODST_2(name)                                               \
568static inline void                                                      \
569qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b)         \
570{                                                                       \
571        qir_emit(c, qir_inst(QOP_##name, c->undef, a, b));       \
572}
573
574#define QIR_PACK(name)                                                   \
575static inline struct qreg                                                \
576qir_##name(struct vc4_compile *c, struct qreg dest, struct qreg a)       \
577{                                                                        \
578        qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef));      \
579        return dest;                                                     \
580}
581
582QIR_ALU1(MOV)
583QIR_ALU1(FMOV)
584QIR_ALU1(MMOV)
585QIR_ALU2(FADD)
586QIR_ALU2(FSUB)
587QIR_ALU2(FMUL)
588QIR_ALU2(V8MULD)
589QIR_ALU2(V8MIN)
590QIR_ALU2(V8MAX)
591QIR_ALU2(V8ADDS)
592QIR_ALU2(V8SUBS)
593QIR_ALU2(MUL24)
594QIR_ALU1(SEL_X_0_ZS)
595QIR_ALU1(SEL_X_0_ZC)
596QIR_ALU1(SEL_X_0_NS)
597QIR_ALU1(SEL_X_0_NC)
598QIR_ALU1(SEL_X_0_CS)
599QIR_ALU1(SEL_X_0_CC)
600QIR_ALU2(SEL_X_Y_ZS)
601QIR_ALU2(SEL_X_Y_ZC)
602QIR_ALU2(SEL_X_Y_NS)
603QIR_ALU2(SEL_X_Y_NC)
604QIR_ALU2(SEL_X_Y_CS)
605QIR_ALU2(SEL_X_Y_CC)
606QIR_ALU2(FMIN)
607QIR_ALU2(FMAX)
608QIR_ALU2(FMINABS)
609QIR_ALU2(FMAXABS)
610QIR_ALU1(FTOI)
611QIR_ALU1(ITOF)
612
613QIR_ALU2(ADD)
614QIR_ALU2(SUB)
615QIR_ALU2(SHL)
616QIR_ALU2(SHR)
617QIR_ALU2(ASR)
618QIR_ALU2(MIN)
619QIR_ALU2(MAX)
620QIR_ALU2(AND)
621QIR_ALU2(OR)
622QIR_ALU2(XOR)
623QIR_ALU1(NOT)
624
625QIR_ALU1(RCP)
626QIR_ALU1(RSQ)
627QIR_ALU1(EXP2)
628QIR_ALU1(LOG2)
629QIR_ALU1(VARY_ADD_C)
630QIR_NODST_2(TEX_S)
631QIR_NODST_2(TEX_T)
632QIR_NODST_2(TEX_R)
633QIR_NODST_2(TEX_B)
634QIR_NODST_2(TEX_DIRECT)
635QIR_ALU0(FRAG_X)
636QIR_ALU0(FRAG_Y)
637QIR_ALU0(FRAG_Z)
638QIR_ALU0(FRAG_W)
639QIR_ALU0(FRAG_REV_FLAG)
640QIR_ALU0(TEX_RESULT)
641QIR_ALU0(TLB_COLOR_READ)
642QIR_NODST_1(TLB_COLOR_WRITE)
643QIR_NODST_1(TLB_COLOR_WRITE_MS)
644QIR_NODST_1(TLB_Z_WRITE)
645QIR_NODST_1(TLB_DISCARD_SETUP)
646QIR_NODST_1(TLB_STENCIL_SETUP)
647QIR_NODST_1(MS_MASK)
648
649static inline struct qreg
650qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i)
651{
652        struct qreg t = qir_FMOV(c, src);
653        c->defs[t.index]->src[0].pack = QPU_UNPACK_8A + i;
654        return t;
655}
656
657static inline struct qreg
658qir_UNPACK_8_I(struct vc4_compile *c, struct qreg src, int i)
659{
660        struct qreg t = qir_MOV(c, src);
661        c->defs[t.index]->src[0].pack = QPU_UNPACK_8A + i;
662        return t;
663}
664
665static inline struct qreg
666qir_UNPACK_16_F(struct vc4_compile *c, struct qreg src, int i)
667{
668        struct qreg t = qir_FMOV(c, src);
669        c->defs[t.index]->src[0].pack = QPU_UNPACK_16A + i;
670        return t;
671}
672
673static inline struct qreg
674qir_UNPACK_16_I(struct vc4_compile *c, struct qreg src, int i)
675{
676        struct qreg t = qir_MOV(c, src);
677        c->defs[t.index]->src[0].pack = QPU_UNPACK_16A + i;
678        return t;
679}
680
681static inline void
682qir_PACK_8_F(struct vc4_compile *c, struct qreg dest, struct qreg val, int chan)
683{
684        assert(!dest.pack);
685        dest.pack = QPU_PACK_MUL_8A + chan;
686        qir_emit(c, qir_inst(QOP_MMOV, dest, val, c->undef));
687        if (dest.file == QFILE_TEMP)
688                c->defs[dest.index] = NULL;
689}
690
691static inline struct qreg
692qir_PACK_8888_F(struct vc4_compile *c, struct qreg val)
693{
694        struct qreg dest = qir_MMOV(c, val);
695        c->defs[dest.index]->dst.pack = QPU_PACK_MUL_8888;
696        return dest;
697}
698
699static inline struct qreg
700qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y)
701{
702        return qir_EXP2(c, qir_FMUL(c,
703                                    y,
704                                    qir_LOG2(c, x)));
705}
706
707static inline void
708qir_VPM_WRITE(struct vc4_compile *c, struct qreg val)
709{
710        static const struct qreg vpm = { QFILE_VPM, 0 };
711        qir_emit(c, qir_inst(QOP_MOV, vpm, val, c->undef));
712}
713
714#endif /* VC4_QIR_H */
715