vc4_qir.h revision a97b40dca4949b5b8b3320e76768e54f430c9e78
1/* 2 * Copyright © 2014 Broadcom 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24#ifndef VC4_QIR_H 25#define VC4_QIR_H 26 27#include <assert.h> 28#include <stdio.h> 29#include <stdlib.h> 30#include <stdbool.h> 31#include <stdint.h> 32#include <string.h> 33 34#include "util/macros.h" 35#include "glsl/nir/nir.h" 36#include "util/list.h" 37#include "util/u_math.h" 38 39#include "vc4_screen.h" 40#include "vc4_qpu_defines.h" 41#include "kernel/vc4_packet.h" 42#include "pipe/p_state.h" 43 44struct nir_builder; 45 46enum qfile { 47 QFILE_NULL, 48 QFILE_TEMP, 49 QFILE_VARY, 50 QFILE_UNIF, 51 QFILE_VPM, 52 53 /** 54 * Stores an immediate value in the index field that can be turned 55 * into a small immediate field by qpu_encode_small_immediate(). 56 */ 57 QFILE_SMALL_IMM, 58}; 59 60struct qreg { 61 enum qfile file; 62 uint32_t index; 63 int pack; 64}; 65 66enum qop { 67 QOP_UNDEF, 68 QOP_MOV, 69 QOP_FMOV, 70 QOP_MMOV, 71 QOP_FADD, 72 QOP_FSUB, 73 QOP_FMUL, 74 QOP_V8MULD, 75 QOP_V8MIN, 76 QOP_V8MAX, 77 QOP_V8ADDS, 78 QOP_V8SUBS, 79 QOP_MUL24, 80 QOP_FMIN, 81 QOP_FMAX, 82 QOP_FMINABS, 83 QOP_FMAXABS, 84 QOP_ADD, 85 QOP_SUB, 86 QOP_SHL, 87 QOP_SHR, 88 QOP_ASR, 89 QOP_MIN, 90 QOP_MAX, 91 QOP_AND, 92 QOP_OR, 93 QOP_XOR, 94 QOP_NOT, 95 96 /* Note: Orderings of these compares must be the same as in 97 * qpu_defines.h. Selects the src[0] if the ns flag bit is set, 98 * otherwise 0. */ 99 QOP_SEL_X_0_ZS, 100 QOP_SEL_X_0_ZC, 101 QOP_SEL_X_0_NS, 102 QOP_SEL_X_0_NC, 103 QOP_SEL_X_0_CS, 104 QOP_SEL_X_0_CC, 105 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */ 106 QOP_SEL_X_Y_ZS, 107 QOP_SEL_X_Y_ZC, 108 QOP_SEL_X_Y_NS, 109 QOP_SEL_X_Y_NC, 110 QOP_SEL_X_Y_CS, 111 QOP_SEL_X_Y_CC, 112 113 QOP_FTOI, 114 QOP_ITOF, 115 QOP_RCP, 116 QOP_RSQ, 117 QOP_EXP2, 118 QOP_LOG2, 119 QOP_VW_SETUP, 120 QOP_VR_SETUP, 121 QOP_TLB_DISCARD_SETUP, 122 QOP_TLB_STENCIL_SETUP, 123 QOP_TLB_Z_WRITE, 124 QOP_TLB_COLOR_WRITE, 125 QOP_TLB_COLOR_WRITE_MS, 126 QOP_TLB_COLOR_READ, 127 QOP_MS_MASK, 128 QOP_VARY_ADD_C, 129 130 QOP_FRAG_X, 131 QOP_FRAG_Y, 132 QOP_FRAG_Z, 133 QOP_FRAG_W, 134 QOP_FRAG_REV_FLAG, 135 136 /** Texture x coordinate parameter write */ 137 QOP_TEX_S, 138 /** Texture y coordinate parameter write */ 139 QOP_TEX_T, 140 /** Texture border color parameter or cube map z coordinate write */ 141 QOP_TEX_R, 142 /** Texture LOD bias parameter write */ 143 QOP_TEX_B, 144 145 /** 146 * Texture-unit 4-byte read with address provided direct in S 147 * cooordinate. 148 * 149 * The first operand is the offset from the start of the UBO, and the 150 * second is the uniform that has the UBO's base pointer. 151 */ 152 QOP_TEX_DIRECT, 153 154 /** 155 * Signal of texture read being necessary and then reading r4 into 156 * the destination 157 */ 158 QOP_TEX_RESULT, 159}; 160 161struct queued_qpu_inst { 162 struct list_head link; 163 uint64_t inst; 164}; 165 166struct qinst { 167 struct list_head link; 168 169 enum qop op; 170 struct qreg dst; 171 struct qreg *src; 172 bool sf; 173}; 174 175enum qstage { 176 /** 177 * Coordinate shader, runs during binning, before the VS, and just 178 * outputs position. 179 */ 180 QSTAGE_COORD, 181 QSTAGE_VERT, 182 QSTAGE_FRAG, 183}; 184 185enum quniform_contents { 186 /** 187 * Indicates that a constant 32-bit value is copied from the program's 188 * uniform contents. 189 */ 190 QUNIFORM_CONSTANT, 191 /** 192 * Indicates that the program's uniform contents are used as an index 193 * into the GL uniform storage. 194 */ 195 QUNIFORM_UNIFORM, 196 197 /** @{ 198 * Scaling factors from clip coordinates to relative to the viewport 199 * center. 200 * 201 * This is used by the coordinate and vertex shaders to produce the 202 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed 203 * point offsets from the viewport ccenter. 204 */ 205 QUNIFORM_VIEWPORT_X_SCALE, 206 QUNIFORM_VIEWPORT_Y_SCALE, 207 /** @} */ 208 209 QUNIFORM_VIEWPORT_Z_OFFSET, 210 QUNIFORM_VIEWPORT_Z_SCALE, 211 212 QUNIFORM_USER_CLIP_PLANE, 213 214 /** 215 * A reference to a texture config parameter 0 uniform. 216 * 217 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which 218 * defines texture type, miplevels, and such. It will be found as a 219 * parameter to the first QOP_TEX_[STRB] instruction in a sequence. 220 */ 221 QUNIFORM_TEXTURE_CONFIG_P0, 222 223 /** 224 * A reference to a texture config parameter 1 uniform. 225 * 226 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which 227 * defines texture width, height, filters, and wrap modes. It will be 228 * found as a parameter to the second QOP_TEX_[STRB] instruction in a 229 * sequence. 230 */ 231 QUNIFORM_TEXTURE_CONFIG_P1, 232 233 /** A reference to a texture config parameter 2 cubemap stride uniform */ 234 QUNIFORM_TEXTURE_CONFIG_P2, 235 236 QUNIFORM_UBO_ADDR, 237 238 QUNIFORM_TEXRECT_SCALE_X, 239 QUNIFORM_TEXRECT_SCALE_Y, 240 241 QUNIFORM_TEXTURE_BORDER_COLOR, 242 243 QUNIFORM_BLEND_CONST_COLOR_X, 244 QUNIFORM_BLEND_CONST_COLOR_Y, 245 QUNIFORM_BLEND_CONST_COLOR_Z, 246 QUNIFORM_BLEND_CONST_COLOR_W, 247 QUNIFORM_BLEND_CONST_COLOR_RGBA, 248 QUNIFORM_BLEND_CONST_COLOR_AAAA, 249 250 QUNIFORM_STENCIL, 251 252 QUNIFORM_ALPHA_REF, 253 QUNIFORM_SAMPLE_MASK, 254}; 255 256struct vc4_varying_slot { 257 uint8_t slot; 258 uint8_t swizzle; 259}; 260 261struct vc4_compiler_ubo_range { 262 /** 263 * offset in bytes from the start of the ubo where this range is 264 * uploaded. 265 * 266 * Only set once used is set. 267 */ 268 uint32_t dst_offset; 269 270 /** 271 * offset in bytes from the start of the gallium uniforms where the 272 * data comes from. 273 */ 274 uint32_t src_offset; 275 276 /** size in bytes of this ubo range */ 277 uint32_t size; 278 279 /** 280 * Set if this range is used by the shader for indirect uniforms 281 * access. 282 */ 283 bool used; 284}; 285 286struct vc4_key { 287 struct vc4_uncompiled_shader *shader_state; 288 struct { 289 enum pipe_format format; 290 unsigned compare_mode:1; 291 unsigned compare_func:3; 292 unsigned wrap_s:3; 293 unsigned wrap_t:3; 294 uint8_t swizzle[4]; 295 } tex[VC4_MAX_TEXTURE_SAMPLERS]; 296 uint8_t ucp_enables; 297}; 298 299struct vc4_fs_key { 300 struct vc4_key base; 301 enum pipe_format color_format; 302 bool depth_enabled; 303 bool stencil_enabled; 304 bool stencil_twoside; 305 bool stencil_full_writemasks; 306 bool is_points; 307 bool is_lines; 308 bool alpha_test; 309 bool point_coord_upper_left; 310 bool light_twoside; 311 bool msaa; 312 bool sample_coverage; 313 bool sample_alpha_to_coverage; 314 bool sample_alpha_to_one; 315 uint8_t alpha_test_func; 316 uint8_t logicop_func; 317 uint32_t point_sprite_mask; 318 319 struct pipe_rt_blend_state blend; 320}; 321 322struct vc4_vs_key { 323 struct vc4_key base; 324 325 /** 326 * This is a proxy for the array of FS input semantics, which is 327 * larger than we would want to put in the key. 328 */ 329 uint64_t compiled_fs_id; 330 331 enum pipe_format attr_formats[8]; 332 bool is_coord; 333 bool per_vertex_point_size; 334}; 335 336struct vc4_compile { 337 struct vc4_context *vc4; 338 nir_shader *s; 339 nir_function_impl *impl; 340 struct exec_list *cf_node_list; 341 342 /** 343 * Mapping from nir_register * or nir_ssa_def * to array of struct 344 * qreg for the values. 345 */ 346 struct hash_table *def_ht; 347 348 /* For each temp, the instruction generating its value. */ 349 struct qinst **defs; 350 uint32_t defs_array_size; 351 352 /** 353 * Inputs to the shader, arranged by TGSI declaration order. 354 * 355 * Not all fragment shader QFILE_VARY reads are present in this array. 356 */ 357 struct qreg *inputs; 358 struct qreg *outputs; 359 bool msaa_per_sample_output; 360 struct qreg color_reads[VC4_MAX_SAMPLES]; 361 struct qreg sample_colors[VC4_MAX_SAMPLES]; 362 uint32_t inputs_array_size; 363 uint32_t outputs_array_size; 364 uint32_t uniforms_array_size; 365 366 struct vc4_compiler_ubo_range *ubo_ranges; 367 uint32_t ubo_ranges_array_size; 368 /** Number of uniform areas declared in ubo_ranges. */ 369 uint32_t num_uniform_ranges; 370 /** Number of uniform areas used for indirect addressed loads. */ 371 uint32_t num_ubo_ranges; 372 uint32_t next_ubo_dst_offset; 373 374 struct qreg line_x, point_x, point_y; 375 struct qreg discard; 376 377 uint8_t vattr_sizes[8]; 378 379 /** 380 * Array of the VARYING_SLOT_* of all FS QFILE_VARY reads. 381 * 382 * This includes those that aren't part of the VPM varyings, like 383 * point/line coordinates. 384 */ 385 struct vc4_varying_slot *input_slots; 386 uint32_t num_input_slots; 387 uint32_t input_slots_array_size; 388 389 /** 390 * An entry per outputs[] in the VS indicating what the VARYING_SLOT_* 391 * of the output is. Used to emit from the VS in the order that the 392 * FS needs. 393 */ 394 struct vc4_varying_slot *output_slots; 395 396 struct pipe_shader_state *shader_state; 397 struct vc4_key *key; 398 struct vc4_fs_key *fs_key; 399 struct vc4_vs_key *vs_key; 400 401 uint32_t *uniform_data; 402 enum quniform_contents *uniform_contents; 403 uint32_t uniform_array_size; 404 uint32_t num_uniforms; 405 uint32_t num_outputs; 406 uint32_t num_texture_samples; 407 uint32_t output_position_index; 408 uint32_t output_color_index; 409 uint32_t output_point_size_index; 410 uint32_t output_sample_mask_index; 411 412 struct qreg undef; 413 enum qstage stage; 414 uint32_t num_temps; 415 struct list_head instructions; 416 uint32_t immediates[1024]; 417 418 struct list_head qpu_inst_list; 419 uint64_t *qpu_insts; 420 uint32_t qpu_inst_count; 421 uint32_t qpu_inst_size; 422 uint32_t num_inputs; 423 424 uint32_t program_id; 425 uint32_t variant_id; 426}; 427 428/* Special nir_load_input intrinsic index for loading the current TLB 429 * destination color. 430 */ 431#define VC4_NIR_TLB_COLOR_READ_INPUT 2000000000 432 433#define VC4_NIR_MS_MASK_OUTPUT 2000000000 434 435/* Special offset for nir_load_uniform values to get a QUNIFORM_* 436 * state-dependent value. 437 */ 438#define VC4_NIR_STATE_UNIFORM_OFFSET 2000000000 439 440struct vc4_compile *qir_compile_init(void); 441void qir_compile_destroy(struct vc4_compile *c); 442struct qinst *qir_inst(enum qop op, struct qreg dst, 443 struct qreg src0, struct qreg src1); 444struct qinst *qir_inst4(enum qop op, struct qreg dst, 445 struct qreg a, 446 struct qreg b, 447 struct qreg c, 448 struct qreg d); 449void qir_remove_instruction(struct vc4_compile *c, struct qinst *qinst); 450struct qreg qir_uniform(struct vc4_compile *c, 451 enum quniform_contents contents, 452 uint32_t data); 453void qir_reorder_uniforms(struct vc4_compile *c); 454 455void qir_emit(struct vc4_compile *c, struct qinst *inst); 456static inline void qir_emit_nodef(struct vc4_compile *c, struct qinst *inst) 457{ 458 list_addtail(&inst->link, &c->instructions); 459} 460 461struct qreg qir_get_temp(struct vc4_compile *c); 462int qir_get_op_nsrc(enum qop qop); 463bool qir_reg_equals(struct qreg a, struct qreg b); 464bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst); 465bool qir_has_side_effect_reads(struct vc4_compile *c, struct qinst *inst); 466bool qir_is_multi_instruction(struct qinst *inst); 467bool qir_is_mul(struct qinst *inst); 468bool qir_is_raw_mov(struct qinst *inst); 469bool qir_is_tex(struct qinst *inst); 470bool qir_is_float_input(struct qinst *inst); 471bool qir_depends_on_flags(struct qinst *inst); 472bool qir_writes_r4(struct qinst *inst); 473struct qreg qir_follow_movs(struct vc4_compile *c, struct qreg reg); 474 475void qir_dump(struct vc4_compile *c); 476void qir_dump_inst(struct vc4_compile *c, struct qinst *inst); 477const char *qir_get_stage_name(enum qstage stage); 478 479void qir_optimize(struct vc4_compile *c); 480bool qir_opt_algebraic(struct vc4_compile *c); 481bool qir_opt_constant_folding(struct vc4_compile *c); 482bool qir_opt_copy_propagation(struct vc4_compile *c); 483bool qir_opt_cse(struct vc4_compile *c); 484bool qir_opt_dead_code(struct vc4_compile *c); 485bool qir_opt_small_immediates(struct vc4_compile *c); 486bool qir_opt_vpm_writes(struct vc4_compile *c); 487void vc4_nir_lower_blend(struct vc4_compile *c); 488void vc4_nir_lower_io(struct vc4_compile *c); 489nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b, 490 enum quniform_contents contents); 491nir_ssa_def *vc4_nir_get_swizzled_channel(struct nir_builder *b, 492 nir_ssa_def **srcs, int swiz); 493void qir_lower_uniforms(struct vc4_compile *c); 494 495void qpu_schedule_instructions(struct vc4_compile *c); 496 497void qir_SF(struct vc4_compile *c, struct qreg src); 498 499static inline struct qreg 500qir_uniform_ui(struct vc4_compile *c, uint32_t ui) 501{ 502 return qir_uniform(c, QUNIFORM_CONSTANT, ui); 503} 504 505static inline struct qreg 506qir_uniform_f(struct vc4_compile *c, float f) 507{ 508 return qir_uniform(c, QUNIFORM_CONSTANT, fui(f)); 509} 510 511#define QIR_ALU0(name) \ 512static inline struct qreg \ 513qir_##name(struct vc4_compile *c) \ 514{ \ 515 struct qreg t = qir_get_temp(c); \ 516 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \ 517 return t; \ 518} 519 520#define QIR_ALU1(name) \ 521static inline struct qreg \ 522qir_##name(struct vc4_compile *c, struct qreg a) \ 523{ \ 524 struct qreg t = qir_get_temp(c); \ 525 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \ 526 return t; \ 527} \ 528static inline void \ 529qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \ 530 struct qreg a) \ 531{ \ 532 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \ 533} 534 535#define QIR_ALU2(name) \ 536static inline struct qreg \ 537qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \ 538{ \ 539 struct qreg t = qir_get_temp(c); \ 540 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \ 541 return t; \ 542} \ 543static inline void \ 544qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \ 545 struct qreg a, struct qreg b) \ 546{ \ 547 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, b)); \ 548} 549 550#define QIR_NODST_1(name) \ 551static inline void \ 552qir_##name(struct vc4_compile *c, struct qreg a) \ 553{ \ 554 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \ 555} 556 557#define QIR_NODST_2(name) \ 558static inline void \ 559qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \ 560{ \ 561 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \ 562} 563 564#define QIR_PACK(name) \ 565static inline struct qreg \ 566qir_##name(struct vc4_compile *c, struct qreg dest, struct qreg a) \ 567{ \ 568 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \ 569 return dest; \ 570} 571 572QIR_ALU1(MOV) 573QIR_ALU1(FMOV) 574QIR_ALU1(MMOV) 575QIR_ALU2(FADD) 576QIR_ALU2(FSUB) 577QIR_ALU2(FMUL) 578QIR_ALU2(V8MULD) 579QIR_ALU2(V8MIN) 580QIR_ALU2(V8MAX) 581QIR_ALU2(V8ADDS) 582QIR_ALU2(V8SUBS) 583QIR_ALU2(MUL24) 584QIR_ALU1(SEL_X_0_ZS) 585QIR_ALU1(SEL_X_0_ZC) 586QIR_ALU1(SEL_X_0_NS) 587QIR_ALU1(SEL_X_0_NC) 588QIR_ALU1(SEL_X_0_CS) 589QIR_ALU1(SEL_X_0_CC) 590QIR_ALU2(SEL_X_Y_ZS) 591QIR_ALU2(SEL_X_Y_ZC) 592QIR_ALU2(SEL_X_Y_NS) 593QIR_ALU2(SEL_X_Y_NC) 594QIR_ALU2(SEL_X_Y_CS) 595QIR_ALU2(SEL_X_Y_CC) 596QIR_ALU2(FMIN) 597QIR_ALU2(FMAX) 598QIR_ALU2(FMINABS) 599QIR_ALU2(FMAXABS) 600QIR_ALU1(FTOI) 601QIR_ALU1(ITOF) 602 603QIR_ALU2(ADD) 604QIR_ALU2(SUB) 605QIR_ALU2(SHL) 606QIR_ALU2(SHR) 607QIR_ALU2(ASR) 608QIR_ALU2(MIN) 609QIR_ALU2(MAX) 610QIR_ALU2(AND) 611QIR_ALU2(OR) 612QIR_ALU2(XOR) 613QIR_ALU1(NOT) 614 615QIR_ALU1(RCP) 616QIR_ALU1(RSQ) 617QIR_ALU1(EXP2) 618QIR_ALU1(LOG2) 619QIR_ALU1(VARY_ADD_C) 620QIR_NODST_2(TEX_S) 621QIR_NODST_2(TEX_T) 622QIR_NODST_2(TEX_R) 623QIR_NODST_2(TEX_B) 624QIR_NODST_2(TEX_DIRECT) 625QIR_ALU0(FRAG_X) 626QIR_ALU0(FRAG_Y) 627QIR_ALU0(FRAG_Z) 628QIR_ALU0(FRAG_W) 629QIR_ALU0(FRAG_REV_FLAG) 630QIR_ALU0(TEX_RESULT) 631QIR_ALU0(TLB_COLOR_READ) 632QIR_NODST_1(TLB_COLOR_WRITE) 633QIR_NODST_1(TLB_COLOR_WRITE_MS) 634QIR_NODST_1(TLB_Z_WRITE) 635QIR_NODST_1(TLB_DISCARD_SETUP) 636QIR_NODST_1(TLB_STENCIL_SETUP) 637QIR_NODST_1(MS_MASK) 638 639static inline struct qreg 640qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i) 641{ 642 struct qreg t = qir_FMOV(c, src); 643 c->defs[t.index]->src[0].pack = QPU_UNPACK_8A + i; 644 return t; 645} 646 647static inline struct qreg 648qir_UNPACK_8_I(struct vc4_compile *c, struct qreg src, int i) 649{ 650 struct qreg t = qir_MOV(c, src); 651 c->defs[t.index]->src[0].pack = QPU_UNPACK_8A + i; 652 return t; 653} 654 655static inline struct qreg 656qir_UNPACK_16_F(struct vc4_compile *c, struct qreg src, int i) 657{ 658 struct qreg t = qir_FMOV(c, src); 659 c->defs[t.index]->src[0].pack = QPU_UNPACK_16A + i; 660 return t; 661} 662 663static inline struct qreg 664qir_UNPACK_16_I(struct vc4_compile *c, struct qreg src, int i) 665{ 666 struct qreg t = qir_MOV(c, src); 667 c->defs[t.index]->src[0].pack = QPU_UNPACK_16A + i; 668 return t; 669} 670 671static inline void 672qir_PACK_8_F(struct vc4_compile *c, struct qreg dest, struct qreg val, int chan) 673{ 674 assert(!dest.pack); 675 dest.pack = QPU_PACK_MUL_8A + chan; 676 qir_emit(c, qir_inst(QOP_MMOV, dest, val, c->undef)); 677 if (dest.file == QFILE_TEMP) 678 c->defs[dest.index] = NULL; 679} 680 681static inline struct qreg 682qir_PACK_8888_F(struct vc4_compile *c, struct qreg val) 683{ 684 struct qreg dest = qir_MMOV(c, val); 685 c->defs[dest.index]->dst.pack = QPU_PACK_MUL_8888; 686 return dest; 687} 688 689static inline struct qreg 690qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y) 691{ 692 return qir_EXP2(c, qir_FMUL(c, 693 y, 694 qir_LOG2(c, x))); 695} 696 697static inline void 698qir_VPM_WRITE(struct vc4_compile *c, struct qreg val) 699{ 700 static const struct qreg vpm = { QFILE_VPM, 0 }; 701 qir_emit(c, qir_inst(QOP_MOV, vpm, val, c->undef)); 702} 703 704#endif /* VC4_QIR_H */ 705