vc4_qir.h revision aae4223fbd2d94f922339baa11ffefdb88896770
1/* 2 * Copyright © 2014 Broadcom 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24#ifndef VC4_QIR_H 25#define VC4_QIR_H 26 27#include <stdio.h> 28#include <stdlib.h> 29#include <stdbool.h> 30#include <stdint.h> 31#include <string.h> 32 33#include "util/u_simple_list.h" 34#include "tgsi/tgsi_parse.h" 35 36enum qfile { 37 QFILE_NULL, 38 QFILE_TEMP, 39 QFILE_VARY, 40 QFILE_UNIF, 41}; 42 43struct qreg { 44 enum qfile file; 45 uint32_t index; 46}; 47 48enum qop { 49 QOP_UNDEF, 50 QOP_MOV, 51 QOP_FADD, 52 QOP_FSUB, 53 QOP_FMUL, 54 QOP_MUL24, 55 QOP_FMIN, 56 QOP_FMAX, 57 QOP_FMINABS, 58 QOP_FMAXABS, 59 QOP_ADD, 60 QOP_SUB, 61 QOP_SHL, 62 QOP_SHR, 63 QOP_ASR, 64 QOP_MIN, 65 QOP_MAX, 66 QOP_AND, 67 QOP_OR, 68 QOP_XOR, 69 QOP_NOT, 70 71 /* Sets the flag register according to src. */ 72 QOP_SF, 73 74 /* Note: Orderings of these compares must be the same as in 75 * qpu_defines.h. Selects the src[0] if the ns flag bit is set, 76 * otherwise 0. */ 77 QOP_SEL_X_0_ZS, 78 QOP_SEL_X_0_ZC, 79 QOP_SEL_X_0_NS, 80 QOP_SEL_X_0_NC, 81 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */ 82 QOP_SEL_X_Y_ZS, 83 QOP_SEL_X_Y_ZC, 84 QOP_SEL_X_Y_NS, 85 QOP_SEL_X_Y_NC, 86 87 QOP_FTOI, 88 QOP_ITOF, 89 QOP_RCP, 90 QOP_RSQ, 91 QOP_EXP2, 92 QOP_LOG2, 93 QOP_VW_SETUP, 94 QOP_VR_SETUP, 95 QOP_PACK_SCALED, 96 QOP_PACK_COLORS, 97 QOP_VPM_WRITE, 98 QOP_VPM_READ, 99 QOP_TLB_DISCARD_SETUP, 100 QOP_TLB_Z_WRITE, 101 QOP_TLB_COLOR_WRITE, 102 QOP_TLB_COLOR_READ, 103 QOP_VARY_ADD_C, 104 105 QOP_FRAG_X, 106 QOP_FRAG_Y, 107 QOP_FRAG_Z, 108 QOP_FRAG_RCP_W, 109 110 /** Texture x coordinate parameter write */ 111 QOP_TEX_S, 112 /** Texture y coordinate parameter write */ 113 QOP_TEX_T, 114 /** Texture border color parameter or cube map z coordinate write */ 115 QOP_TEX_R, 116 /** Texture LOD bias parameter write */ 117 QOP_TEX_B, 118 /** 119 * Signal of texture read being necessary and then reading r4 into 120 * the destination 121 */ 122 QOP_TEX_RESULT, 123 QOP_R4_UNPACK_A, 124 QOP_R4_UNPACK_B, 125 QOP_R4_UNPACK_C, 126 QOP_R4_UNPACK_D 127}; 128 129struct simple_node { 130 struct simple_node *next; 131 struct simple_node *prev; 132}; 133 134struct qinst { 135 struct simple_node link; 136 137 enum qop op; 138 struct qreg dst; 139 struct qreg *src; 140}; 141 142enum qstage { 143 /** 144 * Coordinate shader, runs during binning, before the VS, and just 145 * outputs position. 146 */ 147 QSTAGE_COORD, 148 QSTAGE_VERT, 149 QSTAGE_FRAG, 150}; 151 152enum quniform_contents { 153 /** 154 * Indicates that a constant 32-bit value is copied from the program's 155 * uniform contents. 156 */ 157 QUNIFORM_CONSTANT, 158 /** 159 * Indicates that the program's uniform contents are used as an index 160 * into the GL uniform storage. 161 */ 162 QUNIFORM_UNIFORM, 163 164 /** @{ 165 * Scaling factors from clip coordinates to relative to the viewport 166 * center. 167 * 168 * This is used by the coordinate and vertex shaders to produce the 169 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed 170 * point offsets from the viewport ccenter. 171 */ 172 QUNIFORM_VIEWPORT_X_SCALE, 173 QUNIFORM_VIEWPORT_Y_SCALE, 174 /** @} */ 175 176 QUNIFORM_VIEWPORT_Z_OFFSET, 177 QUNIFORM_VIEWPORT_Z_SCALE, 178 179 /** 180 * A reference to a texture config parameter 0 uniform. 181 * 182 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which 183 * defines texture type, miplevels, and such. It will be found as a 184 * parameter to the first QOP_TEX_[STRB] instruction in a sequence. 185 */ 186 QUNIFORM_TEXTURE_CONFIG_P0, 187 188 /** 189 * A reference to a texture config parameter 1 uniform. 190 * 191 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which 192 * defines texture width, height, filters, and wrap modes. It will be 193 * found as a parameter to the second QOP_TEX_[STRB] instruction in a 194 * sequence. 195 */ 196 QUNIFORM_TEXTURE_CONFIG_P1, 197 198 QUNIFORM_TEXRECT_SCALE_X, 199 QUNIFORM_TEXRECT_SCALE_Y, 200 201 QUNIFORM_BLEND_CONST_COLOR, 202}; 203 204struct vc4_compile { 205 struct tgsi_parse_context parser; 206 struct qreg *temps; 207 struct qreg *inputs; 208 struct qreg *outputs; 209 struct qreg *uniforms; 210 struct qreg *consts; 211 uint32_t temps_array_size; 212 uint32_t inputs_array_size; 213 uint32_t outputs_array_size; 214 uint32_t uniforms_array_size; 215 uint32_t consts_array_size; 216 uint32_t num_consts; 217 struct qreg line_x, point_x, point_y; 218 struct qreg discard; 219 220 struct pipe_shader_state *shader_state; 221 struct vc4_key *key; 222 struct vc4_fs_key *fs_key; 223 struct vc4_vs_key *vs_key; 224 225 uint32_t *uniform_data; 226 enum quniform_contents *uniform_contents; 227 uint32_t num_uniforms; 228 uint32_t num_outputs; 229 uint32_t num_texture_samples; 230 231 struct qreg undef; 232 enum qstage stage; 233 uint32_t num_temps; 234 struct simple_node instructions; 235 uint32_t immediates[1024]; 236 237 struct simple_node qpu_inst_list; 238 uint64_t *qpu_insts; 239 uint32_t qpu_inst_count; 240 uint32_t qpu_inst_size; 241 uint32_t num_inputs; 242}; 243 244struct vc4_compile *qir_compile_init(void); 245void qir_compile_destroy(struct vc4_compile *c); 246struct qinst *qir_inst(enum qop op, struct qreg dst, 247 struct qreg src0, struct qreg src1); 248struct qinst *qir_inst4(enum qop op, struct qreg dst, 249 struct qreg a, 250 struct qreg b, 251 struct qreg c, 252 struct qreg d); 253void qir_remove_instruction(struct qinst *qinst); 254void qir_emit(struct vc4_compile *c, struct qinst *inst); 255struct qreg qir_get_temp(struct vc4_compile *c); 256int qir_get_op_nsrc(enum qop qop); 257bool qir_reg_equals(struct qreg a, struct qreg b); 258bool qir_has_side_effects(struct qinst *inst); 259bool qir_depends_on_flags(struct qinst *inst); 260bool qir_writes_r4(struct qinst *inst); 261bool qir_reads_r4(struct qinst *inst); 262 263void qir_dump(struct vc4_compile *c); 264void qir_dump_inst(struct qinst *inst); 265const char *qir_get_stage_name(enum qstage stage); 266 267void qir_optimize(struct vc4_compile *c); 268bool qir_opt_algebraic(struct vc4_compile *c); 269bool qir_opt_copy_propagation(struct vc4_compile *c); 270bool qir_opt_cse(struct vc4_compile *c); 271bool qir_opt_dead_code(struct vc4_compile *c); 272 273#define QIR_ALU0(name) \ 274static inline struct qreg \ 275qir_##name(struct vc4_compile *c) \ 276{ \ 277 struct qreg t = qir_get_temp(c); \ 278 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \ 279 return t; \ 280} 281 282#define QIR_ALU1(name) \ 283static inline struct qreg \ 284qir_##name(struct vc4_compile *c, struct qreg a) \ 285{ \ 286 struct qreg t = qir_get_temp(c); \ 287 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \ 288 return t; \ 289} 290 291#define QIR_ALU2(name) \ 292static inline struct qreg \ 293qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \ 294{ \ 295 struct qreg t = qir_get_temp(c); \ 296 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \ 297 return t; \ 298} 299 300#define QIR_NODST_1(name) \ 301static inline void \ 302qir_##name(struct vc4_compile *c, struct qreg a) \ 303{ \ 304 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \ 305} 306 307#define QIR_NODST_2(name) \ 308static inline void \ 309qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \ 310{ \ 311 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \ 312} 313 314QIR_ALU1(MOV) 315QIR_ALU2(FADD) 316QIR_ALU2(FSUB) 317QIR_ALU2(FMUL) 318QIR_ALU2(MUL24) 319QIR_NODST_1(SF) 320QIR_ALU1(SEL_X_0_ZS) 321QIR_ALU1(SEL_X_0_ZC) 322QIR_ALU1(SEL_X_0_NS) 323QIR_ALU1(SEL_X_0_NC) 324QIR_ALU2(SEL_X_Y_ZS) 325QIR_ALU2(SEL_X_Y_ZC) 326QIR_ALU2(SEL_X_Y_NS) 327QIR_ALU2(SEL_X_Y_NC) 328QIR_ALU2(FMIN) 329QIR_ALU2(FMAX) 330QIR_ALU2(FMINABS) 331QIR_ALU2(FMAXABS) 332QIR_ALU1(FTOI) 333QIR_ALU1(ITOF) 334 335QIR_ALU2(ADD) 336QIR_ALU2(SUB) 337QIR_ALU2(SHL) 338QIR_ALU2(SHR) 339QIR_ALU2(ASR) 340QIR_ALU2(MIN) 341QIR_ALU2(MAX) 342QIR_ALU2(AND) 343QIR_ALU2(OR) 344QIR_ALU2(XOR) 345QIR_ALU1(NOT) 346 347QIR_ALU1(RCP) 348QIR_ALU1(RSQ) 349QIR_ALU1(EXP2) 350QIR_ALU1(LOG2) 351QIR_ALU2(PACK_SCALED) 352QIR_ALU1(VARY_ADD_C) 353QIR_NODST_1(VPM_WRITE) 354QIR_NODST_2(TEX_S) 355QIR_NODST_2(TEX_T) 356QIR_NODST_2(TEX_R) 357QIR_NODST_2(TEX_B) 358QIR_ALU0(FRAG_X) 359QIR_ALU0(FRAG_Y) 360QIR_ALU0(FRAG_Z) 361QIR_ALU0(FRAG_RCP_W) 362QIR_ALU0(TEX_RESULT) 363QIR_ALU0(TLB_COLOR_READ) 364QIR_NODST_1(TLB_Z_WRITE) 365QIR_NODST_1(TLB_DISCARD_SETUP) 366 367static inline struct qreg 368qir_R4_UNPACK(struct vc4_compile *c, struct qreg r4, int i) 369{ 370 struct qreg t = qir_get_temp(c); 371 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, r4, c->undef)); 372 return t; 373} 374 375static inline struct qreg 376qir_SEL_X_0_COND(struct vc4_compile *c, int i) 377{ 378 struct qreg t = qir_get_temp(c); 379 qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, c->undef, c->undef)); 380 return t; 381} 382 383#endif /* VC4_QIR_H */ 384