vc4_qir.h revision f09ed63f4342846e361242233162799140674d5f
1/* 2 * Copyright © 2014 Broadcom 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24#ifndef VC4_QIR_H 25#define VC4_QIR_H 26 27#include <assert.h> 28#include <stdio.h> 29#include <stdlib.h> 30#include <stdbool.h> 31#include <stdint.h> 32#include <string.h> 33 34#include "util/macros.h" 35#include "glsl/nir/nir.h" 36#include "util/list.h" 37#include "util/u_math.h" 38 39#include "vc4_screen.h" 40#include "pipe/p_state.h" 41 42struct nir_builder; 43 44enum qfile { 45 QFILE_NULL, 46 QFILE_TEMP, 47 QFILE_VARY, 48 QFILE_UNIF, 49 QFILE_VPM, 50 51 /** 52 * Stores an immediate value in the index field that can be turned 53 * into a small immediate field by qpu_encode_small_immediate(). 54 */ 55 QFILE_SMALL_IMM, 56}; 57 58struct qreg { 59 enum qfile file; 60 uint32_t index; 61 int pack; 62}; 63 64enum qop { 65 QOP_UNDEF, 66 QOP_MOV, 67 QOP_FADD, 68 QOP_FSUB, 69 QOP_FMUL, 70 QOP_V8MULD, 71 QOP_V8MIN, 72 QOP_V8MAX, 73 QOP_V8ADDS, 74 QOP_V8SUBS, 75 QOP_MUL24, 76 QOP_FMIN, 77 QOP_FMAX, 78 QOP_FMINABS, 79 QOP_FMAXABS, 80 QOP_ADD, 81 QOP_SUB, 82 QOP_SHL, 83 QOP_SHR, 84 QOP_ASR, 85 QOP_MIN, 86 QOP_MAX, 87 QOP_AND, 88 QOP_OR, 89 QOP_XOR, 90 QOP_NOT, 91 92 /* Note: Orderings of these compares must be the same as in 93 * qpu_defines.h. Selects the src[0] if the ns flag bit is set, 94 * otherwise 0. */ 95 QOP_SEL_X_0_ZS, 96 QOP_SEL_X_0_ZC, 97 QOP_SEL_X_0_NS, 98 QOP_SEL_X_0_NC, 99 /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */ 100 QOP_SEL_X_Y_ZS, 101 QOP_SEL_X_Y_ZC, 102 QOP_SEL_X_Y_NS, 103 QOP_SEL_X_Y_NC, 104 105 QOP_FTOI, 106 QOP_ITOF, 107 QOP_RCP, 108 QOP_RSQ, 109 QOP_EXP2, 110 QOP_LOG2, 111 QOP_VW_SETUP, 112 QOP_VR_SETUP, 113 QOP_PACK_8888_F, 114 QOP_PACK_8A_F, 115 QOP_PACK_8B_F, 116 QOP_PACK_8C_F, 117 QOP_PACK_8D_F, 118 QOP_TLB_DISCARD_SETUP, 119 QOP_TLB_STENCIL_SETUP, 120 QOP_TLB_Z_WRITE, 121 QOP_TLB_COLOR_WRITE, 122 QOP_TLB_COLOR_READ, 123 QOP_VARY_ADD_C, 124 125 QOP_FRAG_X, 126 QOP_FRAG_Y, 127 QOP_FRAG_Z, 128 QOP_FRAG_W, 129 QOP_FRAG_REV_FLAG, 130 131 QOP_UNPACK_8A_F, 132 QOP_UNPACK_8B_F, 133 QOP_UNPACK_8C_F, 134 QOP_UNPACK_8D_F, 135 QOP_UNPACK_16A_F, 136 QOP_UNPACK_16B_F, 137 138 QOP_UNPACK_8A_I, 139 QOP_UNPACK_8B_I, 140 QOP_UNPACK_8C_I, 141 QOP_UNPACK_8D_I, 142 QOP_UNPACK_16A_I, 143 QOP_UNPACK_16B_I, 144 145 /** Texture x coordinate parameter write */ 146 QOP_TEX_S, 147 /** Texture y coordinate parameter write */ 148 QOP_TEX_T, 149 /** Texture border color parameter or cube map z coordinate write */ 150 QOP_TEX_R, 151 /** Texture LOD bias parameter write */ 152 QOP_TEX_B, 153 154 /** 155 * Texture-unit 4-byte read with address provided direct in S 156 * cooordinate. 157 * 158 * The first operand is the offset from the start of the UBO, and the 159 * second is the uniform that has the UBO's base pointer. 160 */ 161 QOP_TEX_DIRECT, 162 163 /** 164 * Signal of texture read being necessary and then reading r4 into 165 * the destination 166 */ 167 QOP_TEX_RESULT, 168}; 169 170struct queued_qpu_inst { 171 struct list_head link; 172 uint64_t inst; 173}; 174 175struct qinst { 176 struct list_head link; 177 178 enum qop op; 179 struct qreg dst; 180 struct qreg *src; 181 bool sf; 182}; 183 184enum qstage { 185 /** 186 * Coordinate shader, runs during binning, before the VS, and just 187 * outputs position. 188 */ 189 QSTAGE_COORD, 190 QSTAGE_VERT, 191 QSTAGE_FRAG, 192}; 193 194enum quniform_contents { 195 /** 196 * Indicates that a constant 32-bit value is copied from the program's 197 * uniform contents. 198 */ 199 QUNIFORM_CONSTANT, 200 /** 201 * Indicates that the program's uniform contents are used as an index 202 * into the GL uniform storage. 203 */ 204 QUNIFORM_UNIFORM, 205 206 /** @{ 207 * Scaling factors from clip coordinates to relative to the viewport 208 * center. 209 * 210 * This is used by the coordinate and vertex shaders to produce the 211 * 32-bit entry consisting of 2 16-bit fields with 12.4 signed fixed 212 * point offsets from the viewport ccenter. 213 */ 214 QUNIFORM_VIEWPORT_X_SCALE, 215 QUNIFORM_VIEWPORT_Y_SCALE, 216 /** @} */ 217 218 QUNIFORM_VIEWPORT_Z_OFFSET, 219 QUNIFORM_VIEWPORT_Z_SCALE, 220 221 QUNIFORM_USER_CLIP_PLANE, 222 223 /** 224 * A reference to a texture config parameter 0 uniform. 225 * 226 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which 227 * defines texture type, miplevels, and such. It will be found as a 228 * parameter to the first QOP_TEX_[STRB] instruction in a sequence. 229 */ 230 QUNIFORM_TEXTURE_CONFIG_P0, 231 232 /** 233 * A reference to a texture config parameter 1 uniform. 234 * 235 * This is a uniform implicitly loaded with a QPU_W_TMU* write, which 236 * defines texture width, height, filters, and wrap modes. It will be 237 * found as a parameter to the second QOP_TEX_[STRB] instruction in a 238 * sequence. 239 */ 240 QUNIFORM_TEXTURE_CONFIG_P1, 241 242 /** A reference to a texture config parameter 2 cubemap stride uniform */ 243 QUNIFORM_TEXTURE_CONFIG_P2, 244 245 QUNIFORM_UBO_ADDR, 246 247 QUNIFORM_TEXRECT_SCALE_X, 248 QUNIFORM_TEXRECT_SCALE_Y, 249 250 QUNIFORM_TEXTURE_BORDER_COLOR, 251 252 QUNIFORM_BLEND_CONST_COLOR_X, 253 QUNIFORM_BLEND_CONST_COLOR_Y, 254 QUNIFORM_BLEND_CONST_COLOR_Z, 255 QUNIFORM_BLEND_CONST_COLOR_W, 256 QUNIFORM_BLEND_CONST_COLOR_RGBA, 257 QUNIFORM_BLEND_CONST_COLOR_AAAA, 258 259 QUNIFORM_STENCIL, 260 261 QUNIFORM_ALPHA_REF, 262}; 263 264struct vc4_varying_slot { 265 uint8_t slot; 266 uint8_t swizzle; 267}; 268 269struct vc4_compiler_ubo_range { 270 /** 271 * offset in bytes from the start of the ubo where this range is 272 * uploaded. 273 * 274 * Only set once used is set. 275 */ 276 uint32_t dst_offset; 277 278 /** 279 * offset in bytes from the start of the gallium uniforms where the 280 * data comes from. 281 */ 282 uint32_t src_offset; 283 284 /** size in bytes of this ubo range */ 285 uint32_t size; 286 287 /** 288 * Set if this range is used by the shader for indirect uniforms 289 * access. 290 */ 291 bool used; 292}; 293 294struct vc4_key { 295 struct vc4_uncompiled_shader *shader_state; 296 struct { 297 enum pipe_format format; 298 unsigned compare_mode:1; 299 unsigned compare_func:3; 300 unsigned wrap_s:3; 301 unsigned wrap_t:3; 302 uint8_t swizzle[4]; 303 } tex[VC4_MAX_TEXTURE_SAMPLERS]; 304 uint8_t ucp_enables; 305}; 306 307struct vc4_fs_key { 308 struct vc4_key base; 309 enum pipe_format color_format; 310 bool depth_enabled; 311 bool stencil_enabled; 312 bool stencil_twoside; 313 bool stencil_full_writemasks; 314 bool is_points; 315 bool is_lines; 316 bool alpha_test; 317 bool point_coord_upper_left; 318 bool light_twoside; 319 uint8_t alpha_test_func; 320 uint8_t logicop_func; 321 uint32_t point_sprite_mask; 322 323 struct pipe_rt_blend_state blend; 324}; 325 326struct vc4_vs_key { 327 struct vc4_key base; 328 329 /** 330 * This is a proxy for the array of FS input semantics, which is 331 * larger than we would want to put in the key. 332 */ 333 uint64_t compiled_fs_id; 334 335 enum pipe_format attr_formats[8]; 336 bool is_coord; 337 bool per_vertex_point_size; 338}; 339 340struct vc4_compile { 341 struct vc4_context *vc4; 342 nir_shader *s; 343 nir_function_impl *impl; 344 struct exec_list *cf_node_list; 345 346 /** 347 * Mapping from nir_register * or nir_ssa_def * to array of struct 348 * qreg for the values. 349 */ 350 struct hash_table *def_ht; 351 352 /* For each temp, the instruction generating its value. */ 353 struct qinst **defs; 354 uint32_t defs_array_size; 355 356 /** 357 * Inputs to the shader, arranged by TGSI declaration order. 358 * 359 * Not all fragment shader QFILE_VARY reads are present in this array. 360 */ 361 struct qreg *inputs; 362 struct qreg *outputs; 363 uint32_t inputs_array_size; 364 uint32_t outputs_array_size; 365 uint32_t uniforms_array_size; 366 367 struct vc4_compiler_ubo_range *ubo_ranges; 368 uint32_t ubo_ranges_array_size; 369 /** Number of uniform areas declared in ubo_ranges. */ 370 uint32_t num_uniform_ranges; 371 /** Number of uniform areas used for indirect addressed loads. */ 372 uint32_t num_ubo_ranges; 373 uint32_t next_ubo_dst_offset; 374 375 struct qreg line_x, point_x, point_y; 376 struct qreg discard; 377 378 uint8_t vattr_sizes[8]; 379 380 /** 381 * Array of the VARYING_SLOT_* of all FS QFILE_VARY reads. 382 * 383 * This includes those that aren't part of the VPM varyings, like 384 * point/line coordinates. 385 */ 386 struct vc4_varying_slot *input_slots; 387 uint32_t num_input_slots; 388 uint32_t input_slots_array_size; 389 390 /** 391 * An entry per outputs[] in the VS indicating what the VARYING_SLOT_* 392 * of the output is. Used to emit from the VS in the order that the 393 * FS needs. 394 */ 395 struct vc4_varying_slot *output_slots; 396 397 struct pipe_shader_state *shader_state; 398 struct vc4_key *key; 399 struct vc4_fs_key *fs_key; 400 struct vc4_vs_key *vs_key; 401 402 uint32_t *uniform_data; 403 enum quniform_contents *uniform_contents; 404 uint32_t uniform_array_size; 405 uint32_t num_uniforms; 406 uint32_t num_outputs; 407 uint32_t num_texture_samples; 408 uint32_t output_position_index; 409 uint32_t output_color_index; 410 uint32_t output_point_size_index; 411 412 struct qreg undef; 413 enum qstage stage; 414 uint32_t num_temps; 415 struct list_head instructions; 416 uint32_t immediates[1024]; 417 418 struct list_head qpu_inst_list; 419 uint64_t *qpu_insts; 420 uint32_t qpu_inst_count; 421 uint32_t qpu_inst_size; 422 uint32_t num_inputs; 423 424 uint32_t program_id; 425 uint32_t variant_id; 426}; 427 428/* Special nir_load_input intrinsic index for loading the current TLB 429 * destination color. 430 */ 431#define VC4_NIR_TLB_COLOR_READ_INPUT 2000000000 432 433/* Special offset for nir_load_uniform values to get a QUNIFORM_* 434 * state-dependent value. 435 */ 436#define VC4_NIR_STATE_UNIFORM_OFFSET 2000000000 437 438struct vc4_compile *qir_compile_init(void); 439void qir_compile_destroy(struct vc4_compile *c); 440struct qinst *qir_inst(enum qop op, struct qreg dst, 441 struct qreg src0, struct qreg src1); 442struct qinst *qir_inst4(enum qop op, struct qreg dst, 443 struct qreg a, 444 struct qreg b, 445 struct qreg c, 446 struct qreg d); 447void qir_remove_instruction(struct vc4_compile *c, struct qinst *qinst); 448struct qreg qir_uniform(struct vc4_compile *c, 449 enum quniform_contents contents, 450 uint32_t data); 451void qir_reorder_uniforms(struct vc4_compile *c); 452 453void qir_emit(struct vc4_compile *c, struct qinst *inst); 454static inline void qir_emit_nodef(struct vc4_compile *c, struct qinst *inst) 455{ 456 list_addtail(&inst->link, &c->instructions); 457} 458 459struct qreg qir_get_temp(struct vc4_compile *c); 460int qir_get_op_nsrc(enum qop qop); 461bool qir_reg_equals(struct qreg a, struct qreg b); 462bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst); 463bool qir_has_side_effect_reads(struct vc4_compile *c, struct qinst *inst); 464bool qir_is_multi_instruction(struct qinst *inst); 465bool qir_is_mul(struct qinst *inst); 466bool qir_is_raw_mov(struct qinst *inst); 467bool qir_is_tex(struct qinst *inst); 468bool qir_depends_on_flags(struct qinst *inst); 469bool qir_writes_r4(struct qinst *inst); 470bool qir_src_needs_a_file(struct qinst *inst); 471struct qreg qir_follow_movs(struct vc4_compile *c, struct qreg reg); 472 473void qir_dump(struct vc4_compile *c); 474void qir_dump_inst(struct vc4_compile *c, struct qinst *inst); 475const char *qir_get_stage_name(enum qstage stage); 476 477void qir_optimize(struct vc4_compile *c); 478bool qir_opt_algebraic(struct vc4_compile *c); 479bool qir_opt_constant_folding(struct vc4_compile *c); 480bool qir_opt_copy_propagation(struct vc4_compile *c); 481bool qir_opt_cse(struct vc4_compile *c); 482bool qir_opt_dead_code(struct vc4_compile *c); 483bool qir_opt_small_immediates(struct vc4_compile *c); 484bool qir_opt_vpm_writes(struct vc4_compile *c); 485void vc4_nir_lower_blend(struct vc4_compile *c); 486void vc4_nir_lower_io(struct vc4_compile *c); 487nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b, 488 enum quniform_contents contents); 489nir_ssa_def *vc4_nir_get_swizzled_channel(struct nir_builder *b, 490 nir_ssa_def **srcs, int swiz); 491void qir_lower_uniforms(struct vc4_compile *c); 492 493void qpu_schedule_instructions(struct vc4_compile *c); 494 495void qir_SF(struct vc4_compile *c, struct qreg src); 496 497static inline struct qreg 498qir_uniform_ui(struct vc4_compile *c, uint32_t ui) 499{ 500 return qir_uniform(c, QUNIFORM_CONSTANT, ui); 501} 502 503static inline struct qreg 504qir_uniform_f(struct vc4_compile *c, float f) 505{ 506 return qir_uniform(c, QUNIFORM_CONSTANT, fui(f)); 507} 508 509#define QIR_ALU0(name) \ 510static inline struct qreg \ 511qir_##name(struct vc4_compile *c) \ 512{ \ 513 struct qreg t = qir_get_temp(c); \ 514 qir_emit(c, qir_inst(QOP_##name, t, c->undef, c->undef)); \ 515 return t; \ 516} 517 518#define QIR_ALU1(name) \ 519static inline struct qreg \ 520qir_##name(struct vc4_compile *c, struct qreg a) \ 521{ \ 522 struct qreg t = qir_get_temp(c); \ 523 qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \ 524 return t; \ 525} \ 526static inline void \ 527qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \ 528 struct qreg a) \ 529{ \ 530 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \ 531} 532 533#define QIR_ALU2(name) \ 534static inline struct qreg \ 535qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \ 536{ \ 537 struct qreg t = qir_get_temp(c); \ 538 qir_emit(c, qir_inst(QOP_##name, t, a, b)); \ 539 return t; \ 540} \ 541static inline void \ 542qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \ 543 struct qreg a, struct qreg b) \ 544{ \ 545 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, b)); \ 546} 547 548#define QIR_NODST_1(name) \ 549static inline void \ 550qir_##name(struct vc4_compile *c, struct qreg a) \ 551{ \ 552 qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \ 553} 554 555#define QIR_NODST_2(name) \ 556static inline void \ 557qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \ 558{ \ 559 qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \ 560} 561 562#define QIR_PACK(name) \ 563static inline struct qreg \ 564qir_##name(struct vc4_compile *c, struct qreg dest, struct qreg a) \ 565{ \ 566 qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \ 567 return dest; \ 568} 569 570QIR_ALU1(MOV) 571QIR_ALU2(FADD) 572QIR_ALU2(FSUB) 573QIR_ALU2(FMUL) 574QIR_ALU2(V8MULD) 575QIR_ALU2(V8MIN) 576QIR_ALU2(V8MAX) 577QIR_ALU2(V8ADDS) 578QIR_ALU2(V8SUBS) 579QIR_ALU2(MUL24) 580QIR_ALU1(SEL_X_0_ZS) 581QIR_ALU1(SEL_X_0_ZC) 582QIR_ALU1(SEL_X_0_NS) 583QIR_ALU1(SEL_X_0_NC) 584QIR_ALU2(SEL_X_Y_ZS) 585QIR_ALU2(SEL_X_Y_ZC) 586QIR_ALU2(SEL_X_Y_NS) 587QIR_ALU2(SEL_X_Y_NC) 588QIR_ALU2(FMIN) 589QIR_ALU2(FMAX) 590QIR_ALU2(FMINABS) 591QIR_ALU2(FMAXABS) 592QIR_ALU1(FTOI) 593QIR_ALU1(ITOF) 594 595QIR_ALU2(ADD) 596QIR_ALU2(SUB) 597QIR_ALU2(SHL) 598QIR_ALU2(SHR) 599QIR_ALU2(ASR) 600QIR_ALU2(MIN) 601QIR_ALU2(MAX) 602QIR_ALU2(AND) 603QIR_ALU2(OR) 604QIR_ALU2(XOR) 605QIR_ALU1(NOT) 606 607QIR_ALU1(RCP) 608QIR_ALU1(RSQ) 609QIR_ALU1(EXP2) 610QIR_ALU1(LOG2) 611QIR_ALU1(PACK_8888_F) 612QIR_PACK(PACK_8A_F) 613QIR_PACK(PACK_8B_F) 614QIR_PACK(PACK_8C_F) 615QIR_PACK(PACK_8D_F) 616QIR_ALU1(VARY_ADD_C) 617QIR_NODST_2(TEX_S) 618QIR_NODST_2(TEX_T) 619QIR_NODST_2(TEX_R) 620QIR_NODST_2(TEX_B) 621QIR_NODST_2(TEX_DIRECT) 622QIR_ALU0(FRAG_X) 623QIR_ALU0(FRAG_Y) 624QIR_ALU0(FRAG_Z) 625QIR_ALU0(FRAG_W) 626QIR_ALU0(FRAG_REV_FLAG) 627QIR_ALU0(TEX_RESULT) 628QIR_ALU0(TLB_COLOR_READ) 629QIR_NODST_1(TLB_COLOR_WRITE) 630QIR_NODST_1(TLB_Z_WRITE) 631QIR_NODST_1(TLB_DISCARD_SETUP) 632QIR_NODST_1(TLB_STENCIL_SETUP) 633 634static inline struct qreg 635qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i) 636{ 637 struct qreg t = qir_get_temp(c); 638 qir_emit(c, qir_inst(QOP_UNPACK_8A_F + i, t, src, c->undef)); 639 return t; 640} 641 642static inline struct qreg 643qir_UNPACK_8_I(struct vc4_compile *c, struct qreg src, int i) 644{ 645 struct qreg t = qir_get_temp(c); 646 qir_emit(c, qir_inst(QOP_UNPACK_8A_I + i, t, src, c->undef)); 647 return t; 648} 649 650static inline struct qreg 651qir_UNPACK_16_F(struct vc4_compile *c, struct qreg src, int i) 652{ 653 struct qreg t = qir_get_temp(c); 654 qir_emit(c, qir_inst(QOP_UNPACK_16A_F + i, t, src, c->undef)); 655 return t; 656} 657 658static inline struct qreg 659qir_UNPACK_16_I(struct vc4_compile *c, struct qreg src, int i) 660{ 661 struct qreg t = qir_get_temp(c); 662 qir_emit(c, qir_inst(QOP_UNPACK_16A_I + i, t, src, c->undef)); 663 return t; 664} 665 666static inline struct qreg 667qir_PACK_8_F(struct vc4_compile *c, struct qreg dest, struct qreg val, int chan) 668{ 669 qir_emit(c, qir_inst(QOP_PACK_8A_F + chan, dest, val, c->undef)); 670 if (dest.file == QFILE_TEMP) 671 c->defs[dest.index] = NULL; 672 return dest; 673} 674 675static inline struct qreg 676qir_POW(struct vc4_compile *c, struct qreg x, struct qreg y) 677{ 678 return qir_EXP2(c, qir_FMUL(c, 679 y, 680 qir_LOG2(c, x))); 681} 682 683static inline void 684qir_VPM_WRITE(struct vc4_compile *c, struct qreg val) 685{ 686 static const struct qreg vpm = { QFILE_VPM, 0 }; 687 qir_emit(c, qir_inst(QOP_MOV, vpm, val, c->undef)); 688} 689 690#endif /* VC4_QIR_H */ 691