1#ifndef I386_BITS_CPU_H 2#define I386_BITS_CPU_H 3 4/* Intel-defined CPU features, CPUID level 0x00000001, word 0 */ 5#define X86_FEATURE_FPU 0 /* Onboard FPU */ 6#define X86_FEATURE_VME 1 /* Virtual Mode Extensions */ 7#define X86_FEATURE_DE 2 /* Debugging Extensions */ 8#define X86_FEATURE_PSE 3 /* Page Size Extensions */ 9#define X86_FEATURE_TSC 4 /* Time Stamp Counter */ 10#define X86_FEATURE_MSR 5 /* Model-Specific Registers, RDMSR, WRMSR */ 11#define X86_FEATURE_PAE 6 /* Physical Address Extensions */ 12#define X86_FEATURE_MCE 7 /* Machine Check Architecture */ 13#define X86_FEATURE_CX8 8 /* CMPXCHG8 instruction */ 14#define X86_FEATURE_APIC 9 /* Onboard APIC */ 15#define X86_FEATURE_SEP 11 /* SYSENTER/SYSEXIT */ 16#define X86_FEATURE_MTRR 12 /* Memory Type Range Registers */ 17#define X86_FEATURE_PGE 13 /* Page Global Enable */ 18#define X86_FEATURE_MCA 14 /* Machine Check Architecture */ 19#define X86_FEATURE_CMOV 15 /* CMOV instruction (FCMOVCC and FCOMI too if FPU present) */ 20#define X86_FEATURE_PAT 16 /* Page Attribute Table */ 21#define X86_FEATURE_PSE36 17 /* 36-bit PSEs */ 22#define X86_FEATURE_PN 18 /* Processor serial number */ 23#define X86_FEATURE_CLFLSH 19 /* Supports the CLFLUSH instruction */ 24#define X86_FEATURE_DTES 21 /* Debug Trace Store */ 25#define X86_FEATURE_ACPI 22 /* ACPI via MSR */ 26#define X86_FEATURE_MMX 23 /* Multimedia Extensions */ 27#define X86_FEATURE_FXSR 24 /* FXSAVE and FXRSTOR instructions (fast save and restore */ 28 /* of FPU context), and CR4.OSFXSR available */ 29#define X86_FEATURE_XMM 25 /* Streaming SIMD Extensions */ 30#define X86_FEATURE_XMM2 26 /* Streaming SIMD Extensions-2 */ 31#define X86_FEATURE_SELFSNOOP 27 /* CPU self snoop */ 32#define X86_FEATURE_HT 28 /* Hyper-Threading */ 33#define X86_FEATURE_ACC 29 /* Automatic clock control */ 34#define X86_FEATURE_IA64 30 /* IA-64 processor */ 35 36/* AMD-defined CPU features, CPUID level 0x80000001, word 1 */ 37/* Don't duplicate feature flags which are redundant with Intel! */ 38#define X86_FEATURE_SYSCALL 11 /* SYSCALL/SYSRET */ 39#define X86_FEATURE_MMXEXT 22 /* AMD MMX extensions */ 40#define X86_FEATURE_LM 29 /* Long Mode (x86-64) */ 41#define X86_FEATURE_3DNOWEXT 30 /* AMD 3DNow! extensions */ 42#define X86_FEATURE_3DNOW 31 /* 3DNow! */ 43 44/** x86 CPU information */ 45struct cpuinfo_x86 { 46 /** CPU features */ 47 unsigned int features; 48 /** 64-bit CPU features */ 49 unsigned int amd_features; 50}; 51 52/* 53 * EFLAGS bits 54 */ 55#define X86_EFLAGS_CF 0x00000001 /* Carry Flag */ 56#define X86_EFLAGS_PF 0x00000004 /* Parity Flag */ 57#define X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */ 58#define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */ 59#define X86_EFLAGS_SF 0x00000080 /* Sign Flag */ 60#define X86_EFLAGS_TF 0x00000100 /* Trap Flag */ 61#define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */ 62#define X86_EFLAGS_DF 0x00000400 /* Direction Flag */ 63#define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */ 64#define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */ 65#define X86_EFLAGS_NT 0x00004000 /* Nested Task */ 66#define X86_EFLAGS_RF 0x00010000 /* Resume Flag */ 67#define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */ 68#define X86_EFLAGS_AC 0x00040000 /* Alignment Check */ 69#define X86_EFLAGS_VIF 0x00080000 /* Virtual Interrupt Flag */ 70#define X86_EFLAGS_VIP 0x00100000 /* Virtual Interrupt Pending */ 71#define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */ 72 73/* 74 * Generic CPUID function 75 */ 76static inline __attribute__ (( always_inline )) void 77cpuid ( int op, unsigned int *eax, unsigned int *ebx, 78 unsigned int *ecx, unsigned int *edx ) { 79 __asm__ ( "cpuid" : 80 "=a" ( *eax ), "=b" ( *ebx ), "=c" ( *ecx ), "=d" ( *edx ) 81 : "0" ( op ) ); 82} 83 84extern void get_cpuinfo ( struct cpuinfo_x86 *cpu ); 85 86#endif /* I386_BITS_CPU_H */ 87