18b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch// Copyright 2011 the V8 project authors. All rights reserved. 2b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// Use of this source code is governed by a BSD-style license that can be 3b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// found in the LICENSE file. 4a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 5a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block#ifndef V8_ARM_CONSTANTS_ARM_H_ 6a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block#define V8_ARM_CONSTANTS_ARM_H_ 7a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 8014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch#include <stdint.h> 9014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch 10014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch#include "src/base/logging.h" 11014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch#include "src/base/macros.h" 12014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch#include "src/globals.h" 13014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch 148b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch// ARM EABI is required. 158b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch#if defined(__arm__) && !defined(__ARM_EABI__) 168b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch#error ARM EABI support is required. 17a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block#endif 18a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 191e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blocknamespace v8 { 201e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blocknamespace internal { 21a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 2244f0eee88ff00398ff7f715fab053374d808c90dSteve Block// Constant pool marker. 23b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// Use UDF, the permanently undefined instruction. 24b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst int kConstantPoolMarkerMask = 0xfff000f0; 25b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst int kConstantPoolMarker = 0xe7f000f0; 26b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst int kConstantPoolLengthMaxMask = 0xffff; 27b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochinline int EncodeConstantPoolLength(int length) { 28b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DCHECK((length & kConstantPoolLengthMaxMask) == length); 29b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch return ((length & 0xfff0) << 4) | (length & 0xf); 30b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch} 31b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochinline int DecodeConstantPoolLength(int instr) { 32b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DCHECK((instr & kConstantPoolMarkerMask) == kConstantPoolMarker); 33b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch return ((instr >> 4) & 0xfff0) | (instr & 0xf); 34b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch} 35b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch 36b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// Used in code age prologue - ldr(pc, MemOperand(pc, -4)) 37b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst int kCodeAgeJumpInstruction = 0xe51ff004; 3844f0eee88ff00398ff7f715fab053374d808c90dSteve Block 39a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Number of registers in normal ARM mode. 403ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int kNumRegisters = 16; 41a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 42d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block// VFP support. 433ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int kNumVFPSingleRegisters = 32; 44b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst int kNumVFPDoubleRegisters = 32; 453ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int kNumVFPRegisters = kNumVFPSingleRegisters + kNumVFPDoubleRegisters; 46d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block 47a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// PC is register 15. 483ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int kPCRegister = 15; 493ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int kNoRegister = -1; 50a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 51014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch// Used in embedded constant pool builder - max reach in bits for 52014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch// various load instructions (unsigned) 53014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdochconst int kLdrMaxReachBits = 12; 54014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdochconst int kVldrMaxReachBits = 10; 55014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch 561e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 571e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Conditions. 581e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 59a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Defines constants and accessor classes to assemble, disassemble and 60a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// simulate ARM instructions. 61a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// 62a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Section references in the code refer to the "ARM Architecture Reference 63a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Manual" from July 2005 (available at http://www.arm.com/miscPDFs/14128.pdf) 64a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// 65a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Constants for specific fields are defined in their respective named enums. 66a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// General constants are in an anonymous enum in class Instr. 67a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 68a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Values for the condition field as defined in section A3.2 69a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Blockenum Condition { 701e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kNoCondition = -1, 711e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 721e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block eq = 0 << 28, // Z set Equal. 731e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ne = 1 << 28, // Z clear Not equal. 741e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block cs = 2 << 28, // C set Unsigned higher or same. 751e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block cc = 3 << 28, // C clear Unsigned lower. 761e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block mi = 4 << 28, // N set Negative. 771e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block pl = 5 << 28, // N clear Positive or zero. 781e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block vs = 6 << 28, // V set Overflow. 791e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block vc = 7 << 28, // V clear No overflow. 801e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block hi = 8 << 28, // C set, Z clear Unsigned higher. 811e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ls = 9 << 28, // C clear or Z set Unsigned lower or same. 821e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ge = 10 << 28, // N == V Greater or equal. 831e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block lt = 11 << 28, // N != V Less than. 841e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block gt = 12 << 28, // Z clear, N == V Greater than. 851e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block le = 13 << 28, // Z set or N != V Less then or equal 861e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block al = 14 << 28, // Always. 871e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 881e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kSpecialCondition = 15 << 28, // Special condition (refer to section A3.2.1). 891e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kNumberOfConditions = 16, 901e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 911e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Aliases. 921e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block hs = cs, // C set Unsigned higher or same. 931e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block lo = cc // C clear Unsigned lower. 94a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 95a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 96a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 971e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockinline Condition NegateCondition(Condition cond) { 98b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DCHECK(cond != al); 991e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return static_cast<Condition>(cond ^ ne); 1001e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block} 1011e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1021e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 103b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// Commute a condition such that {a cond b == b cond' a}. 104b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochinline Condition CommuteCondition(Condition cond) { 1051e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block switch (cond) { 1061e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case lo: 1071e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return hi; 1081e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case hi: 1091e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return lo; 1101e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case hs: 1111e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return ls; 1121e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case ls: 1131e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return hs; 1141e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case lt: 1151e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return gt; 1161e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case gt: 1171e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return lt; 1181e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case ge: 1191e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return le; 1201e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case le: 1211e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return ge; 1221e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block default: 1231e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return cond; 124b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch } 1251e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block} 1261e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1271e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1281e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 1291e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instructions encoding. 1301e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1311e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instr is merely used by the Assembler to distinguish 32bit integers 1321e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// representing instructions from usual 32 bit values. 1331e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instruction objects are pointers to 32bit values, and provide methods to 1341e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// access the various ISA fields. 1351e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blocktypedef int32_t Instr; 1361e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1371e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 138a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Opcodes for Data-processing instructions (instructions with a type 0 and 1) 139a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// as defined in section A3.4 140a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Blockenum Opcode { 1411e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block AND = 0 << 21, // Logical AND. 1421e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block EOR = 1 << 21, // Logical Exclusive OR. 1431e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SUB = 2 << 21, // Subtract. 1441e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RSB = 3 << 21, // Reverse Subtract. 1451e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ADD = 4 << 21, // Add. 1461e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ADC = 5 << 21, // Add with Carry. 1471e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SBC = 6 << 21, // Subtract with Carry. 1481e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RSC = 7 << 21, // Reverse Subtract with Carry. 1491e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block TST = 8 << 21, // Test. 1501e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block TEQ = 9 << 21, // Test Equivalence. 1511e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CMP = 10 << 21, // Compare. 1521e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CMN = 11 << 21, // Compare Negated. 1531e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ORR = 12 << 21, // Logical (inclusive) OR. 1541e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block MOV = 13 << 21, // Move. 1551e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block BIC = 14 << 21, // Bit Clear. 1561e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block MVN = 15 << 21 // Move Not. 157a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 158a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 159a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 1606ded16be15dd865a9b21ea304d5273c8be299c87Steve Block// The bits for bit 7-4 for some type 0 miscellaneous instructions. 1616ded16be15dd865a9b21ea304d5273c8be299c87Steve Blockenum MiscInstructionsBits74 { 1626ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // With bits 22-21 01. 1631e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block BX = 1 << 4, 1641e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block BXJ = 2 << 4, 1651e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block BLX = 3 << 4, 1661e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block BKPT = 7 << 4, 167a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 1686ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // With bits 22-21 11. 1691e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CLZ = 1 << 4 1701e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 1711e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1721e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1731e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instruction encoding bits and masks. 1741e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum { 175958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier H = 1 << 5, // Halfword (or byte). 176958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier S6 = 1 << 6, // Signed (or unsigned). 177958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier L = 1 << 20, // Load (or store). 178958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier S = 1 << 20, // Set condition code (or leave unchanged). 179958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier W = 1 << 21, // Writeback base register (or leave unchanged). 180958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier A = 1 << 21, // Accumulate in multiply instruction (or not). 181958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier B = 1 << 22, // Unsigned byte (or word). 182958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier N = 1 << 22, // Long (or short). 183958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier U = 1 << 23, // Positive (or negative) offset/index. 184958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier P = 1 << 24, // Offset/pre-indexed addressing (or post-indexed addressing). 185958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier I = 1 << 25, // Immediate shifter operand (or not). 186014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch B0 = 1 << 0, 187958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier B4 = 1 << 4, 188958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier B5 = 1 << 5, 189958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier B6 = 1 << 6, 190958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier B7 = 1 << 7, 191958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier B8 = 1 << 8, 192958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier B9 = 1 << 9, 19362ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch B10 = 1 << 10, 1941e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B12 = 1 << 12, 1951e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B16 = 1 << 16, 196958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier B17 = 1 << 17, 1971e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B18 = 1 << 18, 1981e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B19 = 1 << 19, 1991e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B20 = 1 << 20, 2001e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B21 = 1 << 21, 2011e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B22 = 1 << 22, 2021e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B23 = 1 << 23, 2031e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B24 = 1 << 24, 2041e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B25 = 1 << 25, 2051e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B26 = 1 << 26, 2061e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B27 = 1 << 27, 2071e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B28 = 1 << 28, 2081e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2091e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Instruction bit masks. 210958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier kCondMask = 15 << 28, 211958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier kALUMask = 0x6f << 21, 212958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier kRdMask = 15 << 12, // In str instruction. 2131e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kCoprocessorMask = 15 << 8, 2141e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kOpCodeMask = 15 << 21, // In data-processing instructions. 215958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier kImm24Mask = (1 << 24) - 1, 216958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier kImm16Mask = (1 << 16) - 1, 217958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier kImm8Mask = (1 << 8) - 1, 218958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier kOff12Mask = (1 << 12) - 1, 219958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier kOff8Mask = (1 << 8) - 1 2201e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 2211e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 222109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdochenum BarrierOption { 223109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch OSHLD = 0x1, 224109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch OSHST = 0x2, 225109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch OSH = 0x3, 226109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch NSHLD = 0x5, 227109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch NSHST = 0x6, 228109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch NSH = 0x7, 229109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch ISHLD = 0x9, 230109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch ISHST = 0xa, 231109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch ISH = 0xb, 232109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch LD = 0xd, 233109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch ST = 0xe, 234109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch SY = 0xf, 235109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch}; 236109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch 237109988c7ccb6f3fd1a58574fa3dfb88beaef6632Ben Murdoch 2381e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 2391e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Addressing modes and instruction variants. 2401e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2411e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Condition code updating mode. 2421e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum SBit { 2431e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SetCC = 1 << 20, // Set condition code. 2441e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block LeaveCC = 0 << 20 // Leave condition code unchanged. 2451e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 2461e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2471e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2481e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Status register selection. 2491e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum SRegister { 2501e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CPSR = 0 << 22, 2511e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SPSR = 1 << 22 252a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 253a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 254a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 255a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Shifter types for Data-processing operands as defined in section A5.1.2. 2561e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum ShiftOp { 2571e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block LSL = 0 << 5, // Logical shift left. 2581e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block LSR = 1 << 5, // Logical shift right. 2591e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ASR = 2 << 5, // Arithmetic shift right. 2601e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ROR = 3 << 5, // Rotate right. 2611e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2621e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // RRX is encoded as ROR with shift_imm == 0. 2631e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Use a special code to make the distinction. The RRX ShiftOp is only used 2641e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // as an argument, and will never actually be encoded. The Assembler will 2651e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // detect it and emit the correct ROR shift operand with shift_imm == 0. 2661e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RRX = -1, 2671e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kNumberOfShifts = 4 2681e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 2691e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2701e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2711e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Status register fields. 2721e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum SRegisterField { 2731e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CPSR_c = CPSR | 1 << 16, 2741e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CPSR_x = CPSR | 1 << 17, 2751e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CPSR_s = CPSR | 1 << 18, 2761e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CPSR_f = CPSR | 1 << 19, 2771e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SPSR_c = SPSR | 1 << 16, 2781e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SPSR_x = SPSR | 1 << 17, 2791e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SPSR_s = SPSR | 1 << 18, 2801e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SPSR_f = SPSR | 1 << 19 2811e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 2821e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2831e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Status register field mask (or'ed SRegisterField enum values). 2841e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blocktypedef uint32_t SRegisterFieldMask; 2851e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2861e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2871e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Memory operand addressing mode. 2881e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum AddrMode { 2891e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Bit encoding P U W. 2901e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block Offset = (8|4|0) << 21, // Offset (without writeback to base). 2911e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block PreIndex = (8|4|1) << 21, // Pre-indexed addressing with writeback. 2921e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block PostIndex = (0|4|0) << 21, // Post-indexed addressing with writeback. 2931e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block NegOffset = (8|0|0) << 21, // Negative offset (without writeback to base). 2941e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block NegPreIndex = (8|0|1) << 21, // Negative pre-indexed with writeback. 2951e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block NegPostIndex = (0|0|0) << 21 // Negative post-indexed with writeback. 2961e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 2971e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2981e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2991e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Load/store multiple addressing mode. 3001e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum BlockAddrMode { 3011e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Bit encoding P U W . 3021e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block da = (0|0|0) << 21, // Decrement after. 3031e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ia = (0|4|0) << 21, // Increment after. 3041e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block db = (8|0|0) << 21, // Decrement before. 3051e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ib = (8|4|0) << 21, // Increment before. 3061e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block da_w = (0|0|1) << 21, // Decrement after with writeback to base. 3071e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ia_w = (0|4|1) << 21, // Increment after with writeback to base. 3081e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block db_w = (8|0|1) << 21, // Decrement before with writeback to base. 3091e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ib_w = (8|4|1) << 21, // Increment before with writeback to base. 3101e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 3111e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Alias modes for comparison when writeback does not matter. 3121e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block da_x = (0|0|0) << 21, // Decrement after. 3131e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ia_x = (0|4|0) << 21, // Increment after. 3141e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block db_x = (8|0|0) << 21, // Decrement before. 3158b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch ib_x = (8|4|0) << 21, // Increment before. 3168b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch 3178b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch kBlockAddrModeMask = (8|4|1) << 21 318a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 319a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 320a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 3211e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Coprocessor load/store operand size. 3221e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum LFlag { 3231e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block Long = 1 << 22, // Long load/store coprocessor. 3241e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block Short = 0 << 22 // Short load/store coprocessor. 3251e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 3261e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 3271e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 328b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// NEON data type 329b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochenum NeonDataType { 33062ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch NeonS8 = 0, 33162ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch NeonS16 = 1, 33262ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch NeonS32 = 2, 33362ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch // Gap to make it easier to extract U and size. 33462ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch NeonU8 = 4, 33562ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch NeonU16 = 5, 33662ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch NeonU32 = 6 337b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch}; 338b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch 33962ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdochinline int NeonU(NeonDataType dt) { return static_cast<int>(dt) >> 2; } 34062ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdochinline int NeonSz(NeonDataType dt) { return static_cast<int>(dt) & 0x3; } 34162ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch 342b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochenum NeonListType { 343b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch nlt_1 = 0x7, 344b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch nlt_2 = 0xA, 345b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch nlt_3 = 0x6, 346b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch nlt_4 = 0x2 347b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch}; 348b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch 349b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochenum NeonSize { 350b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch Neon8 = 0x0, 351b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch Neon16 = 0x1, 352b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch Neon32 = 0x2, 353b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch Neon64 = 0x3 354b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch}; 355b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch 3561e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 3571e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Supervisor Call (svc) specific support. 3581e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 359a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Special Software Interrupt codes when used in the presence of the ARM 360a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// simulator. 3613e5fa29ddb82551500b118e9bf37af3966277b70Teng-Hui Zhu// svc (formerly swi) provides a 24bit immediate value. Use bits 22:0 for 3623e5fa29ddb82551500b118e9bf37af3966277b70Teng-Hui Zhu// standard SoftwareInterrupCode. Bit 23 is reserved for the stop feature. 363a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Blockenum SoftwareInterruptCodes { 364a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // transition to C code 365958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier kCallRtRedirected = 0x10, 366a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // break point 367958fae7ec3f466955f8e5b50fa5b8d38b9e91675Emily Bernier kBreakpoint = 0x20, 3683e5fa29ddb82551500b118e9bf37af3966277b70Teng-Hui Zhu // stop 3691e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kStopCode = 1 << 23 370a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 3713ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kStopCodeMask = kStopCode - 1; 3723ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kMaxStopCode = kStopCode - 1; 3733ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int32_t kDefaultStopCode = -1; 374a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 375a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 37680d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen// Type of VFP register. Determines register encoding. 37780d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsenenum VFPRegPrecision { 37880d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen kSinglePrecision = 0, 37962ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch kDoublePrecision = 1, 38062ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch kSimd128Precision = 2 38180d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen}; 38280d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen 3831e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// VFP FPSCR constants. 3841e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum VFPConversionMode { 3851e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kFPSCRRounding = 0, 3861e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kDefaultRoundToZero = 1 3871e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 3881e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 389e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch// This mask does not include the "inexact" or "input denormal" cumulative 390e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch// exceptions flags, because we usually don't want to check for it. 3913ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPExceptionMask = 0xf; 3923ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPInvalidOpExceptionBit = 1 << 0; 3933ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPOverflowExceptionBit = 1 << 2; 3943ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPUnderflowExceptionBit = 1 << 3; 3953ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPInexactExceptionBit = 1 << 4; 3963ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPFlushToZeroMask = 1 << 24; 397b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst uint32_t kVFPDefaultNaNModeControlBit = 1 << 25; 3981e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 3993ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPNConditionFlagBit = 1 << 31; 4003ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPZConditionFlagBit = 1 << 30; 4013ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPCConditionFlagBit = 1 << 29; 4023ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPVConditionFlagBit = 1 << 28; 4031e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4041e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 40590bac256d9f48d4ee52d0e08bf0e5cad57b3c51cRussell Brenner// VFP rounding modes. See ARM DDI 0406B Page A2-29. 4061e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum VFPRoundingMode { 4071e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RN = 0 << 22, // Round to Nearest. 4081e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RP = 1 << 22, // Round towards Plus Infinity. 4091e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RM = 2 << 22, // Round towards Minus Infinity. 4101e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RZ = 3 << 22, // Round towards zero. 4111e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4121e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Aliases. 4131e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kRoundToNearest = RN, 4141e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kRoundToPlusInf = RP, 4151e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kRoundToMinusInf = RM, 4161e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kRoundToZero = RZ 41790bac256d9f48d4ee52d0e08bf0e5cad57b3c51cRussell Brenner}; 41880d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen 4193ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPRoundingModeMask = 3 << 22; 4201e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 421e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdochenum CheckForInexactConversion { 422e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch kCheckForInexactConversion, 423e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch kDontCheckForInexactConversion 424e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch}; 425e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch 4261e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 4271e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Hints. 4281e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4291e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Branch hints are not used on the ARM. They are defined so that they can 4301e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// appear in shared function signatures, but will be ignored in ARM 4311e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// implementations. 4321e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum Hint { no_hint }; 4331e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4341e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Hints are not used on the arm. Negating is trivial. 4351e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockinline Hint NegateHint(Hint ignored) { return no_hint; } 4361e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4371e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4381e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 4391e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instruction abstraction. 4401e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4411e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// The class Instruction enables access to individual fields defined in the ARM 442a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// architecture instruction set encoding as described in figure A3-1. 4431e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Note that the Assembler uses typedef int32_t Instr. 444a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// 445a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Example: Test whether the instruction at ptr does set the condition code 446a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// bits. 447a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// 448a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// bool InstructionSetsConditionCodes(byte* ptr) { 4491e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instruction* instr = Instruction::At(ptr); 4501e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// int type = instr->TypeValue(); 451a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// return ((type == 0) || (type == 1)) && instr->HasS(); 452a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// } 453a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// 4541e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockclass Instruction { 455a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block public: 456a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block enum { 457a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block kInstrSize = 4, 458a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block kInstrSizeLog2 = 2, 459a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block kPCReadOffset = 8 460a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block }; 461a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 4621e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Helper macro to define static accessors. 4631e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // We use the cast to char* trick to bypass the strict anti-aliasing rules. 4641e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block #define DECLARE_STATIC_TYPED_ACCESSOR(return_type, Name) \ 4651e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block static inline return_type Name(Instr instr) { \ 4661e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block char* temp = reinterpret_cast<char*>(&instr); \ 4671e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return reinterpret_cast<Instruction*>(temp)->Name(); \ 4681e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 4691e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4701e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block #define DECLARE_STATIC_ACCESSOR(Name) DECLARE_STATIC_TYPED_ACCESSOR(int, Name) 4711e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 472a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Get the raw instruction bits. 4731e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline Instr InstructionBits() const { 4741e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return *reinterpret_cast<const Instr*>(this); 475a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 476a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 477a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Set the raw instruction bits to value. 4781e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline void SetInstructionBits(Instr value) { 4791e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block *reinterpret_cast<Instr*>(this) = value; 480a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 481a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 482f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch // Extract a single bit from the instruction bits and return it as bit 0 in 483f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch // the result. 484a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block inline int Bit(int nr) const { 485a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block return (InstructionBits() >> nr) & 1; 486a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 487a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 488f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch // Extract a bit field <hi:lo> from the instruction bits and return it in the 489f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch // least-significant bits of the result. 490a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block inline int Bits(int hi, int lo) const { 491a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1); 492a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 493a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 494f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch // Read a bit field <hi:lo>, leaving its position unchanged in the result. 4951e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int BitField(int hi, int lo) const { 4961e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return InstructionBits() & (((2 << (hi - lo)) - 1) << lo); 4971e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 4981e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4991e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Static support. 5001e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 501f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch // Extract a single bit from the instruction bits and return it as bit 0 in 502f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch // the result. 5031e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block static inline int Bit(Instr instr, int nr) { 5041e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return (instr >> nr) & 1; 5051e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 5061e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 507f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch // Extract a bit field <hi:lo> from the instruction bits and return it in the 508f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch // least-significant bits of the result. 5091e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block static inline int Bits(Instr instr, int hi, int lo) { 5101e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return (instr >> lo) & ((2 << (hi - lo)) - 1); 5111e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 5121e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 513f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch // Read a bit field <hi:lo>, leaving its position unchanged in the result. 5141e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block static inline int BitField(Instr instr, int hi, int lo) { 5151e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return instr & (((2 << (hi - lo)) - 1) << lo); 5161e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 5171e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 518a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Accessors for the different named fields used in the ARM encoding. 519a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // The naming of these accessor corresponds to figure A3-1. 5201e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // 5211e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Two kind of accessors are declared: 5223ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdoch // - <Name>Field() will return the raw field, i.e. the field's bits at their 5231e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // original place in the instruction encoding. 5243ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdoch // e.g. if instr is the 'addgt r0, r1, r2' instruction, encoded as 5253ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdoch // 0xC0810002 ConditionField(instr) will return 0xC0000000. 5261e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // - <Name>Value() will return the field value, shifted back to bit 0. 5273ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdoch // e.g. if instr is the 'addgt r0, r1, r2' instruction, encoded as 5283ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdoch // 0xC0810002 ConditionField(instr) will return 0xC. 5291e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 5301e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 531a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Generally applicable fields 532f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch inline int ConditionValue() const { return Bits(31, 28); } 5331e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline Condition ConditionField() const { 5341e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return static_cast<Condition>(BitField(31, 28)); 5351e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 536f3b273f5e6ffd2f6ba1c18a27a17db41dfb113c3Ben Murdoch DECLARE_STATIC_TYPED_ACCESSOR(int, ConditionValue); 5371e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block DECLARE_STATIC_TYPED_ACCESSOR(Condition, ConditionField); 5381e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 5391e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int TypeValue() const { return Bits(27, 25); } 540b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch inline int SpecialValue() const { return Bits(27, 23); } 541a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 5421e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RnValue() const { return Bits(19, 16); } 5431e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block DECLARE_STATIC_ACCESSOR(RnValue); 5441e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RdValue() const { return Bits(15, 12); } 5451e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block DECLARE_STATIC_ACCESSOR(RdValue); 546a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 5471e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int CoprocessorValue() const { return Bits(11, 8); } 548d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block // Support for VFP. 549d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block // Vn(19-16) | Vd(15-12) | Vm(3-0) 5501e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VnValue() const { return Bits(19, 16); } 5511e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VmValue() const { return Bits(3, 0); } 5521e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VdValue() const { return Bits(15, 12); } 5531e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int NValue() const { return Bit(7); } 5541e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int MValue() const { return Bit(5); } 5551e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int DValue() const { return Bit(22); } 5561e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RtValue() const { return Bits(15, 12); } 5571e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int PValue() const { return Bit(24); } 5581e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int UValue() const { return Bit(23); } 5591e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Opc1Value() const { return (Bit(23) << 2) | Bits(21, 20); } 5601e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Opc2Value() const { return Bits(19, 16); } 5611e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Opc3Value() const { return Bits(7, 6); } 5621e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int SzValue() const { return Bit(8); } 5631e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VLValue() const { return Bit(20); } 5641e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VCValue() const { return Bit(8); } 5651e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VAValue() const { return Bits(23, 21); } 5661e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VBValue() const { return Bits(6, 5); } 5671e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VFPNRegValue(VFPRegPrecision pre) { 5681e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return VFPGlueRegValue(pre, 16, 7); 56980d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen } 5701e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VFPMRegValue(VFPRegPrecision pre) { 5711e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return VFPGlueRegValue(pre, 0, 5); 57280d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen } 5731e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VFPDRegValue(VFPRegPrecision pre) { 5741e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return VFPGlueRegValue(pre, 12, 22); 57580d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen } 576d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block 577a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Fields used in Data processing instructions 5781e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int OpcodeValue() const { 579a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block return static_cast<Opcode>(Bits(24, 21)); 580a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 5811e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline Opcode OpcodeField() const { 5821e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return static_cast<Opcode>(BitField(24, 21)); 5831e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 5841e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int SValue() const { return Bit(20); } 585a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // with register 5861e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RmValue() const { return Bits(3, 0); } 5871e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block DECLARE_STATIC_ACCESSOR(RmValue); 5881e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int ShiftValue() const { return static_cast<ShiftOp>(Bits(6, 5)); } 5891e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline ShiftOp ShiftField() const { 5901e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return static_cast<ShiftOp>(BitField(6, 5)); 5911e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 5921e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RegShiftValue() const { return Bit(4); } 5931e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RsValue() const { return Bits(11, 8); } 5941e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int ShiftAmountValue() const { return Bits(11, 7); } 595a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // with immediate 5961e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RotateValue() const { return Bits(11, 8); } 597b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DECLARE_STATIC_ACCESSOR(RotateValue); 5981e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Immed8Value() const { return Bits(7, 0); } 599b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DECLARE_STATIC_ACCESSOR(Immed8Value); 6001e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Immed4Value() const { return Bits(19, 16); } 6011e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int ImmedMovwMovtValue() const { 6021e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return Immed4Value() << 12 | Offset12Value(); } 603b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DECLARE_STATIC_ACCESSOR(ImmedMovwMovtValue); 604a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 605a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Fields used in Load/Store instructions 6061e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int PUValue() const { return Bits(24, 23); } 6071e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int PUField() const { return BitField(24, 23); } 6081e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int BValue() const { return Bit(22); } 6091e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int WValue() const { return Bit(21); } 6101e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int LValue() const { return Bit(20); } 611a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // with register uses same fields as Data processing instructions above 612a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // with immediate 6131e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Offset12Value() const { return Bits(11, 0); } 614a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // multiple 6151e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RlistValue() const { return Bits(15, 0); } 616a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // extra loads and stores 6171e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int SignValue() const { return Bit(6); } 6181e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int HValue() const { return Bit(5); } 6191e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int ImmedHValue() const { return Bits(11, 8); } 6201e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int ImmedLValue() const { return Bits(3, 0); } 621a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 622a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Fields used in Branch instructions 6231e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int LinkValue() const { return Bit(24); } 6241e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int SImmed24Value() const { return ((InstructionBits() << 8) >> 8); } 625a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 626a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Fields used in Software interrupt instructions 6271e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline SoftwareInterruptCodes SvcValue() const { 628a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block return static_cast<SoftwareInterruptCodes>(Bits(23, 0)); 629a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 630a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 631a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Test for special encodings of type 0 instructions (extra loads and stores, 632a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // as well as multiplications). 633a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block inline bool IsSpecialType0() const { return (Bit(7) == 1) && (Bit(4) == 1); } 634a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 6356ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // Test for miscellaneous instructions encodings of type 0 instructions. 6366ded16be15dd865a9b21ea304d5273c8be299c87Steve Block inline bool IsMiscType0() const { return (Bit(24) == 1) 6376ded16be15dd865a9b21ea304d5273c8be299c87Steve Block && (Bit(23) == 0) 6386ded16be15dd865a9b21ea304d5273c8be299c87Steve Block && (Bit(20) == 0) 6396ded16be15dd865a9b21ea304d5273c8be299c87Steve Block && ((Bit(7) == 0)); } 6406ded16be15dd865a9b21ea304d5273c8be299c87Steve Block 641b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch // Test for a nop instruction, which falls under type 1. 642b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch inline bool IsNopType1() const { return Bits(24, 0) == 0x0120F000; } 643b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch 6441e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Test for a stop instruction. 6451e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool IsStop() const { 6461e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return (TypeValue() == 7) && (Bit(24) == 1) && (SvcValue() >= kStopCode); 6471e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 6481e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 649a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Special accessors that test for existence of a value. 6501e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasS() const { return SValue() == 1; } 6511e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasB() const { return BValue() == 1; } 6521e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasW() const { return WValue() == 1; } 6531e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasL() const { return LValue() == 1; } 6541e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasU() const { return UValue() == 1; } 6551e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasSign() const { return SignValue() == 1; } 6561e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasH() const { return HValue() == 1; } 6571e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasLink() const { return LinkValue() == 1; } 658a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 6593b9bc31999c9787eb726ecdbfd5796bfdec32a18Ben Murdoch // Decode the double immediate from a vmov instruction. 6603bec4d28b1f388dbc06a9c4276e1a03e86c52b04Ben Murdoch double DoubleImmedVmov() const; 6613bec4d28b1f388dbc06a9c4276e1a03e86c52b04Ben Murdoch 662a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Instructions are read of out a code stream. The only way to get a 663a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // reference to an instruction is to convert a pointer. There is no way 6641e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // to allocate or create instances of class Instruction. 6651e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Use the At(pc) function to create references to Instruction. 6661e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block static Instruction* At(byte* pc) { 6671e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return reinterpret_cast<Instruction*>(pc); 6681e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 6691e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 670a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 671a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block private: 67262ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch // Join split register codes, depending on register precision. 67380d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen // four_bit is the position of the least-significant bit of the four 67480d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen // bit specifier. one_bit is the position of the additional single bit 67580d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen // specifier. 6761e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VFPGlueRegValue(VFPRegPrecision pre, int four_bit, int one_bit) { 67780d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen if (pre == kSinglePrecision) { 67880d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen return (Bits(four_bit + 3, four_bit) << 1) | Bit(one_bit); 67962ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch } else { 68062ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch int reg_num = (Bit(one_bit) << 4) | Bits(four_bit + 3, four_bit); 68162ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch if (pre == kDoublePrecision) { 68262ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch return reg_num; 68362ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch } 68462ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch DCHECK_EQ(kSimd128Precision, pre); 68562ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch DCHECK_EQ(reg_num & 1, 0); 68662ed631aa0ff23db68a47fd423efa9c019ff2c9eBen Murdoch return reg_num / 2; 68780d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen } 68880d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen } 68980d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen 6901e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // We need to prevent the creation of instances of class Instruction. 6911e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block DISALLOW_IMPLICIT_CONSTRUCTORS(Instruction); 692a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 693a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 694a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 695a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Helper functions for converting between register numbers and names. 696a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Blockclass Registers { 697a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block public: 698a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Return the name of the register. 699a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block static const char* Name(int reg); 700a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 701a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Lookup the register number for the name provided. 702a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block static int Number(const char* name); 703a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 704a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block struct RegisterAlias { 705a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block int reg; 706d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block const char* name; 707a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block }; 708a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 709a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block private: 710a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block static const char* names_[kNumRegisters]; 711a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block static const RegisterAlias aliases_[]; 712a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 713a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 714d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block// Helper functions for converting between VFP register numbers and names. 715d0582a6c46733687d045e4188a1bcd0123c758a1Steve Blockclass VFPRegisters { 716d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block public: 717d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block // Return the name of the register. 7186ded16be15dd865a9b21ea304d5273c8be299c87Steve Block static const char* Name(int reg, bool is_double); 7196ded16be15dd865a9b21ea304d5273c8be299c87Steve Block 7206ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // Lookup the register number for the name provided. 7216ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // Set flag pointed by is_double to true if register 7226ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // is double-precision. 7236ded16be15dd865a9b21ea304d5273c8be299c87Steve Block static int Number(const char* name, bool* is_double); 724d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block 725d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block private: 726d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block static const char* names_[kNumVFPRegisters]; 727d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block}; 728a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 729a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 730014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch} // namespace internal 731014dc512cdd3e367bee49a713fdc5ed92584a3e5Ben Murdoch} // namespace v8 732a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 733a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block#endif // V8_ARM_CONSTANTS_ARM_H_ 734