assembler-x64-inl.h revision 7f4d5bd8c03935e2c0cd412e561b8fc5a6a880ae
1// Copyright 2009 the V8 project authors. All rights reserved. 2// Redistribution and use in source and binary forms, with or without 3// modification, are permitted provided that the following conditions are 4// met: 5// 6// * Redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer. 8// * Redistributions in binary form must reproduce the above 9// copyright notice, this list of conditions and the following 10// disclaimer in the documentation and/or other materials provided 11// with the distribution. 12// * Neither the name of Google Inc. nor the names of its 13// contributors may be used to endorse or promote products derived 14// from this software without specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 28#ifndef V8_X64_ASSEMBLER_X64_INL_H_ 29#define V8_X64_ASSEMBLER_X64_INL_H_ 30 31#include "cpu.h" 32#include "debug.h" 33#include "memory.h" 34 35namespace v8 { 36namespace internal { 37 38inline Condition NegateCondition(Condition cc) { 39 return static_cast<Condition>(cc ^ 1); 40} 41 42 43// ----------------------------------------------------------------------------- 44// Implementation of Assembler 45 46 47 48void Assembler::emitl(uint32_t x) { 49 Memory::uint32_at(pc_) = x; 50 pc_ += sizeof(uint32_t); 51} 52 53 54void Assembler::emitq(uint64_t x, RelocInfo::Mode rmode) { 55 Memory::uint64_at(pc_) = x; 56 if (rmode != RelocInfo::NONE) { 57 RecordRelocInfo(rmode, x); 58 } 59 pc_ += sizeof(uint64_t); 60} 61 62 63void Assembler::emitw(uint16_t x) { 64 Memory::uint16_at(pc_) = x; 65 pc_ += sizeof(uint16_t); 66} 67 68 69void Assembler::emit_code_target(Handle<Code> target, RelocInfo::Mode rmode) { 70 ASSERT(RelocInfo::IsCodeTarget(rmode)); 71 RecordRelocInfo(rmode); 72 int current = code_targets_.length(); 73 if (current > 0 && code_targets_.last().is_identical_to(target)) { 74 // Optimization if we keep jumping to the same code target. 75 emitl(current - 1); 76 } else { 77 code_targets_.Add(target); 78 emitl(current); 79 } 80} 81 82 83void Assembler::emit_rex_64(Register reg, Register rm_reg) { 84 emit(0x48 | reg.high_bit() << 2 | rm_reg.high_bit()); 85} 86 87 88void Assembler::emit_rex_64(XMMRegister reg, Register rm_reg) { 89 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3); 90} 91 92 93void Assembler::emit_rex_64(Register reg, XMMRegister rm_reg) { 94 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3); 95} 96 97 98void Assembler::emit_rex_64(Register reg, const Operand& op) { 99 emit(0x48 | reg.high_bit() << 2 | op.rex_); 100} 101 102 103void Assembler::emit_rex_64(XMMRegister reg, const Operand& op) { 104 emit(0x48 | (reg.code() & 0x8) >> 1 | op.rex_); 105} 106 107 108void Assembler::emit_rex_64(Register rm_reg) { 109 ASSERT_EQ(rm_reg.code() & 0xf, rm_reg.code()); 110 emit(0x48 | rm_reg.high_bit()); 111} 112 113 114void Assembler::emit_rex_64(const Operand& op) { 115 emit(0x48 | op.rex_); 116} 117 118 119void Assembler::emit_rex_32(Register reg, Register rm_reg) { 120 emit(0x40 | reg.high_bit() << 2 | rm_reg.high_bit()); 121} 122 123 124void Assembler::emit_rex_32(Register reg, const Operand& op) { 125 emit(0x40 | reg.high_bit() << 2 | op.rex_); 126} 127 128 129void Assembler::emit_rex_32(Register rm_reg) { 130 emit(0x40 | rm_reg.high_bit()); 131} 132 133 134void Assembler::emit_rex_32(const Operand& op) { 135 emit(0x40 | op.rex_); 136} 137 138 139void Assembler::emit_optional_rex_32(Register reg, Register rm_reg) { 140 byte rex_bits = reg.high_bit() << 2 | rm_reg.high_bit(); 141 if (rex_bits != 0) emit(0x40 | rex_bits); 142} 143 144 145void Assembler::emit_optional_rex_32(Register reg, const Operand& op) { 146 byte rex_bits = reg.high_bit() << 2 | op.rex_; 147 if (rex_bits != 0) emit(0x40 | rex_bits); 148} 149 150 151void Assembler::emit_optional_rex_32(XMMRegister reg, const Operand& op) { 152 byte rex_bits = (reg.code() & 0x8) >> 1 | op.rex_; 153 if (rex_bits != 0) emit(0x40 | rex_bits); 154} 155 156 157void Assembler::emit_optional_rex_32(XMMRegister reg, XMMRegister base) { 158 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3; 159 if (rex_bits != 0) emit(0x40 | rex_bits); 160} 161 162 163void Assembler::emit_optional_rex_32(XMMRegister reg, Register base) { 164 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3; 165 if (rex_bits != 0) emit(0x40 | rex_bits); 166} 167 168 169void Assembler::emit_optional_rex_32(Register reg, XMMRegister base) { 170 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3; 171 if (rex_bits != 0) emit(0x40 | rex_bits); 172} 173 174 175void Assembler::emit_optional_rex_32(Register rm_reg) { 176 if (rm_reg.high_bit()) emit(0x41); 177} 178 179 180void Assembler::emit_optional_rex_32(const Operand& op) { 181 if (op.rex_ != 0) emit(0x40 | op.rex_); 182} 183 184 185Address Assembler::target_address_at(Address pc) { 186 return Memory::int32_at(pc) + pc + 4; 187} 188 189 190void Assembler::set_target_address_at(Address pc, Address target) { 191 Memory::int32_at(pc) = static_cast<int32_t>(target - pc - 4); 192 CPU::FlushICache(pc, sizeof(int32_t)); 193} 194 195Handle<Object> Assembler::code_target_object_handle_at(Address pc) { 196 return code_targets_[Memory::int32_at(pc)]; 197} 198 199// ----------------------------------------------------------------------------- 200// Implementation of RelocInfo 201 202// The modes possibly affected by apply must be in kApplyMask. 203void RelocInfo::apply(intptr_t delta) { 204 if (IsInternalReference(rmode_)) { 205 // absolute code pointer inside code object moves with the code object. 206 Memory::Address_at(pc_) += static_cast<int32_t>(delta); 207 } else if (IsCodeTarget(rmode_)) { 208 Memory::int32_at(pc_) -= static_cast<int32_t>(delta); 209 } else if (rmode_ == JS_RETURN && IsPatchedReturnSequence()) { 210 // Special handling of js_return when a break point is set (call 211 // instruction has been inserted). 212 Memory::int32_at(pc_ + 1) -= static_cast<int32_t>(delta); // relocate entry 213 } else if (rmode_ == DEBUG_BREAK_SLOT && IsPatchedDebugBreakSlotSequence()) { 214 // Special handling of debug break slot when a break point is set (call 215 // instruction has been inserted). 216 Memory::int32_at(pc_ + 1) -= static_cast<int32_t>(delta); // relocate entry 217 } 218} 219 220 221Address RelocInfo::target_address() { 222 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); 223 if (IsCodeTarget(rmode_)) { 224 return Assembler::target_address_at(pc_); 225 } else { 226 return Memory::Address_at(pc_); 227 } 228} 229 230 231Address RelocInfo::target_address_address() { 232 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); 233 return reinterpret_cast<Address>(pc_); 234} 235 236 237int RelocInfo::target_address_size() { 238 if (IsCodedSpecially()) { 239 return Assembler::kCallTargetSize; 240 } else { 241 return Assembler::kExternalTargetSize; 242 } 243} 244 245 246void RelocInfo::set_target_address(Address target) { 247 ASSERT(IsCodeTarget(rmode_) || rmode_ == RUNTIME_ENTRY); 248 if (IsCodeTarget(rmode_)) { 249 Assembler::set_target_address_at(pc_, target); 250 } else { 251 Memory::Address_at(pc_) = target; 252 } 253} 254 255 256Object* RelocInfo::target_object() { 257 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 258 return Memory::Object_at(pc_); 259} 260 261 262Handle<Object> RelocInfo::target_object_handle(Assembler *origin) { 263 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 264 if (rmode_ == EMBEDDED_OBJECT) { 265 return Memory::Object_Handle_at(pc_); 266 } else { 267 return origin->code_target_object_handle_at(pc_); 268 } 269} 270 271 272Object** RelocInfo::target_object_address() { 273 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 274 return reinterpret_cast<Object**>(pc_); 275} 276 277 278Address* RelocInfo::target_reference_address() { 279 ASSERT(rmode_ == RelocInfo::EXTERNAL_REFERENCE); 280 return reinterpret_cast<Address*>(pc_); 281} 282 283 284void RelocInfo::set_target_object(Object* target) { 285 ASSERT(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT); 286 *reinterpret_cast<Object**>(pc_) = target; 287} 288 289 290bool RelocInfo::IsPatchedReturnSequence() { 291 // The recognized call sequence is: 292 // movq(kScratchRegister, immediate64); call(kScratchRegister); 293 // It only needs to be distinguished from a return sequence 294 // movq(rsp, rbp); pop(rbp); ret(n); int3 *6 295 // The 11th byte is int3 (0xCC) in the return sequence and 296 // REX.WB (0x48+register bit) for the call sequence. 297#ifdef ENABLE_DEBUGGER_SUPPORT 298 return pc_[10] != 0xCC; 299#else 300 return false; 301#endif 302} 303 304 305bool RelocInfo::IsPatchedDebugBreakSlotSequence() { 306 return !Assembler::IsNop(pc()); 307} 308 309 310Address RelocInfo::call_address() { 311 ASSERT(IsPatchedReturnSequence()); 312 return Memory::Address_at( 313 pc_ + Assembler::kRealPatchReturnSequenceAddressOffset); 314} 315 316 317void RelocInfo::set_call_address(Address target) { 318 ASSERT(IsPatchedReturnSequence()); 319 Memory::Address_at(pc_ + Assembler::kRealPatchReturnSequenceAddressOffset) = 320 target; 321} 322 323 324Object* RelocInfo::call_object() { 325 ASSERT(IsPatchedReturnSequence()); 326 return *call_object_address(); 327} 328 329 330void RelocInfo::set_call_object(Object* target) { 331 ASSERT(IsPatchedReturnSequence()); 332 *call_object_address() = target; 333} 334 335 336Object** RelocInfo::call_object_address() { 337 ASSERT(IsPatchedReturnSequence()); 338 return reinterpret_cast<Object**>( 339 pc_ + Assembler::kPatchReturnSequenceAddressOffset); 340} 341 342 343void RelocInfo::Visit(ObjectVisitor* visitor) { 344 RelocInfo::Mode mode = rmode(); 345 if (mode == RelocInfo::EMBEDDED_OBJECT) { 346 visitor->VisitPointer(target_object_address()); 347 } else if (RelocInfo::IsCodeTarget(mode)) { 348 visitor->VisitCodeTarget(this); 349 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) { 350 visitor->VisitExternalReference(target_reference_address()); 351#ifdef ENABLE_DEBUGGER_SUPPORT 352 } else if (Debug::has_break_points() && 353 ((RelocInfo::IsJSReturn(mode) && 354 IsPatchedReturnSequence()) || 355 (RelocInfo::IsDebugBreakSlot(mode) && 356 IsPatchedDebugBreakSlotSequence()))) { 357 visitor->VisitDebugTarget(this); 358#endif 359 } else if (mode == RelocInfo::RUNTIME_ENTRY) { 360 visitor->VisitRuntimeEntry(this); 361 } 362} 363 364 365// ----------------------------------------------------------------------------- 366// Implementation of Operand 367 368void Operand::set_modrm(int mod, Register rm_reg) { 369 ASSERT(is_uint2(mod)); 370 buf_[0] = mod << 6 | rm_reg.low_bits(); 371 // Set REX.B to the high bit of rm.code(). 372 rex_ |= rm_reg.high_bit(); 373} 374 375 376void Operand::set_sib(ScaleFactor scale, Register index, Register base) { 377 ASSERT(len_ == 1); 378 ASSERT(is_uint2(scale)); 379 // Use SIB with no index register only for base rsp or r12. Otherwise we 380 // would skip the SIB byte entirely. 381 ASSERT(!index.is(rsp) || base.is(rsp) || base.is(r12)); 382 buf_[1] = scale << 6 | index.low_bits() << 3 | base.low_bits(); 383 rex_ |= index.high_bit() << 1 | base.high_bit(); 384 len_ = 2; 385} 386 387void Operand::set_disp8(int disp) { 388 ASSERT(is_int8(disp)); 389 ASSERT(len_ == 1 || len_ == 2); 390 int8_t* p = reinterpret_cast<int8_t*>(&buf_[len_]); 391 *p = disp; 392 len_ += sizeof(int8_t); 393} 394 395void Operand::set_disp32(int disp) { 396 ASSERT(len_ == 1 || len_ == 2); 397 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]); 398 *p = disp; 399 len_ += sizeof(int32_t); 400} 401 402 403} } // namespace v8::internal 404 405#endif // V8_X64_ASSEMBLER_X64_INL_H_ 406