1c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 2c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/*---------------------------------------------------------------*/ 3752f90673ebbb6b2f55fc5e46606dea371313713sewardj/*--- begin host_x86_defs.h ---*/ 4c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/*---------------------------------------------------------------*/ 5c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 6f8ed9d874a7b8651654591c68c6d431c758d787csewardj/* 7752f90673ebbb6b2f55fc5e46606dea371313713sewardj This file is part of Valgrind, a dynamic binary instrumentation 8752f90673ebbb6b2f55fc5e46606dea371313713sewardj framework. 9f8ed9d874a7b8651654591c68c6d431c758d787csewardj 10ed39800a83baf5bffbe391f3974eb2af0f415f80Elliott Hughes Copyright (C) 2004-2017 OpenWorks LLP 11752f90673ebbb6b2f55fc5e46606dea371313713sewardj info@open-works.net 12f8ed9d874a7b8651654591c68c6d431c758d787csewardj 13752f90673ebbb6b2f55fc5e46606dea371313713sewardj This program is free software; you can redistribute it and/or 14752f90673ebbb6b2f55fc5e46606dea371313713sewardj modify it under the terms of the GNU General Public License as 15752f90673ebbb6b2f55fc5e46606dea371313713sewardj published by the Free Software Foundation; either version 2 of the 16752f90673ebbb6b2f55fc5e46606dea371313713sewardj License, or (at your option) any later version. 17f8ed9d874a7b8651654591c68c6d431c758d787csewardj 18752f90673ebbb6b2f55fc5e46606dea371313713sewardj This program is distributed in the hope that it will be useful, but 19752f90673ebbb6b2f55fc5e46606dea371313713sewardj WITHOUT ANY WARRANTY; without even the implied warranty of 20752f90673ebbb6b2f55fc5e46606dea371313713sewardj MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 21752f90673ebbb6b2f55fc5e46606dea371313713sewardj General Public License for more details. 22752f90673ebbb6b2f55fc5e46606dea371313713sewardj 23752f90673ebbb6b2f55fc5e46606dea371313713sewardj You should have received a copy of the GNU General Public License 24752f90673ebbb6b2f55fc5e46606dea371313713sewardj along with this program; if not, write to the Free Software 25752f90673ebbb6b2f55fc5e46606dea371313713sewardj Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 267bd6ffe203f3aa9e7b25f7eae40a9b9cf48710cfsewardj 02110-1301, USA. 277bd6ffe203f3aa9e7b25f7eae40a9b9cf48710cfsewardj 28752f90673ebbb6b2f55fc5e46606dea371313713sewardj The GNU General Public License is contained in the file COPYING. 29f8ed9d874a7b8651654591c68c6d431c758d787csewardj 30f8ed9d874a7b8651654591c68c6d431c758d787csewardj Neither the names of the U.S. Department of Energy nor the 31f8ed9d874a7b8651654591c68c6d431c758d787csewardj University of California nor the names of its contributors may be 32f8ed9d874a7b8651654591c68c6d431c758d787csewardj used to endorse or promote products derived from this software 33f8ed9d874a7b8651654591c68c6d431c758d787csewardj without prior written permission. 34f8ed9d874a7b8651654591c68c6d431c758d787csewardj*/ 35f8ed9d874a7b8651654591c68c6d431c758d787csewardj 36cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj#ifndef __VEX_HOST_X86_DEFS_H 37cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj#define __VEX_HOST_X86_DEFS_H 38c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 3958a637b6675d4d68e13d18b75cea7eee2a2a91feflorian#include "libvex_basictypes.h" 4058a637b6675d4d68e13d18b75cea7eee2a2a91feflorian#include "libvex.h" // VexArch 4158a637b6675d4d68e13d18b75cea7eee2a2a91feflorian#include "host_generic_regs.h" // HReg 42c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 43c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/* --------- Registers. --------- */ 44c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 45c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/* The usual HReg abstraction. There are 8 real int regs, 46c0250e4690e4d48d20f3379396dc30ce0ee4d98fsewardj 6 real float regs, and 8 real vector regs. 47c97096c44637ae5775ed305b19f16f0b505f17d8sewardj*/ 48c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 49a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj#define ST_IN static inline 50a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_EAX ( void ) { return mkHReg(False, HRcInt32, 0, 0); } 51a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_EBX ( void ) { return mkHReg(False, HRcInt32, 3, 1); } 52a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_ECX ( void ) { return mkHReg(False, HRcInt32, 1, 2); } 53a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_EDX ( void ) { return mkHReg(False, HRcInt32, 2, 3); } 54a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_ESI ( void ) { return mkHReg(False, HRcInt32, 6, 4); } 55a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_EDI ( void ) { return mkHReg(False, HRcInt32, 7, 5); } 56a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj 57a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_FAKE0 ( void ) { return mkHReg(False, HRcFlt64, 0, 6); } 58a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_FAKE1 ( void ) { return mkHReg(False, HRcFlt64, 1, 7); } 59a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_FAKE2 ( void ) { return mkHReg(False, HRcFlt64, 2, 8); } 60a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_FAKE3 ( void ) { return mkHReg(False, HRcFlt64, 3, 9); } 61a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_FAKE4 ( void ) { return mkHReg(False, HRcFlt64, 4, 10); } 62a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_FAKE5 ( void ) { return mkHReg(False, HRcFlt64, 5, 11); } 63a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj 64a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_XMM0 ( void ) { return mkHReg(False, HRcVec128, 0, 12); } 65a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_XMM1 ( void ) { return mkHReg(False, HRcVec128, 1, 13); } 66a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_XMM2 ( void ) { return mkHReg(False, HRcVec128, 2, 14); } 67a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_XMM3 ( void ) { return mkHReg(False, HRcVec128, 3, 15); } 68a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_XMM4 ( void ) { return mkHReg(False, HRcVec128, 4, 16); } 69a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_XMM5 ( void ) { return mkHReg(False, HRcVec128, 5, 17); } 70a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_XMM6 ( void ) { return mkHReg(False, HRcVec128, 6, 18); } 71a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_XMM7 ( void ) { return mkHReg(False, HRcVec128, 7, 19); } 72a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj 73a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_ESP ( void ) { return mkHReg(False, HRcInt32, 4, 20); } 74a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjST_IN HReg hregX86_EBP ( void ) { return mkHReg(False, HRcInt32, 5, 21); } 75a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj#undef ST_IN 76c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 77a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjextern void ppHRegX86 ( HReg ); 78d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 79c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 80443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj/* --------- Condition codes, Intel encoding. --------- */ 81443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 82443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardjtypedef 83443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj enum { 84443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_O = 0, /* overflow */ 85443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NO = 1, /* no overflow */ 86443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 87443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_B = 2, /* below */ 88443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NB = 3, /* not below */ 89443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 90443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_Z = 4, /* zero */ 91443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NZ = 5, /* not zero */ 92443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 93443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_BE = 6, /* below or equal */ 94443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NBE = 7, /* not below or equal */ 95443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 96443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_S = 8, /* negative */ 97443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NS = 9, /* not negative */ 98443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 99443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_P = 10, /* parity even */ 100443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NP = 11, /* not parity even */ 101443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 102443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_L = 12, /* jump less */ 103443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NL = 13, /* not less */ 104443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 105443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_LE = 14, /* less or equal */ 106443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_NLE = 15, /* not less or equal */ 107443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 108443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xcc_ALWAYS = 16 /* the usual hack */ 109443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj } 110443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj X86CondCode; 111443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 11255085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showX86CondCode ( X86CondCode ); 113443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 114443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 115c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/* --------- Memory address expressions (amodes). --------- */ 116c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 117c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 118c97096c44637ae5775ed305b19f16f0b505f17d8sewardj enum { 11966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xam_IR, /* Immediate + Reg */ 12066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xam_IRRS /* Immediate + Reg1 + (Reg2 << Shift) */ 121c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 122c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86AModeTag; 123c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 124c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 125c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 126c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86AModeTag tag; 127c97096c44637ae5775ed305b19f16f0b505f17d8sewardj union { 128c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 129c97096c44637ae5775ed305b19f16f0b505f17d8sewardj UInt imm; 130c97096c44637ae5775ed305b19f16f0b505f17d8sewardj HReg reg; 131c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } IR; 132c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 133c97096c44637ae5775ed305b19f16f0b505f17d8sewardj UInt imm; 134c97096c44637ae5775ed305b19f16f0b505f17d8sewardj HReg base; 135c97096c44637ae5775ed305b19f16f0b505f17d8sewardj HReg index; 136c97096c44637ae5775ed305b19f16f0b505f17d8sewardj Int shift; /* 0, 1, 2 or 3 only */ 137c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } IRRS; 138c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } Xam; 139c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 140c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86AMode; 141c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 142c97096c44637ae5775ed305b19f16f0b505f17d8sewardjextern X86AMode* X86AMode_IR ( UInt, HReg ); 143c97096c44637ae5775ed305b19f16f0b505f17d8sewardjextern X86AMode* X86AMode_IRRS ( UInt, HReg, HReg, Int ); 144c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 145218e29f7dcb587332f9aacdc338762c7388f5f9bsewardjextern X86AMode* dopyX86AMode ( X86AMode* ); 146218e29f7dcb587332f9aacdc338762c7388f5f9bsewardj 14735421a3cfd43bc829d27ee15bd34bbc7cb690805sewardjextern void ppX86AMode ( X86AMode* ); 148c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 149c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 15066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- Operand, which can be reg, immediate or memory. --------- */ 151c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 152c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 153c97096c44637ae5775ed305b19f16f0b505f17d8sewardj enum { 15466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrmi_Imm, 15566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrmi_Reg, 15666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrmi_Mem 157c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 15866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMITag; 159c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 160c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 161c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 16266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMITag tag; 163c97096c44637ae5775ed305b19f16f0b505f17d8sewardj union { 164c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 165c97096c44637ae5775ed305b19f16f0b505f17d8sewardj UInt imm32; 166c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } Imm; 167c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 168c97096c44637ae5775ed305b19f16f0b505f17d8sewardj HReg reg; 169c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } Reg; 170c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 171c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86AMode* am; 172c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } Mem; 173c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 17466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrmi; 175c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 17666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMI; 177c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 17866f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RMI* X86RMI_Imm ( UInt ); 17966f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RMI* X86RMI_Reg ( HReg ); 18066f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RMI* X86RMI_Mem ( X86AMode* ); 181c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 18235421a3cfd43bc829d27ee15bd34bbc7cb690805sewardjextern void ppX86RMI ( X86RMI* ); 18366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 18466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 18566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- Operand, which can be reg or immediate only. --------- */ 18666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 18766f2f79812f39ed7cdeedd11d1d40711f3999106sewardjtypedef 18866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj enum { 18966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xri_Imm, 19066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xri_Reg 19166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 19266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RITag; 19366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 19466f2f79812f39ed7cdeedd11d1d40711f3999106sewardjtypedef 19566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 19666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RITag tag; 19766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj union { 19866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 19966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj UInt imm32; 20066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Imm; 20166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 20266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj HReg reg; 20366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Reg; 20466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 20566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xri; 20666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 20766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RI; 20866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 20966f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RI* X86RI_Imm ( UInt ); 21066f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RI* X86RI_Reg ( HReg ); 21166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 21235421a3cfd43bc829d27ee15bd34bbc7cb690805sewardjextern void ppX86RI ( X86RI* ); 21366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 21466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 21566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- Operand, which can be reg or memory only. --------- */ 21666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 21766f2f79812f39ed7cdeedd11d1d40711f3999106sewardjtypedef 21866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj enum { 21966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrm_Reg, 22066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrm_Mem 22166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 22266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMTag; 22366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 22466f2f79812f39ed7cdeedd11d1d40711f3999106sewardjtypedef 22566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 22666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMTag tag; 22766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj union { 22866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 22966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj HReg reg; 23066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Reg; 23166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj struct { 23266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86AMode* am; 23366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Mem; 23466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 23566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xrm; 23666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 23766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RM; 23866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 23966f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RM* X86RM_Reg ( HReg ); 24066f2f79812f39ed7cdeedd11d1d40711f3999106sewardjextern X86RM* X86RM_Mem ( X86AMode* ); 24166f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 24235421a3cfd43bc829d27ee15bd34bbc7cb690805sewardjextern void ppX86RM ( X86RM* ); 243c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 244c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 245c97096c44637ae5775ed305b19f16f0b505f17d8sewardj/* --------- Instructions. --------- */ 246c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 24766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- */ 24860f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardjtypedef 24960f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj enum { 250358b7d4fb879c7676c12cf09b91e5e1711fd4800sewardj Xun_NEG, 251358b7d4fb879c7676c12cf09b91e5e1711fd4800sewardj Xun_NOT 25260f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj } 25360f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj X86UnaryOp; 25460f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj 25555085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showX86UnaryOp ( X86UnaryOp ); 25660f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj 25760f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj 25860f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj/* --------- */ 259c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 260e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj enum { 261e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj Xalu_INVALID, 26266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xalu_MOV, 2634042c7efbf90e46d98a0c868c02e1394fd701467sewardj Xalu_CMP, 26466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xalu_ADD, Xalu_SUB, Xalu_ADC, Xalu_SBB, 26560f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj Xalu_AND, Xalu_OR, Xalu_XOR, 26660f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj Xalu_MUL 26766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 268c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86AluOp; 269c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 27055085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showX86AluOp ( X86AluOp ); 271c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 272c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 27366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- */ 27466f2f79812f39ed7cdeedd11d1d40711f3999106sewardjtypedef 27566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj enum { 276e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj Xsh_INVALID, 277df53045492d69220144c1cf2448eca92d71acf55sewardj Xsh_SHL, Xsh_SHR, Xsh_SAR 27866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } 27966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86ShiftOp; 28066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 28155085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showX86ShiftOp ( X86ShiftOp ); 28266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 28366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj 28466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj/* --------- */ 285c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 286c97096c44637ae5775ed305b19f16f0b505f17d8sewardj enum { 287bb53f8ccc58873ffe18bef04ba2a8d24fdc244b9sewardj Xfp_INVALID, 288bb53f8ccc58873ffe18bef04ba2a8d24fdc244b9sewardj /* Binary */ 28946de4076882d6a44ff0f76bd8b70c3d89b050293sewardj Xfp_ADD, Xfp_SUB, Xfp_MUL, Xfp_DIV, 290442d0be1e8050056c3f50a8c0f9e74ed1d522c84sewardj Xfp_SCALE, Xfp_ATAN, Xfp_YL2X, Xfp_YL2XP1, Xfp_PREM, Xfp_PREM1, 291bb53f8ccc58873ffe18bef04ba2a8d24fdc244b9sewardj /* Unary */ 29299016a7b2d31c50a02b4a3ae8c7b0cf4de2c22cfsewardj Xfp_SQRT, Xfp_ABS, Xfp_NEG, Xfp_MOV, Xfp_SIN, Xfp_COS, Xfp_TAN, 29306c32a0f13e91af2947dd01ebd4b81c01a64b15bsewardj Xfp_ROUND, Xfp_2XM1 294d1725d18b61bf7912a9099686179faef5815dba1sewardj } 295d1725d18b61bf7912a9099686179faef5815dba1sewardj X86FpOp; 296d1725d18b61bf7912a9099686179faef5815dba1sewardj 29755085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showX86FpOp ( X86FpOp ); 298d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 299d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 300d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj/* --------- */ 301d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjtypedef 302d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj enum { 303d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj Xsse_INVALID, 304164f9275c465cd09ecd09276b8542282f5def250sewardj /* mov */ 305164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MOV, 306164f9275c465cd09ecd09276b8542282f5def250sewardj /* Floating point binary */ 307176a59c6eec21f8a0e8dbafdf85bb9af8109b0c6sewardj Xsse_ADDF, Xsse_SUBF, Xsse_MULF, Xsse_DIVF, 308176a59c6eec21f8a0e8dbafdf85bb9af8109b0c6sewardj Xsse_MAXF, Xsse_MINF, 309164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_CMPEQF, Xsse_CMPLTF, Xsse_CMPLEF, Xsse_CMPUNF, 310164f9275c465cd09ecd09276b8542282f5def250sewardj /* Floating point unary */ 311c1e7dfc9370ee70f7e9f52294c764d4233619927sewardj Xsse_RCPF, Xsse_RSQRTF, Xsse_SQRTF, 312164f9275c465cd09ecd09276b8542282f5def250sewardj /* Bitwise */ 313164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_AND, Xsse_OR, Xsse_XOR, Xsse_ANDN, 314164f9275c465cd09ecd09276b8542282f5def250sewardj /* Integer binary */ 315164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_ADD8, Xsse_ADD16, Xsse_ADD32, Xsse_ADD64, 316164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_QADD8U, Xsse_QADD16U, 317164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_QADD8S, Xsse_QADD16S, 318164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_SUB8, Xsse_SUB16, Xsse_SUB32, Xsse_SUB64, 319164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_QSUB8U, Xsse_QSUB16U, 320164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_QSUB8S, Xsse_QSUB16S, 321164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MUL16, 322164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MULHI16U, 323164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MULHI16S, 324164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_AVG8U, Xsse_AVG16U, 325164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MAX16S, 326164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MAX8U, 327164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MIN16S, 328164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_MIN8U, 329164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_CMPEQ8, Xsse_CMPEQ16, Xsse_CMPEQ32, 330164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_CMPGT8S, Xsse_CMPGT16S, Xsse_CMPGT32S, 331164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_SHL16, Xsse_SHL32, Xsse_SHL64, 332164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_SHR16, Xsse_SHR32, Xsse_SHR64, 333164f9275c465cd09ecd09276b8542282f5def250sewardj Xsse_SAR16, Xsse_SAR32, 3349e20359bb34d2354a0726dde2b307e5d752a8ae6sewardj Xsse_PACKSSD, Xsse_PACKSSW, Xsse_PACKUSW, 3359e20359bb34d2354a0726dde2b307e5d752a8ae6sewardj Xsse_UNPCKHB, Xsse_UNPCKHW, Xsse_UNPCKHD, Xsse_UNPCKHQ, 3369e20359bb34d2354a0726dde2b307e5d752a8ae6sewardj Xsse_UNPCKLB, Xsse_UNPCKLW, Xsse_UNPCKLD, Xsse_UNPCKLQ 337d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj } 338d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj X86SseOp; 339d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 34055085f8680acc89d727e321f3b34cae1a8c4093aflorianextern const HChar* showX86SseOp ( X86SseOp ); 341d1725d18b61bf7912a9099686179faef5815dba1sewardj 342d1725d18b61bf7912a9099686179faef5815dba1sewardj 343d1725d18b61bf7912a9099686179faef5815dba1sewardj/* --------- */ 344d1725d18b61bf7912a9099686179faef5815dba1sewardjtypedef 345d1725d18b61bf7912a9099686179faef5815dba1sewardj enum { 34666f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xin_Alu32R, /* 32-bit mov/arith/logical, dst=REG */ 34766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj Xin_Alu32M, /* 32-bit mov/arith/logical, dst=MEM */ 348eba63f874c83e0d2c9306574cddecd8de129095esewardj Xin_Sh32, /* 32-bit shift/rotate, dst=REG */ 349fb7373aee5e8a3039f2916ecf09870f3ec0c1805sewardj Xin_Test32, /* 32-bit test of REG or MEM against imm32 (AND, set 350eba63f874c83e0d2c9306574cddecd8de129095esewardj flags, discard result) */ 35160f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj Xin_Unary32, /* 32-bit not and neg */ 35279e04f8266ba458784fa8b8abd57a571c5984f53sewardj Xin_Lea32, /* 32-bit compute EA into a reg */ 353eba63f874c83e0d2c9306574cddecd8de129095esewardj Xin_MulL, /* 32 x 32 -> 64 multiply */ 354eba63f874c83e0d2c9306574cddecd8de129095esewardj Xin_Div, /* 64/32 -> (32,32) div and mod */ 3555c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj Xin_Sh3232, /* shldl or shrdl */ 356e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj Xin_Push, /* push (32-bit?) value on stack */ 357e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj Xin_Call, /* call to address in register */ 358c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_XDirect, /* direct transfer to GA */ 359c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_XIndir, /* indirect transfer to GA */ 360c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_XAssisted, /* assisted transfer to GA */ 3615c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj Xin_CMov32, /* conditional move */ 362443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj Xin_LoadEX, /* mov{s,z}{b,w}l from mem to reg */ 363d1725d18b61bf7912a9099686179faef5815dba1sewardj Xin_Store, /* store 16/8 bit value in memory */ 364d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj Xin_Set32, /* convert condition code to 32-bit value */ 365ce646f23d71ac432c340667387aa4a5ce7d18099sewardj Xin_Bsfr32, /* 32-bit bsf/bsr */ 3666c65c12ecf69436421ebc1b5637ee13bb4aaf41emjw Xin_MFence, /* mem fence (not just sse2, but sse0 and 1/mmxext too) */ 367e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj Xin_ACAS, /* 8/16/32-bit lock;cmpxchg */ 368e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj Xin_DACAS, /* lock;cmpxchg8b (doubleword ACAS, 2 x 32-bit only) */ 369d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 370d1725d18b61bf7912a9099686179faef5815dba1sewardj Xin_FpUnary, /* FP fake unary op */ 371d1725d18b61bf7912a9099686179faef5815dba1sewardj Xin_FpBinary, /* FP fake binary op */ 372d1725d18b61bf7912a9099686179faef5815dba1sewardj Xin_FpLdSt, /* FP fake load/store */ 37389cd09353a584000edaaa61558b27253bdea7452sewardj Xin_FpLdStI, /* FP fake load/store, converting to/from Int */ 3743bca906f6e715c544eb49c278bedef093c14c0d7sewardj Xin_Fp64to32, /* FP round IEEE754 double to IEEE754 single */ 375b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj Xin_FpCMov, /* FP fake floating point conditional move */ 376eba63f874c83e0d2c9306574cddecd8de129095esewardj Xin_FpLdCW, /* fldcw */ 37746de4076882d6a44ff0f76bd8b70c3d89b050293sewardj Xin_FpStSW_AX, /* fstsw %ax */ 378d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj Xin_FpCmp, /* FP compare, generating a C320 value into int reg */ 379d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 3801e6ad745ebafd0524da1da27a4b85524fa84f777sewardj Xin_SseConst, /* Generate restricted SSE literal */ 381d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj Xin_SseLdSt, /* SSE load/store, no alignment constraints */ 382129b3d9da92af2ad2c58ffacb977aa5766211f08sewardj Xin_SseLdzLO, /* SSE load low 32/64 bits, zero remainder of reg */ 383d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj Xin_Sse32Fx4, /* SSE binary, 32Fx4 */ 384636ad762e49597ef608323f27c7b8eb66962cd90sewardj Xin_Sse32FLo, /* SSE binary, 32F in lowest lane only */ 385636ad762e49597ef608323f27c7b8eb66962cd90sewardj Xin_Sse64Fx2, /* SSE binary, 64Fx2 */ 386164f9275c465cd09ecd09276b8542282f5def250sewardj Xin_Sse64FLo, /* SSE binary, 64F in lowest lane only */ 387b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj Xin_SseReRg, /* SSE binary general reg-reg, Re, Rg */ 388109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj Xin_SseCMov, /* SSE conditional move */ 389c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_SseShuf, /* SSE2 shuffle (pshufd) */ 390c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_EvCheck, /* Event check */ 391c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Xin_ProfInc /* 64-bit profile counter increment */ 392c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 393c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86InstrTag; 394c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 395d1725d18b61bf7912a9099686179faef5815dba1sewardj/* Destinations are on the RIGHT (second operand) */ 396c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 397c97096c44637ae5775ed305b19f16f0b505f17d8sewardjtypedef 398c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 399c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86InstrTag tag; 400c97096c44637ae5775ed305b19f16f0b505f17d8sewardj union { 401c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 40266f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86AluOp op; 40366f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RMI* src; 40466f2f79812f39ed7cdeedd11d1d40711f3999106sewardj HReg dst; 40566f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Alu32R; 406c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 40766f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86AluOp op; 40866f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86RI* src; 40966f2f79812f39ed7cdeedd11d1d40711f3999106sewardj X86AMode* dst; 41066f2f79812f39ed7cdeedd11d1d40711f3999106sewardj } Alu32M; 411e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj struct { 412e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj X86ShiftOp op; 413eba63f874c83e0d2c9306574cddecd8de129095esewardj UInt src; /* shift amount, or 0 means %cl */ 414eba63f874c83e0d2c9306574cddecd8de129095esewardj HReg dst; 415e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj } Sh32; 416e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj struct { 417fb7373aee5e8a3039f2916ecf09870f3ec0c1805sewardj UInt imm32; 418fb7373aee5e8a3039f2916ecf09870f3ec0c1805sewardj X86RM* dst; /* not written, only read */ 419e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj } Test32; 42060f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj /* Not and Neg */ 421c97096c44637ae5775ed305b19f16f0b505f17d8sewardj struct { 42260f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj X86UnaryOp op; 423eba63f874c83e0d2c9306574cddecd8de129095esewardj HReg dst; 42460f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj } Unary32; 42579e04f8266ba458784fa8b8abd57a571c5984f53sewardj /* 32-bit compute EA into a reg */ 42679e04f8266ba458784fa8b8abd57a571c5984f53sewardj struct { 42779e04f8266ba458784fa8b8abd57a571c5984f53sewardj X86AMode* am; 42879e04f8266ba458784fa8b8abd57a571c5984f53sewardj HReg dst; 42979e04f8266ba458784fa8b8abd57a571c5984f53sewardj } Lea32; 430eba63f874c83e0d2c9306574cddecd8de129095esewardj /* EDX:EAX = EAX *s/u r/m32 */ 43160f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj struct { 432eba63f874c83e0d2c9306574cddecd8de129095esewardj Bool syned; 433eba63f874c83e0d2c9306574cddecd8de129095esewardj X86RM* src; 43460f4e3cd5da347ebf42be5101ccefb7bc55e2e36sewardj } MulL; 4351f40a0a104034009e253675288ebefdcccf30da8sewardj /* x86 div/idiv instruction. Modifies EDX and EAX and reads src. */ 4365c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj struct { 437eba63f874c83e0d2c9306574cddecd8de129095esewardj Bool syned; 438eba63f874c83e0d2c9306574cddecd8de129095esewardj X86RM* src; 4395c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj } Div; 4405c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj /* shld/shrd. op may only be Xsh_SHL or Xsh_SHR */ 4415c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj struct { 4425c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj X86ShiftOp op; 443e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj UInt amt; /* shift amount, or 0 means %cl */ 444e5f384c12c014ed9e67a92f52fab18e6ac530412sewardj HReg src; 445e5f384c12c014ed9e67a92f52fab18e6ac530412sewardj HReg dst; 4465c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj } Sh3232; 447e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj struct { 448e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj X86RMI* src; 449e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj } Push; 4504b861de5057856808ec69590f0f0f7c301493272sewardj /* Pseudo-insn. Call target (an absolute address), on given 4514b861de5057856808ec69590f0f0f7c301493272sewardj condition (which could be Xcc_ALWAYS). */ 452e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj struct { 4534b861de5057856808ec69590f0f0f7c301493272sewardj X86CondCode cond; 4544b861de5057856808ec69590f0f0f7c301493272sewardj Addr32 target; 4554b861de5057856808ec69590f0f0f7c301493272sewardj Int regparms; /* 0 .. 3 */ 456cfe046e178666280b87da998b1b52ecda03ecd89sewardj RetLoc rloc; /* where the return value will be */ 457e8e9d73817f92d295f45b1c6c823c613bc2e90aesewardj } Call; 458c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* Update the guest EIP value, then exit requesting to chain 459c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj to it. May be conditional. Urr, use of Addr32 implicitly 460c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj assumes that wordsize(guest) == wordsize(host). */ 461c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 462c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Addr32 dstGA; /* next guest address */ 463c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amEIP; /* amode in guest state for EIP */ 464c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond; /* can be Xcc_ALWAYS */ 465c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Bool toFastEP; /* chain to the slow or fast point? */ 466c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } XDirect; 467c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* Boring transfer to a guest address not known at JIT time. 468c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Not chainable. May be conditional. */ 469c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 470c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj HReg dstGA; 471c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amEIP; 472c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond; /* can be Xcc_ALWAYS */ 473c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } XIndir; 474c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* Assisted transfer to a guest address, most general case. 475c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Not chainable. May be conditional. */ 476c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 477c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj HReg dstGA; 478c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amEIP; 479c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond; /* can be Xcc_ALWAYS */ 480750f407b6be1aac303964a219acf0a6de8b8c4dasewardj IRJumpKind jk; 481c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } XAssisted; 4825c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj /* Mov src to dst on the given condition, which may not 4835c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj be the bogus Xcc_ALWAYS. */ 4844042c7efbf90e46d98a0c868c02e1394fd701467sewardj struct { 4855c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj X86CondCode cond; 486e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj X86RM* src; 487e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj HReg dst; 4885c34dc93049b3e66b76b6bea9f2f5d9594581255sewardj } CMov32; 4894042c7efbf90e46d98a0c868c02e1394fd701467sewardj /* Sign/Zero extending loads. Dst size is always 32 bits. */ 4904042c7efbf90e46d98a0c868c02e1394fd701467sewardj struct { 4914042c7efbf90e46d98a0c868c02e1394fd701467sewardj UChar szSmall; 4924042c7efbf90e46d98a0c868c02e1394fd701467sewardj Bool syned; 4934042c7efbf90e46d98a0c868c02e1394fd701467sewardj X86AMode* src; 4944042c7efbf90e46d98a0c868c02e1394fd701467sewardj HReg dst; 4954042c7efbf90e46d98a0c868c02e1394fd701467sewardj } LoadEX; 496443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj /* 16/8 bit stores, which are troublesome (particularly 497443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj 8-bit) */ 498443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj struct { 499e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj UChar sz; /* only 1 or 2 */ 500e8c922f3329aee131f408a0d42ef0bea3f562bb3sewardj HReg src; 501443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj X86AMode* dst; 502443cd9d34617dd7608e5dd4b4b0b4674d4f433e7sewardj } Store; 503d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj /* Convert a x86 condition code to a 32-bit value (0 or 1). */ 504d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj struct { 505d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj X86CondCode cond; 506d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj HReg dst; 507d7cb8538d814660fe68ea7100571fd3ed1de8082sewardj } Set32; 508ce646f23d71ac432c340667387aa4a5ce7d18099sewardj /* 32-bit bsf or bsr. */ 509ce646f23d71ac432c340667387aa4a5ce7d18099sewardj struct { 510ce646f23d71ac432c340667387aa4a5ce7d18099sewardj Bool isFwds; 511ce646f23d71ac432c340667387aa4a5ce7d18099sewardj HReg src; 512ce646f23d71ac432c340667387aa4a5ce7d18099sewardj HReg dst; 513ce646f23d71ac432c340667387aa4a5ce7d18099sewardj } Bsfr32; 5146c65c12ecf69436421ebc1b5637ee13bb4aaf41emjw /* Mem fence (not just sse2, but sse0 and sse1/mmxext too). 5156c65c12ecf69436421ebc1b5637ee13bb4aaf41emjw In short, an insn which flushes all preceding loads and 5166c65c12ecf69436421ebc1b5637ee13bb4aaf41emjw stores as much as possible before continuing. On SSE2 5176c65c12ecf69436421ebc1b5637ee13bb4aaf41emjw we emit a real "mfence", on SSE1 or the MMXEXT subset 5186c65c12ecf69436421ebc1b5637ee13bb4aaf41emjw "sfence ; lock addl $0,0(%esp)" and on SSE0 5196c65c12ecf69436421ebc1b5637ee13bb4aaf41emjw "lock addl $0,0(%esp)". This insn therefore carries the 5206c65c12ecf69436421ebc1b5637ee13bb4aaf41emjw host's hwcaps so the assembler knows what to emit. */ 5213e83893fff6c7bbc955d4529cd922df4ed9b23cdsewardj struct { 5225117ce116f47141cb23d1b49cc826e19323add97sewardj UInt hwcaps; 5233e83893fff6c7bbc955d4529cd922df4ed9b23cdsewardj } MFence; 524e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj /* "lock;cmpxchg": mem address in .addr, 525e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj expected value in %eax, new value in %ebx */ 526e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj struct { 527e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj X86AMode* addr; 528e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj UChar sz; /* 1, 2 or 4 */ 529e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj } ACAS; 530e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj /* "lock;cmpxchg8b": mem address in .addr, expected value in 531e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj %edx:%eax, new value in %ecx:%ebx */ 532e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj struct { 533e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj X86AMode* addr; 534e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardj } DACAS; 535d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 536d1725d18b61bf7912a9099686179faef5815dba1sewardj /* X86 Floating point (fake 3-operand, "flat reg file" insns) */ 537d1725d18b61bf7912a9099686179faef5815dba1sewardj struct { 538d1725d18b61bf7912a9099686179faef5815dba1sewardj X86FpOp op; 539d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg src; 540d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg dst; 541d1725d18b61bf7912a9099686179faef5815dba1sewardj } FpUnary; 542d1725d18b61bf7912a9099686179faef5815dba1sewardj struct { 543d1725d18b61bf7912a9099686179faef5815dba1sewardj X86FpOp op; 544d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg srcL; 545d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg srcR; 546d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg dst; 547d1725d18b61bf7912a9099686179faef5815dba1sewardj } FpBinary; 548d1725d18b61bf7912a9099686179faef5815dba1sewardj struct { 549d1725d18b61bf7912a9099686179faef5815dba1sewardj Bool isLoad; 550d1725d18b61bf7912a9099686179faef5815dba1sewardj UChar sz; /* only 4 (IEEE single) or 8 (IEEE double) */ 551d1725d18b61bf7912a9099686179faef5815dba1sewardj HReg reg; 552d1725d18b61bf7912a9099686179faef5815dba1sewardj X86AMode* addr; 553d1725d18b61bf7912a9099686179faef5815dba1sewardj } FpLdSt; 55489cd09353a584000edaaa61558b27253bdea7452sewardj /* Move 64-bit float to/from memory, converting to/from 5553bca906f6e715c544eb49c278bedef093c14c0d7sewardj signed int on the way. Note the conversions will observe 5563bca906f6e715c544eb49c278bedef093c14c0d7sewardj the host FPU rounding mode currently in force. */ 557d1725d18b61bf7912a9099686179faef5815dba1sewardj struct { 55889cd09353a584000edaaa61558b27253bdea7452sewardj Bool isLoad; 55989cd09353a584000edaaa61558b27253bdea7452sewardj UChar sz; /* only 2, 4 or 8 */ 56089cd09353a584000edaaa61558b27253bdea7452sewardj HReg reg; 56189cd09353a584000edaaa61558b27253bdea7452sewardj X86AMode* addr; 56289cd09353a584000edaaa61558b27253bdea7452sewardj } FpLdStI; 5633bca906f6e715c544eb49c278bedef093c14c0d7sewardj /* By observing the current FPU rounding mode, round (etc) 5643bca906f6e715c544eb49c278bedef093c14c0d7sewardj src into dst given that dst should be interpreted as an 5653bca906f6e715c544eb49c278bedef093c14c0d7sewardj IEEE754 32-bit (float) type. */ 5663bca906f6e715c544eb49c278bedef093c14c0d7sewardj struct { 5673bca906f6e715c544eb49c278bedef093c14c0d7sewardj HReg src; 5683bca906f6e715c544eb49c278bedef093c14c0d7sewardj HReg dst; 5693bca906f6e715c544eb49c278bedef093c14c0d7sewardj } Fp64to32; 57033124f613423b7298c1717ea7a6b5deafc80f0b2sewardj /* Mov src to dst on the given condition, which may not 57133124f613423b7298c1717ea7a6b5deafc80f0b2sewardj be the bogus Xcc_ALWAYS. */ 57233124f613423b7298c1717ea7a6b5deafc80f0b2sewardj struct { 57333124f613423b7298c1717ea7a6b5deafc80f0b2sewardj X86CondCode cond; 57433124f613423b7298c1717ea7a6b5deafc80f0b2sewardj HReg src; 57533124f613423b7298c1717ea7a6b5deafc80f0b2sewardj HReg dst; 57633124f613423b7298c1717ea7a6b5deafc80f0b2sewardj } FpCMov; 577eba63f874c83e0d2c9306574cddecd8de129095esewardj /* Load the FPU's 16-bit control word (fldcw) */ 5788f3debf52b76a050bc84997a0358c4aa86dfc88dsewardj struct { 5798f3debf52b76a050bc84997a0358c4aa86dfc88dsewardj X86AMode* addr; 5808f3debf52b76a050bc84997a0358c4aa86dfc88dsewardj } 581eba63f874c83e0d2c9306574cddecd8de129095esewardj FpLdCW; 58246de4076882d6a44ff0f76bd8b70c3d89b050293sewardj /* fstsw %ax */ 58346de4076882d6a44ff0f76bd8b70c3d89b050293sewardj struct { 58446de4076882d6a44ff0f76bd8b70c3d89b050293sewardj /* no fields */ 58546de4076882d6a44ff0f76bd8b70c3d89b050293sewardj } 58646de4076882d6a44ff0f76bd8b70c3d89b050293sewardj FpStSW_AX; 587bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj /* Do a compare, generating the C320 bits into the dst. */ 588bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj struct { 589bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj HReg srcL; 590bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj HReg srcR; 591bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj HReg dst; 592bdc7d215ca35fbf5213549560fc3bd8967f60f6dsewardj } FpCmp; 593d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 594d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj /* Simplistic SSE[123] */ 595d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj struct { 5961e6ad745ebafd0524da1da27a4b85524fa84f777sewardj UShort con; 5971e6ad745ebafd0524da1da27a4b85524fa84f777sewardj HReg dst; 5981e6ad745ebafd0524da1da27a4b85524fa84f777sewardj } SseConst; 5991e6ad745ebafd0524da1da27a4b85524fa84f777sewardj struct { 600d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj Bool isLoad; 601d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj HReg reg; 602d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj X86AMode* addr; 603d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj } SseLdSt; 604d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj struct { 605eba63f874c83e0d2c9306574cddecd8de129095esewardj UChar sz; /* 4 or 8 only */ 606129b3d9da92af2ad2c58ffacb977aa5766211f08sewardj HReg reg; 607129b3d9da92af2ad2c58ffacb977aa5766211f08sewardj X86AMode* addr; 608129b3d9da92af2ad2c58ffacb977aa5766211f08sewardj } SseLdzLO; 609129b3d9da92af2ad2c58ffacb977aa5766211f08sewardj struct { 610d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj X86SseOp op; 611d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj HReg src; 612d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj HReg dst; 613d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj } Sse32Fx4; 614d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj struct { 615d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj X86SseOp op; 616d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj HReg src; 617d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj HReg dst; 618d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj } Sse32FLo; 619636ad762e49597ef608323f27c7b8eb66962cd90sewardj struct { 620636ad762e49597ef608323f27c7b8eb66962cd90sewardj X86SseOp op; 621636ad762e49597ef608323f27c7b8eb66962cd90sewardj HReg src; 622636ad762e49597ef608323f27c7b8eb66962cd90sewardj HReg dst; 623636ad762e49597ef608323f27c7b8eb66962cd90sewardj } Sse64Fx2; 624636ad762e49597ef608323f27c7b8eb66962cd90sewardj struct { 625636ad762e49597ef608323f27c7b8eb66962cd90sewardj X86SseOp op; 626636ad762e49597ef608323f27c7b8eb66962cd90sewardj HReg src; 627636ad762e49597ef608323f27c7b8eb66962cd90sewardj HReg dst; 628636ad762e49597ef608323f27c7b8eb66962cd90sewardj } Sse64FLo; 629164f9275c465cd09ecd09276b8542282f5def250sewardj struct { 630164f9275c465cd09ecd09276b8542282f5def250sewardj X86SseOp op; 631164f9275c465cd09ecd09276b8542282f5def250sewardj HReg src; 632164f9275c465cd09ecd09276b8542282f5def250sewardj HReg dst; 633164f9275c465cd09ecd09276b8542282f5def250sewardj } SseReRg; 634b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj /* Mov src to dst on the given condition, which may not 635b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj be the bogus Xcc_ALWAYS. */ 636b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj struct { 637b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj X86CondCode cond; 638b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj HReg src; 639b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj HReg dst; 640b9fa69b4047ef2a1fd822bab909437c920b9c297sewardj } SseCMov; 641109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj struct { 642109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj Int order; /* 0 <= order <= 0xFF */ 643109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj HReg src; 644109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj HReg dst; 645109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardj } SseShuf; 646c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 647c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amCounter; 648c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amFailAddr; 649c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } EvCheck; 650c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj struct { 651c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj /* No fields. The address of the counter to inc is 652c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj installed later, post-translation, by patching it in, 653c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj as it is not known at translation time. */ 654c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj } ProfInc; 655d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 65633124f613423b7298c1717ea7a6b5deafc80f0b2sewardj } Xin; 657c97096c44637ae5775ed305b19f16f0b505f17d8sewardj } 658c97096c44637ae5775ed305b19f16f0b505f17d8sewardj X86Instr; 659c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 66046de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Alu32R ( X86AluOp, X86RMI*, HReg ); 66146de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Alu32M ( X86AluOp, X86RI*, X86AMode* ); 662eba63f874c83e0d2c9306574cddecd8de129095esewardjextern X86Instr* X86Instr_Unary32 ( X86UnaryOp op, HReg dst ); 66379e04f8266ba458784fa8b8abd57a571c5984f53sewardjextern X86Instr* X86Instr_Lea32 ( X86AMode* am, HReg dst ); 66479e04f8266ba458784fa8b8abd57a571c5984f53sewardj 665eba63f874c83e0d2c9306574cddecd8de129095esewardjextern X86Instr* X86Instr_Sh32 ( X86ShiftOp, UInt, HReg ); 666fb7373aee5e8a3039f2916ecf09870f3ec0c1805sewardjextern X86Instr* X86Instr_Test32 ( UInt imm32, X86RM* dst ); 667eba63f874c83e0d2c9306574cddecd8de129095esewardjextern X86Instr* X86Instr_MulL ( Bool syned, X86RM* ); 668eba63f874c83e0d2c9306574cddecd8de129095esewardjextern X86Instr* X86Instr_Div ( Bool syned, X86RM* ); 66946de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Sh3232 ( X86ShiftOp, UInt amt, HReg src, HReg dst ); 67046de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Push ( X86RMI* ); 671cfe046e178666280b87da998b1b52ecda03ecd89sewardjextern X86Instr* X86Instr_Call ( X86CondCode, Addr32, Int, RetLoc ); 672c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern X86Instr* X86Instr_XDirect ( Addr32 dstGA, X86AMode* amEIP, 673c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond, Bool toFastEP ); 674c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern X86Instr* X86Instr_XIndir ( HReg dstGA, X86AMode* amEIP, 675c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond ); 676c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern X86Instr* X86Instr_XAssisted ( HReg dstGA, X86AMode* amEIP, 677c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86CondCode cond, IRJumpKind jk ); 67846de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_CMov32 ( X86CondCode, X86RM* src, HReg dst ); 67946de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_LoadEX ( UChar szSmall, Bool syned, 68046de4076882d6a44ff0f76bd8b70c3d89b050293sewardj X86AMode* src, HReg dst ); 68146de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Store ( UChar sz, HReg src, X86AMode* dst ); 68246de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Set32 ( X86CondCode cond, HReg dst ); 68346de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_Bsfr32 ( Bool isFwds, HReg src, HReg dst ); 6845117ce116f47141cb23d1b49cc826e19323add97sewardjextern X86Instr* X86Instr_MFence ( UInt hwcaps ); 685e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardjextern X86Instr* X86Instr_ACAS ( X86AMode* addr, UChar sz ); 686e9d8a26b690c2561ac54ab0cd6ad83ecbadcbe76sewardjextern X86Instr* X86Instr_DACAS ( X86AMode* addr ); 687d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 68846de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpUnary ( X86FpOp op, HReg src, HReg dst ); 68946de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpBinary ( X86FpOp op, HReg srcL, HReg srcR, HReg dst ); 69046de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpLdSt ( Bool isLoad, UChar sz, HReg reg, X86AMode* ); 69146de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpLdStI ( Bool isLoad, UChar sz, HReg reg, X86AMode* ); 6923bca906f6e715c544eb49c278bedef093c14c0d7sewardjextern X86Instr* X86Instr_Fp64to32 ( HReg src, HReg dst ); 69346de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpCMov ( X86CondCode, HReg src, HReg dst ); 694eba63f874c83e0d2c9306574cddecd8de129095esewardjextern X86Instr* X86Instr_FpLdCW ( X86AMode* ); 69546de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpStSW_AX ( void ); 69646de4076882d6a44ff0f76bd8b70c3d89b050293sewardjextern X86Instr* X86Instr_FpCmp ( HReg srcL, HReg srcR, HReg dst ); 6978f3debf52b76a050bc84997a0358c4aa86dfc88dsewardj 6981e6ad745ebafd0524da1da27a4b85524fa84f777sewardjextern X86Instr* X86Instr_SseConst ( UShort con, HReg dst ); 699d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern X86Instr* X86Instr_SseLdSt ( Bool isLoad, HReg, X86AMode* ); 700129b3d9da92af2ad2c58ffacb977aa5766211f08sewardjextern X86Instr* X86Instr_SseLdzLO ( Int sz, HReg, X86AMode* ); 701d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern X86Instr* X86Instr_Sse32Fx4 ( X86SseOp, HReg, HReg ); 702d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardjextern X86Instr* X86Instr_Sse32FLo ( X86SseOp, HReg, HReg ); 703636ad762e49597ef608323f27c7b8eb66962cd90sewardjextern X86Instr* X86Instr_Sse64Fx2 ( X86SseOp, HReg, HReg ); 704636ad762e49597ef608323f27c7b8eb66962cd90sewardjextern X86Instr* X86Instr_Sse64FLo ( X86SseOp, HReg, HReg ); 705164f9275c465cd09ecd09276b8542282f5def250sewardjextern X86Instr* X86Instr_SseReRg ( X86SseOp, HReg, HReg ); 706b9fa69b4047ef2a1fd822bab909437c920b9c297sewardjextern X86Instr* X86Instr_SseCMov ( X86CondCode, HReg src, HReg dst ); 707109ffdbb31ff652ae83d0ad400966f68c46cd4f1sewardjextern X86Instr* X86Instr_SseShuf ( Int order, HReg src, HReg dst ); 708c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern X86Instr* X86Instr_EvCheck ( X86AMode* amCounter, 709c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj X86AMode* amFailAddr ); 710c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardjextern X86Instr* X86Instr_ProfInc ( void ); 711d08f2d71ec2efcdf5029b4b571c90452d12b1c72sewardj 712c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 713d8c64e082224b2e688abdef9219cc76fd82b373bflorianextern void ppX86Instr ( const X86Instr*, Bool ); 714c97096c44637ae5775ed305b19f16f0b505f17d8sewardj 715f13a16a82132fa2358899c7683193effecf9a56fsewardj/* Some functions that insulate the register allocator from details 716194d54a15ba7eb6b76afe56b8774689c50485354sewardj of the underlying instruction set. */ 717d8c64e082224b2e688abdef9219cc76fd82b373bflorianextern void getRegUsage_X86Instr ( HRegUsage*, const X86Instr*, Bool ); 71892b643609c5fa432b11fc726c2706ae3f3296eb4cerionextern void mapRegs_X86Instr ( HRegRemap*, X86Instr*, Bool ); 719d8c64e082224b2e688abdef9219cc76fd82b373bflorianextern Bool isMove_X86Instr ( const X86Instr*, HReg*, HReg* ); 7208462d113e3efeacceb304222dada8d85f748295aflorianextern Int emit_X86Instr ( /*MB_MOD*/Bool* is_profInc, 721d8c64e082224b2e688abdef9219cc76fd82b373bflorian UChar* buf, Int nbuf, const X86Instr* i, 7228462d113e3efeacceb304222dada8d85f748295aflorian Bool mode64, 7238462d113e3efeacceb304222dada8d85f748295aflorian VexEndness endness_host, 7248462d113e3efeacceb304222dada8d85f748295aflorian const void* disp_cp_chain_me_to_slowEP, 7258462d113e3efeacceb304222dada8d85f748295aflorian const void* disp_cp_chain_me_to_fastEP, 7268462d113e3efeacceb304222dada8d85f748295aflorian const void* disp_cp_xindir, 7278462d113e3efeacceb304222dada8d85f748295aflorian const void* disp_cp_xassisted ); 7282a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardj 7292a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardjextern void genSpill_X86 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, 7302a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardj HReg rreg, Int offset, Bool ); 7312a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardjextern void genReload_X86 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2, 7322a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardj HReg rreg, Int offset, Bool ); 7332a1ed8e417440976e0c8059715ee0c87d3e2f5ccsewardj 734a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjextern X86Instr* directReload_X86 ( X86Instr* i, HReg vreg, Short spill_off ); 735a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj 736a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardjextern const RRegUniverse* getRRegUniverse_X86 ( void ); 737a5b502299bfc9d97f4c2c9f61cdc1a0a65e1da61sewardj 738cacba8e675988fbf21b08feea1f317a9c896c053florianextern HInstrArray* iselSB_X86 ( const IRSB*, 739c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj VexArch, 740d8c64e082224b2e688abdef9219cc76fd82b373bflorian const VexArchInfo*, 741d8c64e082224b2e688abdef9219cc76fd82b373bflorian const VexAbiInfo*, 742c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Int offs_Host_EvC_Counter, 743c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Int offs_Host_EvC_FailAddr, 744c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Bool chainingAllowed, 745c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj Bool addProfInc, 746dcd6d236c9aef7d4c84369d4c51f6b92ac910127florian Addr max_ga ); 747c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 748c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj/* How big is an event check? This is kind of a kludge because it 749c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj depends on the offsets of host_EvC_FAILADDR and host_EvC_COUNTER, 750c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj and so assumes that they are both <= 128, and so can use the short 751c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj offset encoding. This is all checked with assertions, so in the 752c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj worst case we will merely assert at startup. */ 7537ce2cc883c5b36586babec833838951ecf9f2a76florianextern Int evCheckSzB_X86 (void); 754c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 755c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj/* Perform a chaining and unchaining of an XDirect jump. */ 7569b76916dcc1628e133d57db001563429c6e3a590sewardjextern VexInvalRange chainXDirect_X86 ( VexEndness endness_host, 7579b76916dcc1628e133d57db001563429c6e3a590sewardj void* place_to_chain, 7587d6f81de12e6d8deb3e119ab318f361d97a10a65florian const void* disp_cp_chain_me_EXPECTED, 7597d6f81de12e6d8deb3e119ab318f361d97a10a65florian const void* place_to_jump_to ); 760c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 7619b76916dcc1628e133d57db001563429c6e3a590sewardjextern VexInvalRange unchainXDirect_X86 ( VexEndness endness_host, 7629b76916dcc1628e133d57db001563429c6e3a590sewardj void* place_to_unchain, 7637d6f81de12e6d8deb3e119ab318f361d97a10a65florian const void* place_to_jump_to_EXPECTED, 7647d6f81de12e6d8deb3e119ab318f361d97a10a65florian const void* disp_cp_chain_me ); 765c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 766c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj/* Patch the counter location into an existing ProfInc point. */ 7679b76916dcc1628e133d57db001563429c6e3a590sewardjextern VexInvalRange patchProfInc_X86 ( VexEndness endness_host, 7689b76916dcc1628e133d57db001563429c6e3a590sewardj void* place_to_patch, 7697d6f81de12e6d8deb3e119ab318f361d97a10a65florian const ULong* location_of_counter ); 770c6f970f1fadb640d69c78ac2669efab5c08f1e8dsewardj 7716c77c95467b9b9bbb24ac645ea1a167c9e25e33asewardj 772cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj#endif /* ndef __VEX_HOST_X86_DEFS_H */ 773887a11a609f3e61d2ae8fe4e67f176207715da7esewardj 774887a11a609f3e61d2ae8fe4e67f176207715da7esewardj/*---------------------------------------------------------------*/ 775cef7d3e3df4796e35b4521158d9dc058f034aa87sewardj/*--- end host_x86_defs.h ---*/ 776887a11a609f3e61d2ae8fe4e67f176207715da7esewardj/*---------------------------------------------------------------*/ 777