valgrind-low-mips64.c revision 4df0bfc0614379192c780c944415dc420d9cfe8e
1/* Low level interface to valgrind, for the remote server for GDB integrated
2   in valgrind.
3   Copyright (C) 2011
4   Free Software Foundation, Inc.
5
6   This file is part of VALGRIND.
7   It has been inspired from a file from gdbserver in gdb 6.6.
8
9   This program is free software; you can redistribute it and/or modify
10   it under the terms of the GNU General Public License as published by
11   the Free Software Foundation; either version 2 of the License, or
12   (at your option) any later version.
13
14   This program is distributed in the hope that it will be useful,
15   but WITHOUT ANY WARRANTY; without even the implied warranty of
16   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17   GNU General Public License for more details.
18
19   You should have received a copy of the GNU General Public License
20   along with this program; if not, write to the Free Software
21   Foundation, Inc., 51 Franklin Street, Fifth Floor,
22   Boston, MA 02110-1301, USA.  */
23
24#include "server.h"
25#include "target.h"
26#include "regdef.h"
27#include "regcache.h"
28
29#include "pub_core_aspacemgr.h"
30#include "pub_tool_machine.h"
31#include "pub_core_threadstate.h"
32#include "pub_core_transtab.h"
33#include "pub_core_gdbserver.h"
34
35#include "valgrind_low.h"
36
37#include "libvex_guest_mips64.h"
38
39static struct reg regs[] = {
40   { "r0", 0, 64 },
41   { "r1", 64, 64 },
42   { "r2", 128, 64 },
43   { "r3", 192, 64 },
44   { "r4", 256, 64 },
45   { "r5", 320, 64 },
46   { "r6", 384, 64 },
47   { "r7", 448, 64 },
48   { "r8", 512, 64 },
49   { "r9", 576, 64 },
50   { "r10", 640, 64 },
51   { "r11", 704, 64 },
52   { "r12", 768, 64 },
53   { "r13", 832, 64 },
54   { "r14", 896, 64 },
55   { "r15", 960, 64 },
56   { "r16", 1024, 64 },
57   { "r17", 1088, 64 },
58   { "r18", 1152, 64 },
59   { "r19", 1216, 64 },
60   { "r20", 1280, 64 },
61   { "r21", 1344, 64 },
62   { "r22", 1408, 64 },
63   { "r23", 1472, 64 },
64   { "r24", 1536, 64 },
65   { "r25", 1600, 64 },
66   { "r26", 1664, 64 },
67   { "r27", 1728, 64 },
68   { "r28", 1792, 64 },
69   { "r29", 1856, 64 },
70   { "r30", 1920, 64 },
71   { "r31", 1984, 64 },
72   { "status", 2048, 64 },
73   { "lo", 2112, 64 },
74   { "hi", 2176, 64 },
75   { "badvaddr", 2240, 64 },
76   { "cause", 2304, 64 },
77   { "pc", 2368, 64 },
78   { "f0", 2432, 64 },
79   { "f1", 2496, 64 },
80   { "f2", 2560, 64 },
81   { "f3", 2624, 64 },
82   { "f4", 2688, 64 },
83   { "f5", 2752, 64 },
84   { "f6", 2816, 64 },
85   { "f7", 2880, 64 },
86   { "f8", 2944, 64 },
87   { "f9", 3008, 64 },
88   { "f10", 3072, 64 },
89   { "f11", 3136, 64 },
90   { "f12", 3200, 64 },
91   { "f13", 3264, 64 },
92   { "f14", 3328, 64 },
93   { "f15", 3392, 64 },
94   { "f16", 3456, 64 },
95   { "f17", 3520, 64 },
96   { "f18", 3584, 64 },
97   { "f19", 3648, 64 },
98   { "f20", 3712, 64 },
99   { "f21", 3776, 64 },
100   { "f22", 3840, 64 },
101   { "f23", 3904, 64 },
102   { "f24", 3968, 64 },
103   { "f25", 4032, 64 },
104   { "f26", 4096, 64 },
105   { "f27", 4160, 64 },
106   { "f28", 4224, 64 },
107   { "f29", 4288, 64 },
108   { "f30", 4352, 64 },
109   { "f31", 4416, 64 },
110   { "fcsr", 4480, 64 },
111   { "fir", 4544, 64 },
112   { "restart", 4608, 64 }
113};
114
115
116#define num_regs (sizeof (regs) / sizeof (regs[0]))
117
118static const char *expedite_regs[] = { "r29", "pc", 0 };
119
120static
121CORE_ADDR get_pc (void)
122{
123   unsigned long pc;
124
125   collect_register_by_name ("pc", &pc);
126
127   dlog(1, "stop pc is %p\n", (void *) pc);
128   return pc;
129}
130
131static
132void set_pc (CORE_ADDR newpc)
133{
134   Bool mod;
135   supply_register_by_name ("pc", &newpc, &mod);
136   if (mod)
137      dlog(1, "set pc to %p\n", C2v (newpc));
138   else
139      dlog(1, "set pc not changed %p\n", C2v (newpc));
140}
141
142/* store registers in the guest state (gdbserver_to_valgrind)
143   or fetch register from the guest state (valgrind_to_gdbserver). */
144static
145void transfer_register (ThreadId tid, int abs_regno, void * buf,
146                        transfer_direction dir, int size, Bool *mod)
147{
148   ThreadState* tst = VG_(get_ThreadState)(tid);
149   int set = abs_regno / num_regs;
150   int regno = abs_regno % num_regs;
151   *mod = False;
152
153   VexGuestMIPS64State* mips1 = (VexGuestMIPS64State*) get_arch (set, tst);
154
155   switch (regno) {
156   case 0:  VG_(transfer) (&mips1->guest_r0,  buf, dir, size, mod); break;
157   case 1:  VG_(transfer) (&mips1->guest_r1,  buf, dir, size, mod); break;
158   case 2:  VG_(transfer) (&mips1->guest_r2,  buf, dir, size, mod); break;
159   case 3:  VG_(transfer) (&mips1->guest_r3,  buf, dir, size, mod); break;
160   case 4:  VG_(transfer) (&mips1->guest_r4,  buf, dir, size, mod); break;
161   case 5:  VG_(transfer) (&mips1->guest_r5,  buf, dir, size, mod); break;
162   case 6:  VG_(transfer) (&mips1->guest_r6,  buf, dir, size, mod); break;
163   case 7:  VG_(transfer) (&mips1->guest_r7,  buf, dir, size, mod); break;
164   case 8:  VG_(transfer) (&mips1->guest_r8,  buf, dir, size, mod); break;
165   case 9:  VG_(transfer) (&mips1->guest_r9,  buf, dir, size, mod); break;
166   case 10: VG_(transfer) (&mips1->guest_r10,  buf, dir, size, mod); break;
167   case 11: VG_(transfer) (&mips1->guest_r11,  buf, dir, size, mod); break;
168   case 12: VG_(transfer) (&mips1->guest_r12, buf, dir, size, mod); break;
169   case 13: VG_(transfer) (&mips1->guest_r13, buf, dir, size, mod); break;
170   case 14: VG_(transfer) (&mips1->guest_r14, buf, dir, size, mod); break;
171   case 15: VG_(transfer) (&mips1->guest_r15, buf, dir, size, mod); break;
172   case 16: VG_(transfer) (&mips1->guest_r16, buf, dir, size, mod); break;
173   case 17: VG_(transfer) (&mips1->guest_r17, buf, dir, size, mod); break;
174   case 18: VG_(transfer) (&mips1->guest_r18,  buf, dir, size, mod); break;
175   case 19: VG_(transfer) (&mips1->guest_r19,  buf, dir, size, mod); break;
176   case 20: VG_(transfer) (&mips1->guest_r20,  buf, dir, size, mod); break;
177   case 21: VG_(transfer) (&mips1->guest_r21,  buf, dir, size, mod); break;
178   case 22: VG_(transfer) (&mips1->guest_r22,  buf, dir, size, mod); break;
179   case 23: VG_(transfer) (&mips1->guest_r23,  buf, dir, size, mod); break;
180   case 24: VG_(transfer) (&mips1->guest_r24,  buf, dir, size, mod); break;
181   case 25: VG_(transfer) (&mips1->guest_r25,  buf, dir, size, mod); break;
182   case 26: VG_(transfer) (&mips1->guest_r26,  buf, dir, size, mod); break;
183   case 27: VG_(transfer) (&mips1->guest_r27,  buf, dir, size, mod); break;
184   case 28: VG_(transfer) (&mips1->guest_r28, buf, dir, size, mod); break;
185   case 29: VG_(transfer) (&mips1->guest_r29, buf, dir, size, mod); break;
186   case 30: VG_(transfer) (&mips1->guest_r30, buf, dir, size, mod); break;
187   case 31: VG_(transfer) (&mips1->guest_r31, buf, dir, size, mod); break;
188   case 32: *mod = False; break; // GDBTD???? VEX { "status", 1024, 64 }
189   case 33: VG_(transfer) (&mips1->guest_LO, buf, dir, size, mod); break;
190   case 34: VG_(transfer) (&mips1->guest_HI, buf, dir, size, mod); break;
191   case 35: *mod = False; break; // GDBTD???? VEX { "badvaddr", 1120, 64 },
192   case 36: *mod = False; break; // GDBTD???? VEX { "cause", 1152, 64 },
193   case 37: VG_(transfer) (&mips1->guest_PC,  buf, dir, size, mod); break;
194   case 38: VG_(transfer) (&mips1->guest_f0,  buf, dir, size, mod); break;
195   case 39: VG_(transfer) (&mips1->guest_f1,  buf, dir, size, mod); break;
196   case 40: VG_(transfer) (&mips1->guest_f2,  buf, dir, size, mod); break;
197   case 41: VG_(transfer) (&mips1->guest_f3,  buf, dir, size, mod); break;
198   case 42: VG_(transfer) (&mips1->guest_f4,  buf, dir, size, mod); break;
199   case 43: VG_(transfer) (&mips1->guest_f5,  buf, dir, size, mod); break;
200   case 44: VG_(transfer) (&mips1->guest_f6,  buf, dir, size, mod); break;
201   case 45: VG_(transfer) (&mips1->guest_f7, buf, dir, size, mod); break;
202   case 46: VG_(transfer) (&mips1->guest_f8, buf, dir, size, mod); break;
203   case 47: VG_(transfer) (&mips1->guest_f9, buf, dir, size, mod); break;
204   case 48: VG_(transfer) (&mips1->guest_f10, buf, dir, size, mod); break;
205   case 49: VG_(transfer) (&mips1->guest_f11, buf, dir, size, mod); break;
206   case 50: VG_(transfer) (&mips1->guest_f12, buf, dir, size, mod); break;
207   case 51: VG_(transfer) (&mips1->guest_f13,  buf, dir, size, mod); break;
208   case 52: VG_(transfer) (&mips1->guest_f14,  buf, dir, size, mod); break;
209   case 53: VG_(transfer) (&mips1->guest_f15,  buf, dir, size, mod); break;
210   case 54: VG_(transfer) (&mips1->guest_f16,  buf, dir, size, mod); break;
211   case 55: VG_(transfer) (&mips1->guest_f17,  buf, dir, size, mod); break;
212   case 56: VG_(transfer) (&mips1->guest_f18,  buf, dir, size, mod); break;
213   case 57: VG_(transfer) (&mips1->guest_f19, buf, dir, size, mod); break;
214   case 58: VG_(transfer) (&mips1->guest_f20, buf, dir, size, mod); break;
215   case 59: VG_(transfer) (&mips1->guest_f21, buf, dir, size, mod); break;
216   case 60: VG_(transfer) (&mips1->guest_f22, buf, dir, size, mod); break;
217   case 61: VG_(transfer) (&mips1->guest_f23, buf, dir, size, mod); break;
218   case 62: VG_(transfer) (&mips1->guest_f24,  buf, dir, size, mod); break;
219   case 63: VG_(transfer) (&mips1->guest_f25,  buf, dir, size, mod); break;
220   case 64: VG_(transfer) (&mips1->guest_f26,  buf, dir, size, mod); break;
221   case 65: VG_(transfer) (&mips1->guest_f27,  buf, dir, size, mod); break;
222   case 66: VG_(transfer) (&mips1->guest_f28,  buf, dir, size, mod); break;
223   case 67: VG_(transfer) (&mips1->guest_f29,  buf, dir, size, mod); break;
224   case 68: VG_(transfer) (&mips1->guest_f30, buf, dir, size, mod); break;
225   case 69: VG_(transfer) (&mips1->guest_f31, buf, dir, size, mod); break;
226   case 70: VG_(transfer) (&mips1->guest_FCSR, buf, dir, size, mod); break;
227   case 71: VG_(transfer) (&mips1->guest_FIR, buf, dir, size, mod); break;
228   case 72: *mod = False; break; // GDBTD???? VEX{ "restart", 2304, 64 },
229   default: VG_(printf)("regno: %d\n", regno); vg_assert(0);
230   }
231}
232
233static
234const char* target_xml (Bool shadow_mode)
235{
236   if (shadow_mode) {
237      return "mips64-linux-valgrind.xml";
238   } else {
239      return "mips64-linux.xml";
240   }
241}
242
243static struct valgrind_target_ops low_target = {
244   num_regs,
245   regs,
246   29, //sp = r29, which is register offset 29 in regs
247   transfer_register,
248   get_pc,
249   set_pc,
250   "mips64",
251   target_xml
252};
253
254void mips64_init_architecture (struct valgrind_target_ops *target)
255{
256   *target = low_target;
257   set_register_cache (regs, num_regs);
258   gdbserver_expedite_regs = expedite_regs;
259}
260