1#if defined(__mips_hard_float) 2#include <setjmp.h> 3#include <signal.h> 4#include <stdint.h> 5#include <stdio.h> 6 7unsigned int mem[] = { 8 0x4095A266, 0x66666666, 9 0xBFF00000, 0x00000000, 10 0x3FF00000, 0x00000000, 11 0x252a2e2b, 0x262d2d2a, 12 0xFFFFFFFF, 0xFFFFFFFF, 13 0x41D26580, 0xB487E5C9, 14 0x42026580, 0xB750E388, 15 0x3E45798E, 0xE2308C3A, 16 0x3FBF9ADD, 0x3746F65F 17}; 18 19long long meml[] = { 20 0x236457894095A266, 0x7777777766666666, 21 0xBFF00000aaaaccde, 0x0004563217800000, 22 0x3FF0556644770000, 0x0002255889900000, 23 0x25254123698a2e2b, 0x21a2b3d6f62d2d2a, 24 0xFFaabb22ccFFFFFF, 0x542698eeFFFFFFFF, 25 0x41D2658041D26580, 0xB487E5C9B487E5C9, 26 0x420774411aa26580, 0xaabbccddB750E388, 27 0xffffeeee3E45798E, 0xccccccccE2308C3A, 28 0x123abb983FBF9ADD, 0x002255443746F65F 29}; 30 31float fs_f[] = { 32 0, 456.2489562, 3, -1, 33 1384.6, -7.2945676, 1000000000, -5786.47, 34 1752, 0.0024575, 0.00000001, -248562.76, 35 -45786.476, 456.2489562, 34.00046, 45786.476, 36 1752065, 107, -45667.24, -7.2945676, 37 -347856.475, 356047.56, -1.0, 23.04 38}; 39 40double fs_d[] = { 41 0, 456.2489562, 3, -1, 42 1384.6, -7.2945676, 1000000000, -5786.47, 43 1752, 0.0024575, 0.00000001, -248562.76, 44 -45786.476, 456.2489562, 34.00046, 45786.476, 45 1752065, 107, -45667.24, -7.2945676, 46 -347856.475, 356047.56, -1.0, 23.04 47}; 48 49double mem1[] = { 50 0, 0, 0, 0, 51 0, 0, 0, 0, 52 0, 0, 0, 0, 53 0, 0, 0, 0 54}; 55 56float mem1f[] = { 57 0, 0, 0, 0, 58 0, 0, 0, 0, 59 0, 0, 0, 0, 60 0, 0, 0, 0 61}; 62 63// ldc1 $f0, 0($t1) 64#define TESTINSN5LOAD(instruction, RTval, offset, RT) \ 65{ \ 66 double out; \ 67 uint64_t outl; \ 68 __asm__ volatile( \ 69 "move $t1, %1\n\t" \ 70 "li $t0, " #RTval"\n\t" \ 71 instruction "\n\t" \ 72 "mov.d %0, $" #RT "\n\t" \ 73 "sdc1 $" #RT ", 0(%3) \n\t" \ 74 : "=&f" (out) \ 75 : "r" (mem), "r" (RTval), "r" (&outl) \ 76 : "t0", "t1", "$"#RT, "memory" \ 77 ); \ 78 printf("%s :: ft 0x%x%x\n", \ 79 instruction, (uint32_t)outl, (uint32_t)(outl >> 32)); \ 80} 81 82// lwc1 $f0, 0($t1) 83#define TESTINSN5LOADw(instruction, RTval, offset, RT) \ 84{ \ 85 double out; \ 86 int out1; \ 87 __asm__ volatile( \ 88 "move $t1, %2\n\t" \ 89 "li $t0, " #RTval"\n\t" \ 90 instruction "\n\t" \ 91 "mov.d %0, $" #RT "\n\t" \ 92 "mfc1 %1, $" #RT "\n\t" \ 93 : "=f" (out), "=r" (out1) \ 94 : "r" (mem), "r" (RTval) \ 95 : "t0", "t1", "$"#RT, "memory" \ 96 ); \ 97 printf("%s :: ft 0x%x\n", \ 98 instruction, out1); \ 99} 100 101// lwxc1 $f0, $a3($v0) 102#define TESTINSN6LOADw(instruction, indexVal, fd, index, base) \ 103{ \ 104 int out; \ 105 __asm__ volatile( \ 106 "move $" #base ", %1\n\t" \ 107 "li $" #index ", " #indexVal"\n\t" \ 108 instruction "\n\t" \ 109 "mfc1 %0, $" #fd "\n\t" \ 110 : "=r" (out) \ 111 : "r" (mem) \ 112 : #base, #index, "$"#fd, "memory" \ 113 ); \ 114 printf("%s :: ft 0x%x\n", \ 115 instruction, out); \ 116} 117 118// ldxc1 $f0, $a3($v0) 119#define TESTINSN6LOADd(instruction, indexVal, fd, index, base) \ 120{ \ 121 uint64_t out; \ 122 __asm__ volatile( \ 123 "move $" #base ", %0\n\t" \ 124 "li $" #index ", " #indexVal"\n\t" \ 125 instruction "\n\t" \ 126 "sdc1 $"#fd ", 0(%1)" \ 127 : : "r" (mem), "r" (&out) \ 128 : #base, #index, "$"#fd, "memory" \ 129 ); \ 130 printf("%s :: ft lo: 0x%x, ft hi: 0x%x\n", \ 131 instruction, (uint32_t)out, (uint32_t)(out >> 32)); \ 132} 133 134// luxc1 $f0, $a3($v0) 135#define TESTINSN6LOADlu(instruction, indexVal, fd, index, base) \ 136{ \ 137 uint64_t out; \ 138 __asm__ volatile( \ 139 "move $" #base ", %0\n\t" \ 140 "li $" #index ", " #indexVal"\n\t" \ 141 instruction "\n\t" \ 142 "sdc1 $"#fd ", 0(%1)" \ 143 : : "r" (meml), "r" (&out) \ 144 : #base, #index, "$"#fd, "memory" \ 145 ); \ 146 printf("%s :: ft lo: 0x%x, ft hi: 0x%x\n", \ 147 instruction, (uint32_t)out, (uint32_t)(out >> 32)); \ 148} 149 150// sdc1 $f0, 0($t0) 151#define TESTINST1(offset) \ 152{ \ 153 unsigned int out; \ 154 __asm__ volatile( \ 155 "move $t0, %1\n\t" \ 156 "move $t1, %2\n\t" \ 157 "ldc1 $f0, "#offset"($t1)\n\t" \ 158 "sdc1 $f0, "#offset"($t0) \n\t" \ 159 "lw %0, "#offset"($t0)\n\t" \ 160 : "=r" (out) \ 161 : "r" (mem1), "r" (fs_d) \ 162 : "t1", "t0", "$f0", "memory" \ 163 ); \ 164 printf("sdc1 $f0, 0($t0) :: out: 0x%x\n", \ 165 out); \ 166} 167 168// sdxc1 $f0, $t2($t0) 169#define TESTINST1a(offset) \ 170{ \ 171 unsigned int out; \ 172 unsigned int out1; \ 173 __asm__ volatile( \ 174 "move $t0, %2\n\t" \ 175 "move $t1, %3\n\t" \ 176 "li $t2, "#offset"\n\t" \ 177 "ldc1 $f0, "#offset"($t1)\n\t" \ 178 "sdxc1 $f0, $t2($t0) \n\t" \ 179 "lw %0, "#offset"($t0)\n\t" \ 180 "addi $t0, $t0, 4 \n\t" \ 181 "lw %1, "#offset"($t0)\n\t" \ 182 : "=r" (out), "=r" (out1) \ 183 : "r" (mem1), "r" (fs_d) \ 184 : "t2", "t1", "t0", "$f0", "memory" \ 185 ); \ 186 printf("sdc1 $f0, #t2($t0) :: out: 0x%x : out1: 0x%x\n", \ 187 out, out1); \ 188} 189 190// SUXC1 $f0, $t2($t0) 191#define TESTINST1b(offset, unligned_offset) \ 192{ \ 193 unsigned int out; \ 194 unsigned int out1; \ 195 __asm__ volatile( \ 196 "move $t0, %2\n\t" \ 197 "move $t1, %3\n\t" \ 198 "li $t2, "#unligned_offset"\n\t" \ 199 "ldc1 $f0, "#offset"($t1)\n\t" \ 200 "suxc1 $f0, $t2($t0) \n\t" \ 201 "lw %0, "#offset"($t0)\n\t" \ 202 "addi $t0, $t0, 4 \n\t" \ 203 "lw %1, "#offset"($t0)\n\t" \ 204 : "=r" (out), "=r" (out1) \ 205 : "r" (mem1), "r" (fs_d) \ 206 : "t2", "t1", "t0", "$f0", "memory" \ 207 ); \ 208 printf("suxc1 $f0, #t2($t0) :: out: 0x%x : out1: 0x%x\n", \ 209 out, out1); \ 210} 211 212// swc1 $f0, 0($t0) 213#define TESTINST2(offset) \ 214{ \ 215 unsigned int out; \ 216 __asm__ volatile( \ 217 "move $t0, %1\n\t" \ 218 "move $t1, %2\n\t" \ 219 "lwc1 $f0, "#offset"($t1)\n\t" \ 220 "swc1 $f0, "#offset"($t0) \n\t" \ 221 "lw %0, "#offset"($t0)\n\t" \ 222 : "=r" (out) \ 223 : "r" (mem1f), "r" (fs_f) \ 224 : "t1", "t0", "$f0", "memory" \ 225 ); \ 226 printf("swc1 $f0, 0($t0) :: out: 0x%x\n", \ 227 out); \ 228} 229 230// SWXC1 $f0, $t2($t0) 231#define TESTINST2a(offset) \ 232{ \ 233 unsigned int out; \ 234 __asm__ volatile( \ 235 "move $t0, %1\n\t" \ 236 "move $t1, %2\n\t" \ 237 "li $t2, "#offset" \n\t" \ 238 "lwc1 $f0, "#offset"($t1)\n\t" \ 239 "swxc1 $f0, $t2($t0) \n\t" \ 240 "lw %0, "#offset"($t0)\n\t" \ 241 : "=r" (out) \ 242 : "r" (mem1f), "r" (fs_f) \ 243 : "t2", "t1", "t0", "$f0", "memory" \ 244 ); \ 245 printf("swxc1 $f0, 0($t0) :: out: 0x%x\n", \ 246 out); \ 247} 248 249#define TEST_FPU64 \ 250 __asm__ __volatile__( \ 251 "cvt.l.s $f0, $f0" "\n\t" \ 252 : \ 253 : \ 254 : "$f0" \ 255 ); 256 257static void handler(int sig) 258{ 259 exit(0); 260} 261 262void ppMem(double *m, int len) 263{ 264 int i; 265 printf("MEM1:\n"); 266 for (i = 0; i < len; i=i+4) 267 { 268 printf("%lf, %lf, %lf, %lf\n", m[i], m[i+1], m[i+2], m[i+3]); 269 m[i] = 0; 270 m[i+1] = 0; 271 m[i+2] = 0; 272 m[i+3] = 0; 273 } 274} 275 276void ppMemF(float *m, int len) 277{ 278 int i; 279 printf("MEM1:\n"); 280 for (i = 0; i < len; i=i+4) 281 { 282 printf("%lf, %lf, %lf, %lf\n", m[i], m[i+1], m[i+2], m[i+3]); 283 m[i] = 0; 284 m[i+1] = 0; 285 m[i+2] = 0; 286 m[i+3] = 0; 287 } 288} 289 290int main() 291{ 292 printf("LDC1\n"); 293 TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0); 294 TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0); 295 TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0); 296 TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0); 297 TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0); 298 TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0); 299 TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0); 300 TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0); 301 TESTINSN5LOAD("ldc1 $f0, 64($t1)", 0, 64, f0); 302 TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0); 303 TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0); 304 TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0); 305 TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0); 306 TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0); 307 TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0); 308 TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0); 309 TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0); 310 TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0); 311 TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0); 312 TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0); 313 TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0); 314 TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0); 315 TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0); 316 TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0); 317 TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0); 318 TESTINSN5LOAD("ldc1 $f0, 64($t1)", 0, 64, f0); 319 TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0); 320 321 printf("LWC1\n"); 322 TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0); 323 TESTINSN5LOADw("lwc1 $f0, 4($t1)", 0, 4, f0); 324 TESTINSN5LOADw("lwc1 $f0, 8($t1)", 0, 8, f0); 325 TESTINSN5LOADw("lwc1 $f0, 12($t1)", 0, 12, f0); 326 TESTINSN5LOADw("lwc1 $f0, 16($t1)", 0, 16, f0); 327 TESTINSN5LOADw("lwc1 $f0, 20($t1)", 0, 20, f0); 328 TESTINSN5LOADw("lwc1 $f0, 24($t1)", 0, 24, f0); 329 TESTINSN5LOADw("lwc1 $f0, 28($t1)", 0, 28, f0); 330 TESTINSN5LOADw("lwc1 $f0, 32($t1)", 0, 32, f0); 331 TESTINSN5LOADw("lwc1 $f0, 36($t1)", 0, 36, f0); 332 TESTINSN5LOADw("lwc1 $f0, 40($t1)", 0, 40, f0); 333 TESTINSN5LOADw("lwc1 $f0, 44($t1)", 0, 44, f0); 334 TESTINSN5LOADw("lwc1 $f0, 48($t1)", 0, 48, f0); 335 TESTINSN5LOADw("lwc1 $f0, 52($t1)", 0, 52, f0); 336 TESTINSN5LOADw("lwc1 $f0, 56($t1)", 0, 56, f0); 337 TESTINSN5LOADw("lwc1 $f0, 60($t1)", 0, 60, f0); 338 TESTINSN5LOADw("lwc1 $f0, 64($t1)", 0, 64, f0); 339 TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0); 340 TESTINSN5LOADw("lwc1 $f0, 8($t1)", 0, 8, f0); 341 TESTINSN5LOADw("lwc1 $f0, 16($t1)", 0, 16, f0); 342 TESTINSN5LOADw("lwc1 $f0, 24($t1)", 0, 24, f0); 343 TESTINSN5LOADw("lwc1 $f0, 32($t1)", 0, 32, f0); 344 TESTINSN5LOADw("lwc1 $f0, 40($t1)", 0, 40, f0); 345 TESTINSN5LOADw("lwc1 $f0, 48($t1)", 0, 48, f0); 346 TESTINSN5LOADw("lwc1 $f0, 56($t1)", 0, 56, f0); 347 TESTINSN5LOADw("lwc1 $f0, 64($t1)", 0, 64, f0); 348 TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0); 349 350#if (__mips==32) && (__mips_isa_rev>=2) 351 printf("LWXC1\n"); 352 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 0, f0, a3, v0); 353 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 4, f0, a3, v0); 354 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 8, f0, a3, v0); 355 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 12, f0, a3, v0); 356 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 16, f0, a3, v0); 357 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 20, f0, a3, v0); 358 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 24, f0, a3, v0); 359 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 28, f0, a3, v0); 360 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 32, f0, a3, v0); 361 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 36, f0, a3, v0); 362 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 40, f0, a3, v0); 363 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 44, f0, a3, v0); 364 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 48, f0, a3, v0); 365 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 52, f0, a3, v0); 366 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 56, f0, a3, v0); 367 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 60, f0, a3, v0); 368 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 64, f0, a3, v0); 369 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 0, f0, a3, v0); 370 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 4, f0, a3, v0); 371 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 8, f0, a3, v0); 372 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 12, f0, a3, v0); 373 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 16, f0, a3, v0); 374 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 20, f0, a3, v0); 375 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 24, f0, a3, v0); 376 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 28, f0, a3, v0); 377 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 32, f0, a3, v0); 378 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 36, f0, a3, v0); 379 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 40, f0, a3, v0); 380 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 44, f0, a3, v0); 381 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 48, f0, a3, v0); 382 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 52, f0, a3, v0); 383 TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 56, f0, a3, v0); 384 385 printf("LDXC1\n"); 386 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0); 387 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0); 388 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0); 389 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0); 390 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0); 391 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0); 392 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0); 393 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0); 394 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0); 395 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0); 396 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0); 397 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0); 398 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0); 399 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0); 400 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0); 401 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0); 402 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0); 403 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0); 404 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0); 405 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0); 406 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0); 407 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0); 408 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0); 409 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0); 410 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0); 411 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0); 412 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0); 413 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0); 414 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0); 415 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0); 416 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0); 417 TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0); 418#endif 419 420 printf("SDC1\n"); 421 TESTINST1(0); 422 TESTINST1(8); 423 TESTINST1(16); 424 TESTINST1(24); 425 TESTINST1(32); 426 TESTINST1(40); 427 TESTINST1(48); 428 TESTINST1(56); 429 TESTINST1(64); 430 ppMem(mem1, 16); 431 432#if (__mips==32) && (__mips_isa_rev>=2) 433 printf("SDXC1\n"); 434 TESTINST1a(0); 435 TESTINST1a(8); 436 TESTINST1a(16); 437 TESTINST1a(24); 438 TESTINST1a(32); 439 TESTINST1a(40); 440 TESTINST1a(48); 441 TESTINST1a(56); 442 TESTINST1a(64); 443 ppMem(mem1, 16); 444#endif 445 446 printf("SWC1\n"); 447 TESTINST2(0); 448 TESTINST2(8); 449 TESTINST2(16); 450 TESTINST2(24); 451 TESTINST2(32); 452 TESTINST2(40); 453 TESTINST2(48); 454 TESTINST2(56); 455 TESTINST2(64); 456 ppMemF(mem1f, 16); 457 458#if (__mips==32) && (__mips_isa_rev>=2) 459 printf("SWXC1\n"); 460 TESTINST2a(0); 461 TESTINST2a(8); 462 TESTINST2a(16); 463 TESTINST2a(24); 464 TESTINST2a(32); 465 TESTINST2a(40); 466 TESTINST2a(48); 467 TESTINST2a(56); 468 TESTINST2a(64); 469 ppMemF(mem1f, 16); 470#endif 471 472#if (__mips==32) && (__mips_isa_rev>=2) && (__mips_fpr==64 || __mips_fpr==xx) 473 signal(SIGILL, handler); 474 /* Test fpu64 mode. */ 475 TEST_FPU64; 476 477 printf("luxc1\n"); 478 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0); 479 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0); 480 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0); 481 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0); 482 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0); 483 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0); 484 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0); 485 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0); 486 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0); 487 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0); 488 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0); 489 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0); 490 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0); 491 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0); 492 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0); 493 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0); 494 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0); 495 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0); 496 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0); 497 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0); 498 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0); 499 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0); 500 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0); 501 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 40, f0, a3, v0); 502 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 48, f0, a3, v0); 503 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 56, f0, a3, v0); 504 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 64, f0, a3, v0); 505 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 0, f0, a3, v0); 506 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 8, f0, a3, v0); 507 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 16, f0, a3, v0); 508 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 24, f0, a3, v0); 509 TESTINSN6LOADlu("luxc1 $f0, $a3($v0)", 32, f0, a3, v0); 510 511 printf("SUXC1\n"); 512 TESTINST1b(0, 0); 513 TESTINST1b(0, 1); 514 TESTINST1b(8, 8); 515 TESTINST1b(8, 9); 516 TESTINST1b(16, 16); 517 TESTINST1b(16, 17); 518 TESTINST1b(24, 24); 519 TESTINST1b(24, 25); 520 TESTINST1b(32, 32); 521 TESTINST1b(32, 35); 522 TESTINST1b(40, 40); 523 TESTINST1b(40, 42); 524 TESTINST1b(48, 48); 525 TESTINST1b(48, 50); 526 TESTINST1b(56, 56); 527 TESTINST1b(56, 60); 528 TESTINST1b(64, 64); 529 TESTINST1b(64, 67); 530 ppMem(mem1, 16); 531#endif 532 return 0; 533} 534#else 535int main() { 536 return 0; 537} 538#endif 539