1// Copyright 2015, VIXL authors 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are met: 6// 7// * Redistributions of source code must retain the above copyright notice, 8// this list of conditions and the following disclaimer. 9// * Redistributions in binary form must reproduce the above copyright notice, 10// this list of conditions and the following disclaimer in the documentation 11// and/or other materials provided with the distribution. 12// * Neither the name of ARM Limited nor the names of its contributors may be 13// used to endorse or promote products derived from this software without 14// specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27#ifndef VIXL_AARCH64_SIMULATOR_CONSTANTS_AARCH64_H_ 28#define VIXL_AARCH64_SIMULATOR_CONSTANTS_AARCH64_H_ 29 30#include "instructions-aarch64.h" 31 32namespace vixl { 33namespace aarch64 { 34 35// Debug instructions. 36// 37// VIXL's macro-assembler and simulator support a few pseudo instructions to 38// make debugging easier. These pseudo instructions do not exist on real 39// hardware. 40// 41// TODO: Also consider allowing these pseudo-instructions to be disabled in the 42// simulator, so that users can check that the input is a valid native code. 43// (This isn't possible in all cases. Printf won't work, for example.) 44// 45// Each debug pseudo instruction is represented by a HLT instruction. The HLT 46// immediate field is used to identify the type of debug pseudo instruction. 47 48enum DebugHltOpcodes { 49 kUnreachableOpcode = 0xdeb0, 50 kPrintfOpcode, 51 kTraceOpcode, 52 kLogOpcode, 53 kRuntimeCallOpcode, 54 // Aliases. 55 kDebugHltFirstOpcode = kUnreachableOpcode, 56 kDebugHltLastOpcode = kLogOpcode 57}; 58 59// Each pseudo instruction uses a custom encoding for additional arguments, as 60// described below. 61 62// Unreachable - kUnreachableOpcode 63// 64// Instruction which should never be executed. This is used as a guard in parts 65// of the code that should not be reachable, such as in data encoded inline in 66// the instructions. 67 68// Printf - kPrintfOpcode 69// - arg_count: The number of arguments. 70// - arg_pattern: A set of PrintfArgPattern values, packed into two-bit fields. 71// 72// Simulate a call to printf. 73// 74// Floating-point and integer arguments are passed in separate sets of registers 75// in AAPCS64 (even for varargs functions), so it is not possible to determine 76// the type of each argument without some information about the values that were 77// passed in. This information could be retrieved from the printf format string, 78// but the format string is not trivial to parse so we encode the relevant 79// information with the HLT instruction. 80// 81// Also, the following registers are populated (as if for a native Aarch64 82// call): 83// x0: The format string 84// x1-x7: Optional arguments, if type == CPURegister::kRegister 85// d0-d7: Optional arguments, if type == CPURegister::kFPRegister 86const unsigned kPrintfArgCountOffset = 1 * kInstructionSize; 87const unsigned kPrintfArgPatternListOffset = 2 * kInstructionSize; 88const unsigned kPrintfLength = 3 * kInstructionSize; 89 90const unsigned kPrintfMaxArgCount = 4; 91 92// The argument pattern is a set of two-bit-fields, each with one of the 93// following values: 94enum PrintfArgPattern { 95 kPrintfArgW = 1, 96 kPrintfArgX = 2, 97 // There is no kPrintfArgS because floats are always converted to doubles in C 98 // varargs calls. 99 kPrintfArgD = 3 100}; 101static const unsigned kPrintfArgPatternBits = 2; 102 103// Trace - kTraceOpcode 104// - parameter: TraceParameter stored as a uint32_t 105// - command: TraceCommand stored as a uint32_t 106// 107// Allow for trace management in the generated code. This enables or disables 108// automatic tracing of the specified information for every simulated 109// instruction. 110const unsigned kTraceParamsOffset = 1 * kInstructionSize; 111const unsigned kTraceCommandOffset = 2 * kInstructionSize; 112const unsigned kTraceLength = 3 * kInstructionSize; 113 114// Trace parameters. 115enum TraceParameters { 116 LOG_DISASM = 1 << 0, // Log disassembly. 117 LOG_REGS = 1 << 1, // Log general purpose registers. 118 LOG_VREGS = 1 << 2, // Log NEON and floating-point registers. 119 LOG_SYSREGS = 1 << 3, // Log the flags and system registers. 120 LOG_WRITE = 1 << 4, // Log writes to memory. 121 LOG_BRANCH = 1 << 5, // Log taken branches. 122 123 LOG_NONE = 0, 124 LOG_STATE = LOG_REGS | LOG_VREGS | LOG_SYSREGS, 125 LOG_ALL = LOG_DISASM | LOG_STATE | LOG_WRITE | LOG_BRANCH 126}; 127 128// Trace commands. 129enum TraceCommand { TRACE_ENABLE = 1, TRACE_DISABLE = 2 }; 130 131// Log - kLogOpcode 132// - parameter: TraceParameter stored as a uint32_t 133// 134// Print the specified information once. This mechanism is separate from Trace. 135// In particular, _all_ of the specified registers are printed, rather than just 136// the registers that the instruction writes. 137// 138// Any combination of the TraceParameters values can be used, except that 139// LOG_DISASM is not supported for Log. 140const unsigned kLogParamsOffset = 1 * kInstructionSize; 141const unsigned kLogLength = 2 * kInstructionSize; 142 143// Runtime call simulation - kRuntimeCall 144enum RuntimeCallType { kCallRuntime, kTailCallRuntime }; 145 146const unsigned kRuntimeCallWrapperOffset = 1 * kInstructionSize; 147// The size of a pointer on host. 148const unsigned kRuntimeCallAddressSize = sizeof(uintptr_t); 149const unsigned kRuntimeCallFunctionOffset = 150 kRuntimeCallWrapperOffset + kRuntimeCallAddressSize; 151const unsigned kRuntimeCallTypeOffset = 152 kRuntimeCallFunctionOffset + kRuntimeCallAddressSize; 153const unsigned kRuntimeCallLength = kRuntimeCallTypeOffset + sizeof(uint32_t); 154} // namespace aarch64 155} // namespace vixl 156 157#endif // VIXL_AARCH64_SIMULATOR_CONSTANTS_AARCH64_H_ 158