1// Copyright 2016, VIXL authors 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are met: 6// 7// * Redistributions of source code must retain the above copyright notice, 8// this list of conditions and the following disclaimer. 9// * Redistributions in binary form must reproduce the above copyright notice, 10// this list of conditions and the following disclaimer in the documentation 11// and/or other materials provided with the distribution. 12// * Neither the name of ARM Limited nor the names of its contributors may be 13// used to endorse or promote products derived from this software without 14// specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27 28// ----------------------------------------------------------------------------- 29// This file is auto generated from the 30// test/aarch32/config/template-simulator-aarch32.cc.in template file using 31// tools/generate_tests.py. 32// 33// PLEASE DO NOT EDIT. 34// ----------------------------------------------------------------------------- 35 36 37#include "test-runner.h" 38 39#include "test-utils.h" 40#include "test-utils-aarch32.h" 41 42#include "aarch32/assembler-aarch32.h" 43#include "aarch32/disasm-aarch32.h" 44#include "aarch32/macro-assembler-aarch32.h" 45 46#define __ masm. 47#define BUF_SIZE (4096) 48 49#ifdef VIXL_INCLUDE_SIMULATOR_AARCH32 50// Run tests with the simulator. 51 52#define SETUP() MacroAssembler masm(BUF_SIZE) 53 54#define START() masm.GetBuffer()->Reset() 55 56#define END() \ 57 __ Hlt(0); \ 58 __ FinalizeCode(); 59 60// TODO: Run the tests in the simulator. 61#define RUN() 62 63#else // ifdef VIXL_INCLUDE_SIMULATOR_AARCH32. 64 65#define SETUP() \ 66 MacroAssembler masm(BUF_SIZE); \ 67 UseScratchRegisterScope harness_scratch; 68 69#define START() \ 70 harness_scratch.Open(&masm); \ 71 harness_scratch.ExcludeAll(); \ 72 masm.GetBuffer()->Reset(); \ 73 __ Push(r4); \ 74 __ Push(r5); \ 75 __ Push(r6); \ 76 __ Push(r7); \ 77 __ Push(r8); \ 78 __ Push(r9); \ 79 __ Push(r10); \ 80 __ Push(r11); \ 81 __ Push(lr); \ 82 harness_scratch.Include(ip); 83 84#define END() \ 85 harness_scratch.Exclude(ip); \ 86 __ Pop(lr); \ 87 __ Pop(r11); \ 88 __ Pop(r10); \ 89 __ Pop(r9); \ 90 __ Pop(r8); \ 91 __ Pop(r7); \ 92 __ Pop(r6); \ 93 __ Pop(r5); \ 94 __ Pop(r4); \ 95 __ Bx(lr); \ 96 __ FinalizeCode(); \ 97 harness_scratch.Close(); 98 99#define RUN() \ 100 { \ 101 int pcs_offset = masm.IsUsingT32() ? 1 : 0; \ 102 masm.GetBuffer()->SetExecutable(); \ 103 ExecuteMemory(masm.GetBuffer()->GetStartAddress<byte*>(), \ 104 masm.GetSizeOfCodeGenerated(), \ 105 pcs_offset); \ 106 masm.GetBuffer()->SetWritable(); \ 107 } 108 109#endif // ifdef VIXL_INCLUDE_SIMULATOR_AARCH32 110 111namespace vixl { 112namespace aarch32 { 113 114// List of instruction encodings: 115#define FOREACH_INSTRUCTION(M) \ 116 M(Cmn) \ 117 M(Cmp) \ 118 M(Mov) \ 119 M(Movs) \ 120 M(Mvn) \ 121 M(Mvns) \ 122 M(Teq) \ 123 M(Tst) 124 125 126// The following definitions are defined again in each generated test, therefore 127// we need to place them in an anomymous namespace. It expresses that they are 128// local to this file only, and the compiler is not allowed to share these types 129// across test files during template instantiation. Specifically, `Operands` and 130// `Inputs` have various layouts across generated tests so they absolutely 131// cannot be shared. 132 133#ifdef VIXL_INCLUDE_TARGET_A32 134namespace { 135 136// Values to be passed to the assembler to produce the instruction under test. 137struct Operands { 138 Condition cond; 139 Register rd; 140 uint32_t immediate; 141}; 142 143// Input data to feed to the instruction. 144struct Inputs { 145 uint32_t apsr; 146 uint32_t rd; 147}; 148 149// This structure contains all input data needed to test one specific encoding. 150// It used to generate a loop over an instruction. 151struct TestLoopData { 152 // The `operands` fields represents the values to pass to the assembler to 153 // produce the instruction. 154 Operands operands; 155 // Description of the operands, used for error reporting. 156 const char* operands_description; 157 // Unique identifier, used for generating traces. 158 const char* identifier; 159 // Array of values to be fed to the instruction. 160 size_t input_size; 161 const Inputs* inputs; 162}; 163 164static const Inputs kCondition[] = {{NFlag, 0xabababab}, 165 {ZFlag, 0xabababab}, 166 {CFlag, 0xabababab}, 167 {VFlag, 0xabababab}, 168 {NZFlag, 0xabababab}, 169 {NCFlag, 0xabababab}, 170 {NVFlag, 0xabababab}, 171 {ZCFlag, 0xabababab}, 172 {ZVFlag, 0xabababab}, 173 {CVFlag, 0xabababab}, 174 {NZCFlag, 0xabababab}, 175 {NZVFlag, 0xabababab}, 176 {NCVFlag, 0xabababab}, 177 {ZCVFlag, 0xabababab}, 178 {NZCVFlag, 0xabababab}}; 179 180static const Inputs kModifiedImmediate[] = 181 {{NoFlag, 0x00000000}, {NoFlag, 0x00000001}, {NoFlag, 0x00000002}, 182 {NoFlag, 0x00000020}, {NoFlag, 0x0000007d}, {NoFlag, 0x0000007e}, 183 {NoFlag, 0x0000007f}, {NoFlag, 0x00007ffd}, {NoFlag, 0x00007ffe}, 184 {NoFlag, 0x00007fff}, {NoFlag, 0x33333333}, {NoFlag, 0x55555555}, 185 {NoFlag, 0x7ffffffd}, {NoFlag, 0x7ffffffe}, {NoFlag, 0x7fffffff}, 186 {NoFlag, 0x80000000}, {NoFlag, 0x80000001}, {NoFlag, 0xaaaaaaaa}, 187 {NoFlag, 0xcccccccc}, {NoFlag, 0xffff8000}, {NoFlag, 0xffff8001}, 188 {NoFlag, 0xffff8002}, {NoFlag, 0xffff8003}, {NoFlag, 0xffffff80}, 189 {NoFlag, 0xffffff81}, {NoFlag, 0xffffff82}, {NoFlag, 0xffffff83}, 190 {NoFlag, 0xffffffe0}, {NoFlag, 0xfffffffd}, {NoFlag, 0xfffffffe}, 191 {NoFlag, 0xffffffff}}; 192 193 194// A loop will be generated for each element of this array. 195const TestLoopData kTests[] = {{{eq, r0, 0x000000ab}, 196 "eq r0 0x000000ab", 197 "Condition_eq_r0_0x000000ab", 198 ARRAY_SIZE(kCondition), 199 kCondition}, 200 {{ne, r0, 0x000000ab}, 201 "ne r0 0x000000ab", 202 "Condition_ne_r0_0x000000ab", 203 ARRAY_SIZE(kCondition), 204 kCondition}, 205 {{cs, r0, 0x000000ab}, 206 "cs r0 0x000000ab", 207 "Condition_cs_r0_0x000000ab", 208 ARRAY_SIZE(kCondition), 209 kCondition}, 210 {{cc, r0, 0x000000ab}, 211 "cc r0 0x000000ab", 212 "Condition_cc_r0_0x000000ab", 213 ARRAY_SIZE(kCondition), 214 kCondition}, 215 {{mi, r0, 0x000000ab}, 216 "mi r0 0x000000ab", 217 "Condition_mi_r0_0x000000ab", 218 ARRAY_SIZE(kCondition), 219 kCondition}, 220 {{pl, r0, 0x000000ab}, 221 "pl r0 0x000000ab", 222 "Condition_pl_r0_0x000000ab", 223 ARRAY_SIZE(kCondition), 224 kCondition}, 225 {{vs, r0, 0x000000ab}, 226 "vs r0 0x000000ab", 227 "Condition_vs_r0_0x000000ab", 228 ARRAY_SIZE(kCondition), 229 kCondition}, 230 {{vc, r0, 0x000000ab}, 231 "vc r0 0x000000ab", 232 "Condition_vc_r0_0x000000ab", 233 ARRAY_SIZE(kCondition), 234 kCondition}, 235 {{hi, r0, 0x000000ab}, 236 "hi r0 0x000000ab", 237 "Condition_hi_r0_0x000000ab", 238 ARRAY_SIZE(kCondition), 239 kCondition}, 240 {{ls, r0, 0x000000ab}, 241 "ls r0 0x000000ab", 242 "Condition_ls_r0_0x000000ab", 243 ARRAY_SIZE(kCondition), 244 kCondition}, 245 {{ge, r0, 0x000000ab}, 246 "ge r0 0x000000ab", 247 "Condition_ge_r0_0x000000ab", 248 ARRAY_SIZE(kCondition), 249 kCondition}, 250 {{lt, r0, 0x000000ab}, 251 "lt r0 0x000000ab", 252 "Condition_lt_r0_0x000000ab", 253 ARRAY_SIZE(kCondition), 254 kCondition}, 255 {{gt, r0, 0x000000ab}, 256 "gt r0 0x000000ab", 257 "Condition_gt_r0_0x000000ab", 258 ARRAY_SIZE(kCondition), 259 kCondition}, 260 {{le, r0, 0x000000ab}, 261 "le r0 0x000000ab", 262 "Condition_le_r0_0x000000ab", 263 ARRAY_SIZE(kCondition), 264 kCondition}, 265 {{al, r0, 0x000000ab}, 266 "al r0 0x000000ab", 267 "Condition_al_r0_0x000000ab", 268 ARRAY_SIZE(kCondition), 269 kCondition}, 270 {{al, r0, 0x00000000}, 271 "al r0 0x00000000", 272 "ModifiedImmediate_al_r0_0x00000000", 273 ARRAY_SIZE(kModifiedImmediate), 274 kModifiedImmediate}, 275 {{al, r0, 0x000000ff}, 276 "al r0 0x000000ff", 277 "ModifiedImmediate_al_r0_0x000000ff", 278 ARRAY_SIZE(kModifiedImmediate), 279 kModifiedImmediate}, 280 {{al, r0, 0xc000003f}, 281 "al r0 0xc000003f", 282 "ModifiedImmediate_al_r0_0xc000003f", 283 ARRAY_SIZE(kModifiedImmediate), 284 kModifiedImmediate}, 285 {{al, r0, 0xf000000f}, 286 "al r0 0xf000000f", 287 "ModifiedImmediate_al_r0_0xf000000f", 288 ARRAY_SIZE(kModifiedImmediate), 289 kModifiedImmediate}, 290 {{al, r0, 0xfc000003}, 291 "al r0 0xfc000003", 292 "ModifiedImmediate_al_r0_0xfc000003", 293 ARRAY_SIZE(kModifiedImmediate), 294 kModifiedImmediate}, 295 {{al, r0, 0xff000000}, 296 "al r0 0xff000000", 297 "ModifiedImmediate_al_r0_0xff000000", 298 ARRAY_SIZE(kModifiedImmediate), 299 kModifiedImmediate}, 300 {{al, r0, 0x3fc00000}, 301 "al r0 0x3fc00000", 302 "ModifiedImmediate_al_r0_0x3fc00000", 303 ARRAY_SIZE(kModifiedImmediate), 304 kModifiedImmediate}, 305 {{al, r0, 0x0ff00000}, 306 "al r0 0x0ff00000", 307 "ModifiedImmediate_al_r0_0x0ff00000", 308 ARRAY_SIZE(kModifiedImmediate), 309 kModifiedImmediate}, 310 {{al, r0, 0x03fc0000}, 311 "al r0 0x03fc0000", 312 "ModifiedImmediate_al_r0_0x03fc0000", 313 ARRAY_SIZE(kModifiedImmediate), 314 kModifiedImmediate}, 315 {{al, r0, 0x00ff0000}, 316 "al r0 0x00ff0000", 317 "ModifiedImmediate_al_r0_0x00ff0000", 318 ARRAY_SIZE(kModifiedImmediate), 319 kModifiedImmediate}, 320 {{al, r0, 0x003fc000}, 321 "al r0 0x003fc000", 322 "ModifiedImmediate_al_r0_0x003fc000", 323 ARRAY_SIZE(kModifiedImmediate), 324 kModifiedImmediate}, 325 {{al, r0, 0x000ff000}, 326 "al r0 0x000ff000", 327 "ModifiedImmediate_al_r0_0x000ff000", 328 ARRAY_SIZE(kModifiedImmediate), 329 kModifiedImmediate}, 330 {{al, r0, 0x0003fc00}, 331 "al r0 0x0003fc00", 332 "ModifiedImmediate_al_r0_0x0003fc00", 333 ARRAY_SIZE(kModifiedImmediate), 334 kModifiedImmediate}, 335 {{al, r0, 0x0000ff00}, 336 "al r0 0x0000ff00", 337 "ModifiedImmediate_al_r0_0x0000ff00", 338 ARRAY_SIZE(kModifiedImmediate), 339 kModifiedImmediate}, 340 {{al, r0, 0x00003fc0}, 341 "al r0 0x00003fc0", 342 "ModifiedImmediate_al_r0_0x00003fc0", 343 ARRAY_SIZE(kModifiedImmediate), 344 kModifiedImmediate}, 345 {{al, r0, 0x00000ff0}, 346 "al r0 0x00000ff0", 347 "ModifiedImmediate_al_r0_0x00000ff0", 348 ARRAY_SIZE(kModifiedImmediate), 349 kModifiedImmediate}, 350 {{al, r0, 0x000003fc}, 351 "al r0 0x000003fc", 352 "ModifiedImmediate_al_r0_0x000003fc", 353 ARRAY_SIZE(kModifiedImmediate), 354 kModifiedImmediate}, 355 {{al, r0, 0x000000ab}, 356 "al r0 0x000000ab", 357 "ModifiedImmediate_al_r0_0x000000ab", 358 ARRAY_SIZE(kModifiedImmediate), 359 kModifiedImmediate}, 360 {{al, r0, 0xc000002a}, 361 "al r0 0xc000002a", 362 "ModifiedImmediate_al_r0_0xc000002a", 363 ARRAY_SIZE(kModifiedImmediate), 364 kModifiedImmediate}, 365 {{al, r0, 0xb000000a}, 366 "al r0 0xb000000a", 367 "ModifiedImmediate_al_r0_0xb000000a", 368 ARRAY_SIZE(kModifiedImmediate), 369 kModifiedImmediate}, 370 {{al, r0, 0xac000002}, 371 "al r0 0xac000002", 372 "ModifiedImmediate_al_r0_0xac000002", 373 ARRAY_SIZE(kModifiedImmediate), 374 kModifiedImmediate}, 375 {{al, r0, 0xab000000}, 376 "al r0 0xab000000", 377 "ModifiedImmediate_al_r0_0xab000000", 378 ARRAY_SIZE(kModifiedImmediate), 379 kModifiedImmediate}, 380 {{al, r0, 0x2ac00000}, 381 "al r0 0x2ac00000", 382 "ModifiedImmediate_al_r0_0x2ac00000", 383 ARRAY_SIZE(kModifiedImmediate), 384 kModifiedImmediate}, 385 {{al, r0, 0x0ab00000}, 386 "al r0 0x0ab00000", 387 "ModifiedImmediate_al_r0_0x0ab00000", 388 ARRAY_SIZE(kModifiedImmediate), 389 kModifiedImmediate}, 390 {{al, r0, 0x02ac0000}, 391 "al r0 0x02ac0000", 392 "ModifiedImmediate_al_r0_0x02ac0000", 393 ARRAY_SIZE(kModifiedImmediate), 394 kModifiedImmediate}, 395 {{al, r0, 0x00ab0000}, 396 "al r0 0x00ab0000", 397 "ModifiedImmediate_al_r0_0x00ab0000", 398 ARRAY_SIZE(kModifiedImmediate), 399 kModifiedImmediate}, 400 {{al, r0, 0x002ac000}, 401 "al r0 0x002ac000", 402 "ModifiedImmediate_al_r0_0x002ac000", 403 ARRAY_SIZE(kModifiedImmediate), 404 kModifiedImmediate}, 405 {{al, r0, 0x000ab000}, 406 "al r0 0x000ab000", 407 "ModifiedImmediate_al_r0_0x000ab000", 408 ARRAY_SIZE(kModifiedImmediate), 409 kModifiedImmediate}, 410 {{al, r0, 0x0002ac00}, 411 "al r0 0x0002ac00", 412 "ModifiedImmediate_al_r0_0x0002ac00", 413 ARRAY_SIZE(kModifiedImmediate), 414 kModifiedImmediate}, 415 {{al, r0, 0x0000ab00}, 416 "al r0 0x0000ab00", 417 "ModifiedImmediate_al_r0_0x0000ab00", 418 ARRAY_SIZE(kModifiedImmediate), 419 kModifiedImmediate}, 420 {{al, r0, 0x00002ac0}, 421 "al r0 0x00002ac0", 422 "ModifiedImmediate_al_r0_0x00002ac0", 423 ARRAY_SIZE(kModifiedImmediate), 424 kModifiedImmediate}, 425 {{al, r0, 0x00000ab0}, 426 "al r0 0x00000ab0", 427 "ModifiedImmediate_al_r0_0x00000ab0", 428 ARRAY_SIZE(kModifiedImmediate), 429 kModifiedImmediate}, 430 {{al, r0, 0x000002ac}, 431 "al r0 0x000002ac", 432 "ModifiedImmediate_al_r0_0x000002ac", 433 ARRAY_SIZE(kModifiedImmediate), 434 kModifiedImmediate}}; 435 436// We record all inputs to the instructions as outputs. This way, we also check 437// that what shouldn't change didn't change. 438struct TestResult { 439 size_t output_size; 440 const Inputs* outputs; 441}; 442 443// These headers each contain an array of `TestResult` with the reference output 444// values. The reference arrays are names `kReference{mnemonic}`. 445#include "aarch32/traces/simulator-cond-rd-operand-const-cmn-a32.h" 446#include "aarch32/traces/simulator-cond-rd-operand-const-cmp-a32.h" 447#include "aarch32/traces/simulator-cond-rd-operand-const-mov-a32.h" 448#include "aarch32/traces/simulator-cond-rd-operand-const-movs-a32.h" 449#include "aarch32/traces/simulator-cond-rd-operand-const-mvn-a32.h" 450#include "aarch32/traces/simulator-cond-rd-operand-const-mvns-a32.h" 451#include "aarch32/traces/simulator-cond-rd-operand-const-teq-a32.h" 452#include "aarch32/traces/simulator-cond-rd-operand-const-tst-a32.h" 453 454 455// The maximum number of errors to report in detail for each test. 456const unsigned kErrorReportLimit = 8; 457 458typedef void (MacroAssembler::*Fn)(Condition cond, 459 Register rd, 460 const Operand& op); 461 462void TestHelper(Fn instruction, 463 const char* mnemonic, 464 const TestResult reference[]) { 465 SETUP(); 466 masm.UseA32(); 467 START(); 468 469 // Data to compare to `reference`. 470 TestResult* results[ARRAY_SIZE(kTests)]; 471 472 // Test cases for memory bound instructions may allocate a buffer and save its 473 // address in this array. 474 byte* scratch_memory_buffers[ARRAY_SIZE(kTests)]; 475 476 // Generate a loop for each element in `kTests`. Each loop tests one specific 477 // instruction. 478 for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) { 479 // Allocate results on the heap for this test. 480 results[i] = new TestResult; 481 results[i]->outputs = new Inputs[kTests[i].input_size]; 482 results[i]->output_size = kTests[i].input_size; 483 484 size_t input_stride = sizeof(kTests[i].inputs[0]) * kTests[i].input_size; 485 VIXL_ASSERT(IsUint32(input_stride)); 486 487 scratch_memory_buffers[i] = NULL; 488 489 Label loop; 490 UseScratchRegisterScope scratch_registers(&masm); 491 // Include all registers from r0 ro r12. 492 scratch_registers.Include(RegisterList(0x1fff)); 493 494 // Values to pass to the macro-assembler. 495 Condition cond = kTests[i].operands.cond; 496 Register rd = kTests[i].operands.rd; 497 uint32_t immediate = kTests[i].operands.immediate; 498 Operand op(immediate); 499 scratch_registers.Exclude(rd); 500 501 // Allocate reserved registers for our own use. 502 Register input_ptr = scratch_registers.Acquire(); 503 Register input_end = scratch_registers.Acquire(); 504 Register result_ptr = scratch_registers.Acquire(); 505 506 // Initialize `input_ptr` to the first element and `input_end` the address 507 // after the array. 508 __ Mov(input_ptr, Operand::From(kTests[i].inputs)); 509 __ Add(input_end, input_ptr, static_cast<uint32_t>(input_stride)); 510 __ Mov(result_ptr, Operand::From(results[i]->outputs)); 511 __ Bind(&loop); 512 513 { 514 UseScratchRegisterScope temp_registers(&masm); 515 Register nzcv_bits = temp_registers.Acquire(); 516 Register saved_q_bit = temp_registers.Acquire(); 517 // Save the `Q` bit flag. 518 __ Mrs(saved_q_bit, APSR); 519 __ And(saved_q_bit, saved_q_bit, QFlag); 520 // Set the `NZCV` and `Q` flags together. 521 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); 522 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit); 523 __ Msr(APSR_nzcvq, nzcv_bits); 524 } 525 __ Ldr(rd, MemOperand(input_ptr, offsetof(Inputs, rd))); 526 527 (masm.*instruction)(cond, rd, op); 528 529 { 530 UseScratchRegisterScope temp_registers(&masm); 531 Register nzcv_bits = temp_registers.Acquire(); 532 __ Mrs(nzcv_bits, APSR); 533 // Only record the NZCV bits. 534 __ And(nzcv_bits, nzcv_bits, NZCVFlag); 535 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr))); 536 } 537 __ Str(rd, MemOperand(result_ptr, offsetof(Inputs, rd))); 538 539 // Advance the result pointer. 540 __ Add(result_ptr, result_ptr, Operand::From(sizeof(kTests[i].inputs[0]))); 541 // Loop back until `input_ptr` is lower than `input_base`. 542 __ Add(input_ptr, input_ptr, Operand::From(sizeof(kTests[i].inputs[0]))); 543 __ Cmp(input_ptr, input_end); 544 __ B(ne, &loop); 545 } 546 547 END(); 548 549 RUN(); 550 551 if (Test::generate_test_trace()) { 552 // Print the results. 553 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) { 554 printf("const Inputs kOutputs_%s_%s[] = {\n", 555 mnemonic, 556 kTests[i].identifier); 557 for (size_t j = 0; j < results[i]->output_size; j++) { 558 printf(" { "); 559 printf("0x%08" PRIx32, results[i]->outputs[j].apsr); 560 printf(", "); 561 printf("0x%08" PRIx32, results[i]->outputs[j].rd); 562 printf(" },\n"); 563 } 564 printf("};\n"); 565 } 566 printf("const TestResult kReference%s[] = {\n", mnemonic); 567 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) { 568 printf(" {\n"); 569 printf(" ARRAY_SIZE(kOutputs_%s_%s),\n", 570 mnemonic, 571 kTests[i].identifier); 572 printf(" kOutputs_%s_%s,\n", mnemonic, kTests[i].identifier); 573 printf(" },\n"); 574 } 575 printf("};\n"); 576 } else if (kCheckSimulatorTestResults) { 577 // Check the results. 578 unsigned total_error_count = 0; 579 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) { 580 bool instruction_has_errors = false; 581 for (size_t j = 0; j < kTests[i].input_size; j++) { 582 uint32_t apsr = results[i]->outputs[j].apsr; 583 uint32_t rd = results[i]->outputs[j].rd; 584 uint32_t apsr_input = kTests[i].inputs[j].apsr; 585 uint32_t rd_input = kTests[i].inputs[j].rd; 586 uint32_t apsr_ref = reference[i].outputs[j].apsr; 587 uint32_t rd_ref = reference[i].outputs[j].rd; 588 589 if (((apsr != apsr_ref) || (rd != rd_ref)) && 590 (++total_error_count <= kErrorReportLimit)) { 591 // Print the instruction once even if it triggered multiple failures. 592 if (!instruction_has_errors) { 593 printf("Error(s) when testing \"%s %s\":\n", 594 mnemonic, 595 kTests[i].operands_description); 596 instruction_has_errors = true; 597 } 598 // Print subsequent errors. 599 printf(" Input: "); 600 printf("0x%08" PRIx32, apsr_input); 601 printf(", "); 602 printf("0x%08" PRIx32, rd_input); 603 printf("\n"); 604 printf(" Expected: "); 605 printf("0x%08" PRIx32, apsr_ref); 606 printf(", "); 607 printf("0x%08" PRIx32, rd_ref); 608 printf("\n"); 609 printf(" Found: "); 610 printf("0x%08" PRIx32, apsr); 611 printf(", "); 612 printf("0x%08" PRIx32, rd); 613 printf("\n\n"); 614 } 615 } 616 } 617 618 if (total_error_count > kErrorReportLimit) { 619 printf("%u other errors follow.\n", 620 total_error_count - kErrorReportLimit); 621 } 622 VIXL_CHECK(total_error_count == 0); 623 } else { 624 VIXL_WARNING("Assembled the code, but did not run anything.\n"); 625 } 626 627 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) { 628 delete[] results[i]->outputs; 629 delete results[i]; 630 delete[] scratch_memory_buffers[i]; 631 } 632} 633 634// Instantiate tests for each instruction in the list. 635// TODO: Remove this limitation by having a sandboxing mechanism. 636#if defined(VIXL_HOST_POINTER_32) 637#define TEST(mnemonic) \ 638 void Test_##mnemonic() { \ 639 TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \ 640 } \ 641 Test test_##mnemonic("AARCH32_SIMULATOR_COND_RD_OPERAND_CONST_" #mnemonic \ 642 "_A32", \ 643 &Test_##mnemonic); 644#else 645#define TEST(mnemonic) \ 646 void Test_##mnemonic() { \ 647 VIXL_WARNING("This test can only run on a 32-bit host.\n"); \ 648 USE(TestHelper); \ 649 } \ 650 Test test_##mnemonic("AARCH32_SIMULATOR_COND_RD_OPERAND_CONST_" #mnemonic \ 651 "_A32", \ 652 &Test_##mnemonic); 653#endif 654 655FOREACH_INSTRUCTION(TEST) 656#undef TEST 657 658} // namespace 659#endif 660 661} // namespace aarch32 662} // namespace vixl 663