1/* Copyright (c) 2009-2012, 2014-2016 The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10 * GNU General Public License for more details.
11 *
12 */
13#ifndef __UAPI_MSM_CAMERA_H
14#define __UAPI_MSM_CAMERA_H
15
16#include <linux/videodev2.h>
17#include <linux/types.h>
18#include <linux/ioctl.h>
19
20#include <linux/msm_ion.h>
21
22#define BIT(nr)   (1UL << (nr))
23
24#define MSM_CAM_IOCTL_MAGIC 'm'
25
26#define MAX_SERVER_PAYLOAD_LENGTH 8192
27
28#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
29	_IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
30
31#define MSM_CAM_IOCTL_REGISTER_PMEM \
32	_IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
33
34#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
35	_IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
36
37#define MSM_CAM_IOCTL_CTRL_COMMAND \
38	_IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
39
40#define MSM_CAM_IOCTL_CONFIG_VFE  \
41	_IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
42
43#define MSM_CAM_IOCTL_GET_STATS \
44	_IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
45
46#define MSM_CAM_IOCTL_GETFRAME \
47	_IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
48
49#define MSM_CAM_IOCTL_ENABLE_VFE \
50	_IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
51
52#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
53	_IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
54
55#define MSM_CAM_IOCTL_CONFIG_CMD \
56	_IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
57
58#define MSM_CAM_IOCTL_DISABLE_VFE \
59	_IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
60
61#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
62	_IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
63
64#define MSM_CAM_IOCTL_VFE_APPS_RESET \
65	_IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
66
67#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
68	_IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
69
70#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
71	_IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
72
73#define MSM_CAM_IOCTL_AXI_CONFIG \
74	_IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
75
76#define MSM_CAM_IOCTL_GET_PICTURE \
77	_IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
78
79#define MSM_CAM_IOCTL_SET_CROP \
80	_IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
81
82#define MSM_CAM_IOCTL_PICT_PP \
83	_IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
84
85#define MSM_CAM_IOCTL_PICT_PP_DONE \
86	_IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
87
88#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
89	_IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
90
91#define MSM_CAM_IOCTL_FLASH_LED_CFG \
92	_IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
93
94#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
95	_IO(MSM_CAM_IOCTL_MAGIC, 23)
96
97#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
98	_IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
99
100#define MSM_CAM_IOCTL_AF_CTRL \
101	_IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
102
103#define MSM_CAM_IOCTL_AF_CTRL_DONE \
104	_IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
105
106#define MSM_CAM_IOCTL_CONFIG_VPE \
107	_IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
108
109#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
110	_IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
111
112#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
113	_IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
114
115#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
116	_IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
117
118#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
119	_IO(MSM_CAM_IOCTL_MAGIC, 31)
120
121#define MSM_CAM_IOCTL_FLASH_CTRL \
122	_IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
123
124#define MSM_CAM_IOCTL_ERROR_CONFIG \
125	_IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
126
127#define MSM_CAM_IOCTL_ABORT_CAPTURE \
128	_IO(MSM_CAM_IOCTL_MAGIC, 34)
129
130#define MSM_CAM_IOCTL_SET_FD_ROI \
131	_IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
132
133#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
134	_IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
135
136#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
137	_IO(MSM_CAM_IOCTL_MAGIC, 37)
138
139#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
140	_IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
141
142#define MSM_CAM_IOCTL_PUT_ST_FRAME \
143	_IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
144
145#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
146	_IOW(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event_and_payload)
147
148#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
149	_IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
150
151#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
152	_IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
153
154#define MSM_CAM_IOCTL_MCTL_POST_PROC \
155	_IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
156
157#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
158	_IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
159
160#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
161	_IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
162
163#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
164	_IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
165
166#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
167	_IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
168
169#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
170	_IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
171
172#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
173	_IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
174
175#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
176	_IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
177
178#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
179	_IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
180
181#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
182	_IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
183
184#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
185	_IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
186
187#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
188	_IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
189
190#define MSM_CAM_IOCTL_STATS_REQBUF \
191	_IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
192
193#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
194	_IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
195
196#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
197	_IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
198
199#define MSM_CAM_IOCTL_SET_MCTL_SDEV \
200	_IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *)
201
202#define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \
203	_IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *)
204
205#define MSM_CAM_IOCTL_GET_INST_HANDLE \
206	_IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *)
207
208#define MSM_CAM_IOCTL_STATS_UNREG_BUF \
209	_IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *)
210
211#define MSM_CAM_IOCTL_CSIC_IO_CFG \
212	_IOWR(MSM_CAM_IOCTL_MAGIC, 62, struct csic_cfg_data *)
213
214#define MSM_CAM_IOCTL_CSID_IO_CFG \
215	_IOWR(MSM_CAM_IOCTL_MAGIC, 63, struct csid_cfg_data *)
216
217#define MSM_CAM_IOCTL_CSIPHY_IO_CFG \
218	_IOR(MSM_CAM_IOCTL_MAGIC, 64, struct csiphy_cfg_data *)
219
220#define MSM_CAM_IOCTL_OEM \
221	_IOW(MSM_CAM_IOCTL_MAGIC, 65, struct sensor_cfg_data *)
222
223#define MSM_CAM_IOCTL_AXI_INIT \
224	_IOWR(MSM_CAM_IOCTL_MAGIC, 66, uint8_t *)
225
226#define MSM_CAM_IOCTL_AXI_RELEASE \
227	_IO(MSM_CAM_IOCTL_MAGIC, 67)
228
229struct v4l2_event_and_payload {
230	struct v4l2_event evt;
231	uint32_t payload_length;
232	uint32_t transaction_id;
233	void *payload;
234};
235
236struct msm_stats_reqbuf {
237	int num_buf;		/* how many buffers requested */
238	int stats_type;	/* stats type */
239};
240
241struct msm_stats_flush_bufq {
242	int stats_type;	/* enum msm_stats_enum_type */
243};
244
245struct msm_mctl_pp_cmd {
246	int32_t  id;
247	uint16_t length;
248	void     *value;
249};
250
251struct msm_mctl_post_proc_cmd {
252	int32_t type;
253	struct msm_mctl_pp_cmd cmd;
254};
255
256#define MSM_CAMERA_LED_OFF  0
257#define MSM_CAMERA_LED_LOW  1
258#define MSM_CAMERA_LED_HIGH 2
259#define MSM_CAMERA_LED_INIT 3
260#define MSM_CAMERA_LED_RELEASE 4
261
262#define MSM_CAMERA_STROBE_FLASH_NONE 0
263#define MSM_CAMERA_STROBE_FLASH_XENON 1
264
265#define MSM_MAX_CAMERA_SENSORS  5
266#define MAX_SENSOR_NAME 32
267#define MAX_CAM_NAME_SIZE 32
268#define MAX_ACT_MOD_NAME_SIZE 32
269#define MAX_ACT_NAME_SIZE 32
270#define NUM_ACTUATOR_DIR 2
271#define MAX_ACTUATOR_SCENARIO 8
272#define MAX_ACTUATOR_REGION 5
273#define MAX_ACTUATOR_INIT_SET 12
274#define MAX_ACTUATOR_TYPE_SIZE 32
275#define MAX_ACTUATOR_REG_TBL_SIZE 8
276
277
278#define MSM_MAX_CAMERA_CONFIGS 2
279
280#define PP_SNAP  0x01
281#define PP_RAW_SNAP ((0x01)<<1)
282#define PP_PREV  ((0x01)<<2)
283#define PP_THUMB ((0x01)<<3)
284#define PP_MASK		(PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
285
286#define MSM_CAM_CTRL_CMD_DONE  0
287#define MSM_CAM_SENSOR_VFE_CMD 1
288
289/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
290#define MAX_PLANES 8
291
292/*****************************************************
293 *  structure
294 *****************************************************/
295
296/* define five type of structures for userspace <==> kernel
297 * space communication:
298 * command 1 - 2 are from userspace ==> kernel
299 * command 3 - 4 are from kernel ==> userspace
300 *
301 * 1. control command: control command(from control thread),
302 *                     control status (from config thread);
303 */
304struct msm_ctrl_cmd {
305	uint16_t type;
306	uint16_t length;
307	void *value;
308	uint16_t status;
309	uint32_t timeout_ms;
310	int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
311	int vnode_id;  /* video dev id. Can we overload resp_fd? */
312	int queue_idx;
313	uint32_t evt_id;
314	uint32_t stream_type; /* used to pass value to qcamera server */
315	int config_ident; /*used as identifier for config node*/
316};
317
318struct msm_cam_evt_msg {
319	unsigned short type;	/* 1 == event (RPC), 0 == message (adsp) */
320	unsigned short msg_id;
321	unsigned int len;	/* size in, number of bytes out */
322	uint32_t frame_id;
323	void *data;
324	struct timespec timestamp;
325};
326
327struct msm_pp_frame_sp {
328	/* phy addr of the buffer */
329	unsigned long  phy_addr;
330	uint32_t       y_off;
331	uint32_t       cbcr_off;
332	/* buffer length */
333	uint32_t       length;
334	int32_t        fd;
335	uint32_t       addr_offset;
336	/* mapped addr */
337	unsigned long  vaddr;
338};
339
340struct msm_pp_frame_mp {
341	/* phy addr of the plane */
342	unsigned long  phy_addr;
343	/* offset of plane data */
344	uint32_t       data_offset;
345	/* plane length */
346	uint32_t       length;
347	int32_t        fd;
348	uint32_t       addr_offset;
349	/* mapped addr */
350	unsigned long  vaddr;
351};
352
353struct msm_pp_frame {
354	uint32_t       handle; /* stores vb cookie */
355	uint32_t       frame_id;
356	unsigned short buf_idx;
357	int            path;
358	unsigned short image_type;
359	unsigned short num_planes; /* 1 for sp */
360	struct timeval timestamp;
361	union {
362		struct msm_pp_frame_sp sp;
363		struct msm_pp_frame_mp mp[MAX_PLANES];
364	};
365	int node_type;
366	uint32_t inst_handle;
367};
368
369struct msm_pp_crop {
370	uint32_t  src_x;
371	uint32_t  src_y;
372	uint32_t  src_w;
373	uint32_t  src_h;
374	uint32_t  dst_x;
375	uint32_t  dst_y;
376	uint32_t  dst_w;
377	uint32_t  dst_h;
378	uint8_t update_flag;
379};
380
381struct msm_mctl_pp_frame_cmd {
382	uint32_t cookie;
383	uint8_t  vpe_output_action;
384	struct msm_pp_frame src_frame;
385	struct msm_pp_frame dest_frame;
386	struct msm_pp_crop crop;
387	int path;
388};
389
390struct msm_cam_evt_divert_frame {
391	unsigned short image_mode;
392	unsigned short op_mode;
393	unsigned short inst_idx;
394	unsigned short node_idx;
395	struct msm_pp_frame frame;
396	int            do_pp;
397};
398
399struct msm_mctl_pp_cmd_ack_event {
400	uint32_t cmd;        /* VPE_CMD_ZOOM? */
401	int      status;     /* 0 done, < 0 err */
402	uint32_t cookie;     /* daemon's cookie */
403};
404
405struct msm_mctl_pp_event_info {
406	int32_t  event;
407	union {
408		struct msm_mctl_pp_cmd_ack_event ack;
409	};
410};
411
412struct msm_isp_event_ctrl {
413	unsigned short resptype;
414	union {
415		struct msm_cam_evt_msg isp_msg;
416		struct msm_ctrl_cmd ctrl;
417		struct msm_cam_evt_divert_frame div_frame;
418		struct msm_mctl_pp_event_info pp_event_info;
419	} isp_data;
420};
421
422#define MSM_CAM_RESP_CTRL              0
423#define MSM_CAM_RESP_STAT_EVT_MSG      1
424#define MSM_CAM_RESP_STEREO_OP_1       2
425#define MSM_CAM_RESP_STEREO_OP_2       3
426#define MSM_CAM_RESP_V4L2              4
427#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
428#define MSM_CAM_RESP_DONE_EVENT        6
429#define MSM_CAM_RESP_MCTL_PP_EVENT     7
430#define MSM_CAM_RESP_MAX               8
431
432#define MSM_CAM_APP_NOTIFY_EVENT  0
433#define MSM_CAM_APP_NOTIFY_ERROR_EVENT  1
434
435/* this one is used to send ctrl/status up to config thread */
436
437struct msm_stats_event_ctrl {
438	/* 0 - ctrl_cmd from control thread,
439	 * 1 - stats/event kernel,
440	 * 2 - V4L control or read request */
441	int resptype;
442	int timeout_ms;
443	struct msm_ctrl_cmd ctrl_cmd;
444	/* struct  vfe_event_t  stats_event; */
445	struct msm_cam_evt_msg stats_event;
446};
447
448/* 2. config command: config command(from config thread); */
449struct msm_camera_cfg_cmd {
450	/* what to config:
451	 * 1 - sensor config, 2 - vfe config */
452	uint16_t cfg_type;
453
454	/* sensor config type */
455	uint16_t cmd_type;
456	uint16_t queue;
457	uint16_t length;
458	void *value;
459};
460
461#define CMD_GENERAL			0
462#define CMD_AXI_CFG_OUT1		1
463#define CMD_AXI_CFG_SNAP_O1_AND_O2	2
464#define CMD_AXI_CFG_OUT2		3
465#define CMD_PICT_T_AXI_CFG		4
466#define CMD_PICT_M_AXI_CFG		5
467#define CMD_RAW_PICT_AXI_CFG		6
468
469#define CMD_FRAME_BUF_RELEASE		7
470#define CMD_PREV_BUF_CFG		8
471#define CMD_SNAP_BUF_RELEASE		9
472#define CMD_SNAP_BUF_CFG		10
473#define CMD_STATS_DISABLE		11
474#define CMD_STATS_AEC_AWB_ENABLE	12
475#define CMD_STATS_AF_ENABLE		13
476#define CMD_STATS_AEC_ENABLE		14
477#define CMD_STATS_AWB_ENABLE		15
478#define CMD_STATS_ENABLE  		16
479
480#define CMD_STATS_AXI_CFG		17
481#define CMD_STATS_AEC_AXI_CFG		18
482#define CMD_STATS_AF_AXI_CFG 		19
483#define CMD_STATS_AWB_AXI_CFG		20
484#define CMD_STATS_RS_AXI_CFG		21
485#define CMD_STATS_CS_AXI_CFG		22
486#define CMD_STATS_IHIST_AXI_CFG		23
487#define CMD_STATS_SKIN_AXI_CFG		24
488
489#define CMD_STATS_BUF_RELEASE		25
490#define CMD_STATS_AEC_BUF_RELEASE	26
491#define CMD_STATS_AF_BUF_RELEASE	27
492#define CMD_STATS_AWB_BUF_RELEASE	28
493#define CMD_STATS_RS_BUF_RELEASE	29
494#define CMD_STATS_CS_BUF_RELEASE	30
495#define CMD_STATS_IHIST_BUF_RELEASE	31
496#define CMD_STATS_SKIN_BUF_RELEASE	32
497
498#define UPDATE_STATS_INVALID		33
499#define CMD_AXI_CFG_SNAP_GEMINI		34
500#define CMD_AXI_CFG_SNAP		35
501#define CMD_AXI_CFG_PREVIEW		36
502#define CMD_AXI_CFG_VIDEO		37
503
504#define CMD_STATS_IHIST_ENABLE 38
505#define CMD_STATS_RS_ENABLE 39
506#define CMD_STATS_CS_ENABLE 40
507#define CMD_VPE 41
508#define CMD_AXI_CFG_VPE 42
509#define CMD_AXI_CFG_ZSL 43
510#define CMD_AXI_CFG_SNAP_VPE 44
511#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
512
513#define CMD_CONFIG_PING_ADDR 46
514#define CMD_CONFIG_PONG_ADDR 47
515#define CMD_CONFIG_FREE_BUF_ADDR 48
516#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
517#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
518#define CMD_VFE_BUFFER_RELEASE 51
519#define CMD_VFE_PROCESS_IRQ 52
520#define CMD_STATS_BG_ENABLE 53
521#define CMD_STATS_BF_ENABLE 54
522#define CMD_STATS_BHIST_ENABLE 55
523#define CMD_STATS_BG_BUF_RELEASE 56
524#define CMD_STATS_BF_BUF_RELEASE 57
525#define CMD_STATS_BHIST_BUF_RELEASE 58
526#define CMD_VFE_PIX_SOF_COUNT_UPDATE 59
527#define CMD_VFE_COUNT_PIX_SOF_ENABLE 60
528#define CMD_STATS_BE_ENABLE 61
529#define CMD_STATS_BE_BUF_RELEASE 62
530
531#define CMD_AXI_CFG_PRIM               BIT(8)
532#define CMD_AXI_CFG_PRIM_ALL_CHNLS     BIT(9)
533#define CMD_AXI_CFG_SEC                BIT(10)
534#define CMD_AXI_CFG_SEC_ALL_CHNLS      BIT(11)
535#define CMD_AXI_CFG_TERT1              BIT(12)
536#define CMD_AXI_CFG_TERT2              BIT(13)
537
538#define CMD_AXI_START  0xE1
539#define CMD_AXI_STOP   0xE2
540#define CMD_AXI_RESET  0xE3
541#define CMD_AXI_ABORT  0xE4
542
543
544
545#define AXI_CMD_PREVIEW      BIT(0)
546#define AXI_CMD_CAPTURE      BIT(1)
547#define AXI_CMD_RECORD       BIT(2)
548#define AXI_CMD_ZSL          BIT(3)
549#define AXI_CMD_RAW_CAPTURE  BIT(4)
550#define AXI_CMD_LIVESHOT     BIT(5)
551
552/* vfe config command: config command(from config thread)*/
553struct msm_vfe_cfg_cmd {
554	int cmd_type;
555	uint16_t length;
556	void *value;
557};
558
559struct msm_vpe_cfg_cmd {
560	int cmd_type;
561	uint16_t length;
562	void *value;
563};
564
565#define MAX_CAMERA_ENABLE_NAME_LEN 32
566struct camera_enable_cmd {
567	char name[MAX_CAMERA_ENABLE_NAME_LEN];
568};
569
570#define MSM_PMEM_OUTPUT1		0
571#define MSM_PMEM_OUTPUT2		1
572#define MSM_PMEM_OUTPUT1_OUTPUT2	2
573#define MSM_PMEM_THUMBNAIL		3
574#define MSM_PMEM_MAINIMG		4
575#define MSM_PMEM_RAW_MAINIMG		5
576#define MSM_PMEM_AEC_AWB		6
577#define MSM_PMEM_AF			7
578#define MSM_PMEM_AEC			8
579#define MSM_PMEM_AWB			9
580#define MSM_PMEM_RS			10
581#define MSM_PMEM_CS			11
582#define MSM_PMEM_IHIST			12
583#define MSM_PMEM_SKIN			13
584#define MSM_PMEM_VIDEO			14
585#define MSM_PMEM_PREVIEW		15
586#define MSM_PMEM_VIDEO_VPE		16
587#define MSM_PMEM_C2D			17
588#define MSM_PMEM_MAINIMG_VPE    18
589#define MSM_PMEM_THUMBNAIL_VPE  19
590#define MSM_PMEM_BAYER_GRID		20
591#define MSM_PMEM_BAYER_FOCUS	21
592#define MSM_PMEM_BAYER_HIST		22
593#define MSM_PMEM_BAYER_EXPOSURE 23
594#define MSM_PMEM_MAX            24
595
596#define STAT_AEAW			0
597#define STAT_AEC			1
598#define STAT_AF				2
599#define STAT_AWB			3
600#define STAT_RS				4
601#define STAT_CS				5
602#define STAT_IHIST			6
603#define STAT_SKIN			7
604#define STAT_BG				8
605#define STAT_BF				9
606#define STAT_BE				10
607#define STAT_BHIST			11
608#define STAT_MAX			12
609
610#define FRAME_PREVIEW_OUTPUT1		0
611#define FRAME_PREVIEW_OUTPUT2		1
612#define FRAME_SNAPSHOT			2
613#define FRAME_THUMBNAIL			3
614#define FRAME_RAW_SNAPSHOT		4
615#define FRAME_MAX			5
616
617enum msm_stats_enum_type {
618	MSM_STATS_TYPE_AEC, /* legacy based AEC */
619	MSM_STATS_TYPE_AF,  /* legacy based AF */
620	MSM_STATS_TYPE_AWB, /* legacy based AWB */
621	MSM_STATS_TYPE_RS,  /* legacy based RS */
622	MSM_STATS_TYPE_CS,  /* legacy based CS */
623	MSM_STATS_TYPE_IHIST,   /* legacy based HIST */
624	MSM_STATS_TYPE_SKIN,    /* legacy based SKIN */
625	MSM_STATS_TYPE_BG,  /* Bayer Grids */
626	MSM_STATS_TYPE_BF,  /* Bayer Focus */
627	MSM_STATS_TYPE_BE,  /* Bayer Exposure*/
628	MSM_STATS_TYPE_BHIST,   /* Bayer Hist */
629	MSM_STATS_TYPE_AE_AW,   /* legacy stats for vfe 2.x*/
630	MSM_STATS_TYPE_COMP, /* Composite stats */
631	MSM_STATS_TYPE_MAX  /* MAX */
632};
633
634struct msm_stats_buf_info {
635	int type; /* msm_stats_enum_type */
636	int fd;
637	void *vaddr;
638	uint32_t offset;
639	uint32_t len;
640	uint32_t y_off;
641	uint32_t cbcr_off;
642	uint32_t planar0_off;
643	uint32_t planar1_off;
644	uint32_t planar2_off;
645	uint8_t active;
646	int buf_idx;
647};
648
649struct msm_pmem_info {
650	int type;
651	int fd;
652	void *vaddr;
653	uint32_t offset;
654	uint32_t len;
655	uint32_t y_off;
656	uint32_t cbcr_off;
657	uint32_t planar0_off;
658	uint32_t planar1_off;
659	uint32_t planar2_off;
660	uint8_t active;
661};
662
663struct outputCfg {
664	uint32_t height;
665	uint32_t width;
666
667	uint32_t window_height_firstline;
668	uint32_t window_height_lastline;
669};
670
671#define VIDEO_NODE 0
672#define MCTL_NODE 1
673
674#define OUTPUT_1	0
675#define OUTPUT_2	1
676#define OUTPUT_1_AND_2            2   /* snapshot only */
677#define OUTPUT_1_AND_3            3   /* video */
678#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
679#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
680#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
681#define OUTPUT_1_2_AND_3 7
682#define OUTPUT_ALL_CHNLS 8
683#define OUTPUT_VIDEO_ALL_CHNLS 9
684#define OUTPUT_ZSL_ALL_CHNLS 10
685#define LAST_AXI_OUTPUT_MODE_ENUM OUTPUT_ZSL_ALL_CHNLS
686
687#define OUTPUT_PRIM              BIT(8)
688#define OUTPUT_PRIM_ALL_CHNLS    BIT(9)
689#define OUTPUT_SEC               BIT(10)
690#define OUTPUT_SEC_ALL_CHNLS     BIT(11)
691#define OUTPUT_TERT1             BIT(12)
692#define OUTPUT_TERT2             BIT(13)
693
694
695
696#define MSM_FRAME_PREV_1	0
697#define MSM_FRAME_PREV_2	1
698#define MSM_FRAME_ENC		2
699
700#define OUTPUT_TYPE_P    BIT(0)
701#define OUTPUT_TYPE_T    BIT(1)
702#define OUTPUT_TYPE_S    BIT(2)
703#define OUTPUT_TYPE_V    BIT(3)
704#define OUTPUT_TYPE_L    BIT(4)
705#define OUTPUT_TYPE_ST_L BIT(5)
706#define OUTPUT_TYPE_ST_R BIT(6)
707#define OUTPUT_TYPE_ST_D BIT(7)
708#define OUTPUT_TYPE_R    BIT(8)
709#define OUTPUT_TYPE_R1   BIT(9)
710#define OUTPUT_TYPE_SAEC   BIT(10)
711#define OUTPUT_TYPE_SAFC   BIT(11)
712#define OUTPUT_TYPE_SAWB   BIT(12)
713#define OUTPUT_TYPE_IHST   BIT(13)
714#define OUTPUT_TYPE_CSTA   BIT(14)
715
716struct fd_roi_info {
717	void *info;
718	int info_len;
719};
720
721struct msm_mem_map_info {
722	uint32_t cookie;
723	uint32_t length;
724	uint32_t mem_type;
725};
726
727#define MSM_MEM_MMAP		0
728#define MSM_MEM_USERPTR		1
729#define MSM_PLANE_MAX		8
730#define MSM_PLANE_Y			0
731#define MSM_PLANE_UV		1
732
733struct msm_frame {
734	struct timespec ts;
735	int path;
736	int type;
737	unsigned long buffer;
738	uint32_t phy_offset;
739	uint32_t y_off;
740	uint32_t cbcr_off;
741	uint32_t planar0_off;
742	uint32_t planar1_off;
743	uint32_t planar2_off;
744	int fd;
745
746	void *cropinfo;
747	int croplen;
748	uint32_t error_code;
749	struct fd_roi_info roi_info;
750	uint32_t frame_id;
751	int stcam_quality_ind;
752	uint32_t stcam_conv_value;
753
754	struct ion_allocation_data ion_alloc;
755	struct ion_fd_data fd_data;
756	int ion_dev_fd;
757};
758
759enum msm_st_frame_packing {
760	SIDE_BY_SIDE_HALF,
761	SIDE_BY_SIDE_FULL,
762	TOP_DOWN_HALF,
763	TOP_DOWN_FULL,
764};
765
766struct msm_st_crop {
767	uint32_t in_w;
768	uint32_t in_h;
769	uint32_t out_w;
770	uint32_t out_h;
771};
772
773struct msm_st_half {
774	uint32_t buf_p0_off;
775	uint32_t buf_p1_off;
776	uint32_t buf_p0_stride;
777	uint32_t buf_p1_stride;
778	uint32_t pix_x_off;
779	uint32_t pix_y_off;
780	struct msm_st_crop stCropInfo;
781};
782
783struct msm_st_frame {
784	struct msm_frame buf_info;
785	int type;
786	enum msm_st_frame_packing packing;
787	struct msm_st_half L;
788	struct msm_st_half R;
789	int frame_id;
790};
791
792#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
793
794struct stats_buff {
795	unsigned long buff;
796	int fd;
797};
798
799struct msm_stats_buf {
800	uint8_t awb_ymin;
801	struct stats_buff aec;
802	struct stats_buff awb;
803	struct stats_buff af;
804	struct stats_buff be;
805	struct stats_buff ihist;
806	struct stats_buff rs;
807	struct stats_buff cs;
808	struct stats_buff skin;
809	int type;
810	uint32_t status_bits;
811	unsigned long buffer;
812	int fd;
813	int length;
814	struct ion_handle *handle;
815	uint32_t frame_id;
816	int buf_idx;
817};
818#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
819/* video capture mode in VIDIOC_S_PARM */
820#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
821	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
822/* extendedmode for video recording in VIDIOC_S_PARM */
823#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
824	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
825/* extendedmode for the full size main image in VIDIOC_S_PARM */
826#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
827/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
828#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
829	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
830/* ISP_PIX_OUTPUT1: no pp, directly send output1 buf to user */
831#define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT1 \
832	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
833/* ISP_PIX_OUTPUT2: no pp, directly send output2 buf to user */
834#define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT2 \
835	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
836/* raw image type */
837#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
838	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
839/* RDI dump */
840#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
841	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
842/* RDI dump 1 */
843#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
844	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
845/* RDI dump 2 */
846#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
847	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+10)
848#define MSM_V4L2_EXT_CAPTURE_MODE_AEC \
849	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+11)
850#define MSM_V4L2_EXT_CAPTURE_MODE_AWB \
851	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+12)
852#define MSM_V4L2_EXT_CAPTURE_MODE_AF \
853	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+13)
854#define MSM_V4L2_EXT_CAPTURE_MODE_IHIST \
855	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+14)
856#define MSM_V4L2_EXT_CAPTURE_MODE_CS \
857	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+15)
858#define MSM_V4L2_EXT_CAPTURE_MODE_RS \
859	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+16)
860#define MSM_V4L2_EXT_CAPTURE_MODE_CSTA \
861	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+17)
862#define MSM_V4L2_EXT_CAPTURE_MODE_V2X_LIVESHOT \
863	(MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+18)
864#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+19)
865
866
867#define MSM_V4L2_PID_MOTION_ISO              V4L2_CID_PRIVATE_BASE
868#define MSM_V4L2_PID_EFFECT                 (V4L2_CID_PRIVATE_BASE+1)
869#define MSM_V4L2_PID_HJR                    (V4L2_CID_PRIVATE_BASE+2)
870#define MSM_V4L2_PID_LED_MODE               (V4L2_CID_PRIVATE_BASE+3)
871#define MSM_V4L2_PID_PREP_SNAPSHOT          (V4L2_CID_PRIVATE_BASE+4)
872#define MSM_V4L2_PID_EXP_METERING           (V4L2_CID_PRIVATE_BASE+5)
873#define MSM_V4L2_PID_ISO                    (V4L2_CID_PRIVATE_BASE+6)
874#define MSM_V4L2_PID_CAM_MODE               (V4L2_CID_PRIVATE_BASE+7)
875#define MSM_V4L2_PID_LUMA_ADAPTATION	    (V4L2_CID_PRIVATE_BASE+8)
876#define MSM_V4L2_PID_BEST_SHOT              (V4L2_CID_PRIVATE_BASE+9)
877#define MSM_V4L2_PID_FOCUS_MODE	            (V4L2_CID_PRIVATE_BASE+10)
878#define MSM_V4L2_PID_BL_DETECTION           (V4L2_CID_PRIVATE_BASE+11)
879#define MSM_V4L2_PID_SNOW_DETECTION         (V4L2_CID_PRIVATE_BASE+12)
880#define MSM_V4L2_PID_CTRL_CMD               (V4L2_CID_PRIVATE_BASE+13)
881#define MSM_V4L2_PID_EVT_SUB_INFO           (V4L2_CID_PRIVATE_BASE+14)
882#define MSM_V4L2_PID_STROBE_FLASH           (V4L2_CID_PRIVATE_BASE+15)
883#define MSM_V4L2_PID_INST_HANDLE            (V4L2_CID_PRIVATE_BASE+16)
884#define MSM_V4L2_PID_MMAP_INST              (V4L2_CID_PRIVATE_BASE+17)
885#define MSM_V4L2_PID_PP_PLANE_INFO          (V4L2_CID_PRIVATE_BASE+18)
886#define MSM_V4L2_PID_MAX                    MSM_V4L2_PID_PP_PLANE_INFO
887
888/* camera operation mode for video recording - two frame output queues */
889#define MSM_V4L2_CAM_OP_DEFAULT         0
890/* camera operation mode for video recording - two frame output queues */
891#define MSM_V4L2_CAM_OP_PREVIEW         (MSM_V4L2_CAM_OP_DEFAULT+1)
892/* camera operation mode for video recording - two frame output queues */
893#define MSM_V4L2_CAM_OP_VIDEO           (MSM_V4L2_CAM_OP_DEFAULT+2)
894/* camera operation mode for standard shapshot - two frame output queues */
895#define MSM_V4L2_CAM_OP_CAPTURE         (MSM_V4L2_CAM_OP_DEFAULT+3)
896/* camera operation mode for zsl shapshot - three output queues */
897#define MSM_V4L2_CAM_OP_ZSL             (MSM_V4L2_CAM_OP_DEFAULT+4)
898/* camera operation mode for raw snapshot - one frame output queue */
899#define MSM_V4L2_CAM_OP_RAW             (MSM_V4L2_CAM_OP_DEFAULT+5)
900/* camera operation mode for jpeg snapshot - one frame output queue */
901#define MSM_V4L2_CAM_OP_JPEG_CAPTURE    (MSM_V4L2_CAM_OP_DEFAULT+6)
902
903
904#define MSM_V4L2_VID_CAP_TYPE	0
905#define MSM_V4L2_STREAM_ON		1
906#define MSM_V4L2_STREAM_OFF		2
907#define MSM_V4L2_SNAPSHOT		3
908#define MSM_V4L2_QUERY_CTRL		4
909#define MSM_V4L2_GET_CTRL		5
910#define MSM_V4L2_SET_CTRL		6
911#define MSM_V4L2_QUERY			7
912#define MSM_V4L2_GET_CROP		8
913#define MSM_V4L2_SET_CROP		9
914#define MSM_V4L2_OPEN			10
915#define MSM_V4L2_CLOSE			11
916#define MSM_V4L2_SET_CTRL_CMD	12
917#define MSM_V4L2_EVT_SUB_MASK	13
918#define MSM_V4L2_PRIVATE_CMD    14
919#define MSM_V4L2_MAX			15
920#define V4L2_CAMERA_EXIT		43
921
922struct crop_info {
923	void *info;
924	int len;
925};
926
927struct msm_postproc {
928	int ftnum;
929	struct msm_frame fthumnail;
930	int fmnum;
931	struct msm_frame fmain;
932};
933
934struct msm_snapshot_pp_status {
935	void *status;
936};
937
938#define CFG_SET_MODE			0
939#define CFG_SET_EFFECT			1
940#define CFG_START			2
941#define CFG_PWR_UP			3
942#define CFG_PWR_DOWN			4
943#define CFG_WRITE_EXPOSURE_GAIN		5
944#define CFG_SET_DEFAULT_FOCUS		6
945#define CFG_MOVE_FOCUS			7
946#define CFG_REGISTER_TO_REAL_GAIN	8
947#define CFG_REAL_TO_REGISTER_GAIN	9
948#define CFG_SET_FPS			10
949#define CFG_SET_PICT_FPS		11
950#define CFG_SET_BRIGHTNESS		12
951#define CFG_SET_CONTRAST		13
952#define CFG_SET_ZOOM			14
953#define CFG_SET_EXPOSURE_MODE		15
954#define CFG_SET_WB			16
955#define CFG_SET_ANTIBANDING		17
956#define CFG_SET_EXP_GAIN		18
957#define CFG_SET_PICT_EXP_GAIN		19
958#define CFG_SET_LENS_SHADING		20
959#define CFG_GET_PICT_FPS		21
960#define CFG_GET_PREV_L_PF		22
961#define CFG_GET_PREV_P_PL		23
962#define CFG_GET_PICT_L_PF		24
963#define CFG_GET_PICT_P_PL		25
964#define CFG_GET_AF_MAX_STEPS		26
965#define CFG_GET_PICT_MAX_EXP_LC		27
966#define CFG_SEND_WB_INFO    28
967#define CFG_SENSOR_INIT    29
968#define CFG_GET_3D_CALI_DATA 30
969#define CFG_GET_CALIB_DATA		31
970#define CFG_GET_OUTPUT_INFO		32
971#define CFG_GET_EEPROM_INFO		33
972#define CFG_GET_EEPROM_DATA		34
973#define CFG_SET_ACTUATOR_INFO		35
974#define CFG_GET_ACTUATOR_INFO           36
975/* TBD: QRD */
976#define CFG_SET_SATURATION            37
977#define CFG_SET_SHARPNESS             38
978#define CFG_SET_TOUCHAEC              39
979#define CFG_SET_AUTO_FOCUS            40
980#define CFG_SET_AUTOFLASH             41
981#define CFG_SET_EXPOSURE_COMPENSATION 42
982#define CFG_SET_ISO                   43
983#define CFG_START_STREAM              44
984#define CFG_STOP_STREAM               45
985#define CFG_GET_CSI_PARAMS            46
986#define CFG_POWER_UP                  47
987#define CFG_POWER_DOWN                48
988#define CFG_WRITE_I2C_ARRAY           49
989#define CFG_READ_I2C_ARRAY            50
990#define CFG_PCLK_CHANGE               51
991#define CFG_CONFIG_VREG_ARRAY         52
992#define CFG_CONFIG_CLK_ARRAY          53
993#define CFG_GPIO_OP                   54
994#define CFG_MAX                       55
995
996
997#define MOVE_NEAR	0
998#define MOVE_FAR	1
999
1000#define SENSOR_PREVIEW_MODE		0
1001#define SENSOR_SNAPSHOT_MODE		1
1002#define SENSOR_RAW_SNAPSHOT_MODE	2
1003#define SENSOR_HFR_60FPS_MODE 3
1004#define SENSOR_HFR_90FPS_MODE 4
1005#define SENSOR_HFR_120FPS_MODE 5
1006
1007#define SENSOR_QTR_SIZE			0
1008#define SENSOR_FULL_SIZE		1
1009#define SENSOR_QVGA_SIZE		2
1010#define SENSOR_INVALID_SIZE		3
1011
1012#define CAMERA_EFFECT_OFF		0
1013#define CAMERA_EFFECT_MONO		1
1014#define CAMERA_EFFECT_NEGATIVE		2
1015#define CAMERA_EFFECT_SOLARIZE		3
1016#define CAMERA_EFFECT_SEPIA		4
1017#define CAMERA_EFFECT_POSTERIZE		5
1018#define CAMERA_EFFECT_WHITEBOARD	6
1019#define CAMERA_EFFECT_BLACKBOARD	7
1020#define CAMERA_EFFECT_AQUA		8
1021#define CAMERA_EFFECT_EMBOSS		9
1022#define CAMERA_EFFECT_SKETCH		10
1023#define CAMERA_EFFECT_NEON		11
1024#define CAMERA_EFFECT_FADED		12
1025#define CAMERA_EFFECT_VINTAGECOOL	13
1026#define CAMERA_EFFECT_VINTAGEWARM	14
1027#define CAMERA_EFFECT_ACCENT_BLUE       15
1028#define CAMERA_EFFECT_ACCENT_GREEN      16
1029#define CAMERA_EFFECT_ACCENT_ORANGE     17
1030#define CAMERA_EFFECT_MAX               18
1031
1032/* QRD */
1033#define CAMERA_EFFECT_BW		10
1034#define CAMERA_EFFECT_BLUISH	12
1035#define CAMERA_EFFECT_REDDISH	13
1036#define CAMERA_EFFECT_GREENISH	14
1037
1038/* QRD */
1039#define CAMERA_ANTIBANDING_OFF		0
1040#define CAMERA_ANTIBANDING_50HZ		2
1041#define CAMERA_ANTIBANDING_60HZ		1
1042#define CAMERA_ANTIBANDING_AUTO		3
1043
1044#define CAMERA_CONTRAST_LV0			0
1045#define CAMERA_CONTRAST_LV1			1
1046#define CAMERA_CONTRAST_LV2			2
1047#define CAMERA_CONTRAST_LV3			3
1048#define CAMERA_CONTRAST_LV4			4
1049#define CAMERA_CONTRAST_LV5			5
1050#define CAMERA_CONTRAST_LV6			6
1051#define CAMERA_CONTRAST_LV7			7
1052#define CAMERA_CONTRAST_LV8			8
1053#define CAMERA_CONTRAST_LV9			9
1054
1055#define CAMERA_BRIGHTNESS_LV0			0
1056#define CAMERA_BRIGHTNESS_LV1			1
1057#define CAMERA_BRIGHTNESS_LV2			2
1058#define CAMERA_BRIGHTNESS_LV3			3
1059#define CAMERA_BRIGHTNESS_LV4			4
1060#define CAMERA_BRIGHTNESS_LV5			5
1061#define CAMERA_BRIGHTNESS_LV6			6
1062#define CAMERA_BRIGHTNESS_LV7			7
1063#define CAMERA_BRIGHTNESS_LV8			8
1064
1065
1066#define CAMERA_SATURATION_LV0			0
1067#define CAMERA_SATURATION_LV1			1
1068#define CAMERA_SATURATION_LV2			2
1069#define CAMERA_SATURATION_LV3			3
1070#define CAMERA_SATURATION_LV4			4
1071#define CAMERA_SATURATION_LV5			5
1072#define CAMERA_SATURATION_LV6			6
1073#define CAMERA_SATURATION_LV7			7
1074#define CAMERA_SATURATION_LV8			8
1075
1076#define CAMERA_SHARPNESS_LV0		0
1077#define CAMERA_SHARPNESS_LV1		3
1078#define CAMERA_SHARPNESS_LV2		6
1079#define CAMERA_SHARPNESS_LV3		9
1080#define CAMERA_SHARPNESS_LV4		12
1081#define CAMERA_SHARPNESS_LV5		15
1082#define CAMERA_SHARPNESS_LV6		18
1083#define CAMERA_SHARPNESS_LV7		21
1084#define CAMERA_SHARPNESS_LV8		24
1085#define CAMERA_SHARPNESS_LV9		27
1086#define CAMERA_SHARPNESS_LV10		30
1087
1088#define CAMERA_SETAE_AVERAGE		0
1089#define CAMERA_SETAE_CENWEIGHT	1
1090
1091#define  CAMERA_WB_AUTO               1 /* This list must match aeecamera.h */
1092#define  CAMERA_WB_CUSTOM             2
1093#define  CAMERA_WB_INCANDESCENT       3
1094#define  CAMERA_WB_FLUORESCENT        4
1095#define  CAMERA_WB_DAYLIGHT           5
1096#define  CAMERA_WB_CLOUDY_DAYLIGHT    6
1097#define  CAMERA_WB_TWILIGHT           7
1098#define  CAMERA_WB_SHADE              8
1099
1100#define CAMERA_EXPOSURE_COMPENSATION_LV0			12
1101#define CAMERA_EXPOSURE_COMPENSATION_LV1			6
1102#define CAMERA_EXPOSURE_COMPENSATION_LV2			0
1103#define CAMERA_EXPOSURE_COMPENSATION_LV3			-6
1104#define CAMERA_EXPOSURE_COMPENSATION_LV4			-12
1105
1106enum msm_v4l2_saturation_level {
1107	MSM_V4L2_SATURATION_L0,
1108	MSM_V4L2_SATURATION_L1,
1109	MSM_V4L2_SATURATION_L2,
1110	MSM_V4L2_SATURATION_L3,
1111	MSM_V4L2_SATURATION_L4,
1112	MSM_V4L2_SATURATION_L5,
1113	MSM_V4L2_SATURATION_L6,
1114	MSM_V4L2_SATURATION_L7,
1115	MSM_V4L2_SATURATION_L8,
1116	MSM_V4L2_SATURATION_L9,
1117	MSM_V4L2_SATURATION_L10,
1118};
1119
1120enum msm_v4l2_contrast_level {
1121	MSM_V4L2_CONTRAST_L0,
1122	MSM_V4L2_CONTRAST_L1,
1123	MSM_V4L2_CONTRAST_L2,
1124	MSM_V4L2_CONTRAST_L3,
1125	MSM_V4L2_CONTRAST_L4,
1126	MSM_V4L2_CONTRAST_L5,
1127	MSM_V4L2_CONTRAST_L6,
1128	MSM_V4L2_CONTRAST_L7,
1129	MSM_V4L2_CONTRAST_L8,
1130	MSM_V4L2_CONTRAST_L9,
1131	MSM_V4L2_CONTRAST_L10,
1132};
1133
1134
1135enum msm_v4l2_exposure_level {
1136	MSM_V4L2_EXPOSURE_N2,
1137	MSM_V4L2_EXPOSURE_N1,
1138	MSM_V4L2_EXPOSURE_D,
1139	MSM_V4L2_EXPOSURE_P1,
1140	MSM_V4L2_EXPOSURE_P2,
1141};
1142
1143enum msm_v4l2_sharpness_level {
1144	MSM_V4L2_SHARPNESS_L0,
1145	MSM_V4L2_SHARPNESS_L1,
1146	MSM_V4L2_SHARPNESS_L2,
1147	MSM_V4L2_SHARPNESS_L3,
1148	MSM_V4L2_SHARPNESS_L4,
1149	MSM_V4L2_SHARPNESS_L5,
1150	MSM_V4L2_SHARPNESS_L6,
1151};
1152
1153enum msm_v4l2_expo_metering_mode {
1154	MSM_V4L2_EXP_FRAME_AVERAGE,
1155	MSM_V4L2_EXP_CENTER_WEIGHTED,
1156	MSM_V4L2_EXP_SPOT_METERING,
1157};
1158
1159enum msm_v4l2_iso_mode {
1160	MSM_V4L2_ISO_AUTO = 0,
1161	MSM_V4L2_ISO_DEBLUR,
1162	MSM_V4L2_ISO_100,
1163	MSM_V4L2_ISO_200,
1164	MSM_V4L2_ISO_400,
1165	MSM_V4L2_ISO_800,
1166	MSM_V4L2_ISO_1600,
1167};
1168
1169enum msm_v4l2_wb_mode {
1170	MSM_V4L2_WB_OFF,
1171	MSM_V4L2_WB_AUTO ,
1172	MSM_V4L2_WB_CUSTOM,
1173	MSM_V4L2_WB_INCANDESCENT,
1174	MSM_V4L2_WB_FLUORESCENT,
1175	MSM_V4L2_WB_DAYLIGHT,
1176	MSM_V4L2_WB_CLOUDY_DAYLIGHT,
1177};
1178
1179enum msm_v4l2_special_effect {
1180	MSM_V4L2_EFFECT_OFF,
1181	MSM_V4L2_EFFECT_MONO,
1182	MSM_V4L2_EFFECT_NEGATIVE,
1183	MSM_V4L2_EFFECT_SOLARIZE,
1184	MSM_V4L2_EFFECT_SEPIA,
1185	MSM_V4L2_EFFECT_POSTERAIZE,
1186	MSM_V4L2_EFFECT_WHITEBOARD,
1187	MSM_V4L2_EFFECT_BLACKBOARD,
1188	MSM_V4L2_EFFECT_AQUA,
1189	MSM_V4L2_EFFECT_EMBOSS,
1190	MSM_V4L2_EFFECT_SKETCH,
1191	MSM_V4L2_EFFECT_NEON,
1192	MSM_V4L2_EFFECT_MAX,
1193};
1194
1195enum msm_v4l2_power_line_frequency {
1196	MSM_V4L2_POWER_LINE_OFF,
1197	MSM_V4L2_POWER_LINE_60HZ,
1198	MSM_V4L2_POWER_LINE_50HZ,
1199	MSM_V4L2_POWER_LINE_AUTO,
1200};
1201
1202#define CAMERA_ISO_TYPE_AUTO           0
1203#define CAMEAR_ISO_TYPE_HJR            1
1204#define CAMEAR_ISO_TYPE_100            2
1205#define CAMERA_ISO_TYPE_200            3
1206#define CAMERA_ISO_TYPE_400            4
1207#define CAMEAR_ISO_TYPE_800            5
1208#define CAMERA_ISO_TYPE_1600           6
1209
1210struct sensor_pict_fps {
1211	uint16_t prevfps;
1212	uint16_t pictfps;
1213};
1214
1215struct exp_gain_cfg {
1216	uint16_t gain;
1217	uint32_t line;
1218};
1219
1220struct focus_cfg {
1221	int32_t steps;
1222	int dir;
1223};
1224
1225struct fps_cfg {
1226	uint16_t f_mult;
1227	uint16_t fps_div;
1228	uint32_t pict_fps_div;
1229};
1230struct wb_info_cfg {
1231	uint16_t red_gain;
1232	uint16_t green_gain;
1233	uint16_t blue_gain;
1234};
1235struct sensor_3d_exp_cfg {
1236	uint16_t gain;
1237	uint32_t line;
1238	uint16_t r_gain;
1239	uint16_t b_gain;
1240	uint16_t gr_gain;
1241	uint16_t gb_gain;
1242	uint16_t gain_adjust;
1243};
1244struct sensor_3d_cali_data_t{
1245	unsigned char left_p_matrix[3][4][8];
1246	unsigned char right_p_matrix[3][4][8];
1247	unsigned char square_len[8];
1248	unsigned char focal_len[8];
1249	unsigned char pixel_pitch[8];
1250	uint16_t left_r;
1251	uint16_t left_b;
1252	uint16_t left_gb;
1253	uint16_t left_af_far;
1254	uint16_t left_af_mid;
1255	uint16_t left_af_short;
1256	uint16_t left_af_5um;
1257	uint16_t left_af_50up;
1258	uint16_t left_af_50down;
1259	uint16_t right_r;
1260	uint16_t right_b;
1261	uint16_t right_gb;
1262	uint16_t right_af_far;
1263	uint16_t right_af_mid;
1264	uint16_t right_af_short;
1265	uint16_t right_af_5um;
1266	uint16_t right_af_50up;
1267	uint16_t right_af_50down;
1268};
1269struct sensor_init_cfg {
1270	uint8_t prev_res;
1271	uint8_t pict_res;
1272};
1273
1274struct sensor_calib_data {
1275	/* Color Related Measurements */
1276	uint16_t r_over_g;
1277	uint16_t b_over_g;
1278	uint16_t gr_over_gb;
1279
1280	/* Lens Related Measurements */
1281	uint16_t macro_2_inf;
1282	uint16_t inf_2_macro;
1283	uint16_t stroke_amt;
1284	uint16_t af_pos_1m;
1285	uint16_t af_pos_inf;
1286};
1287
1288enum msm_sensor_resolution_t {
1289	MSM_SENSOR_RES_FULL,
1290	MSM_SENSOR_RES_QTR,
1291	MSM_SENSOR_RES_2,
1292	MSM_SENSOR_RES_3,
1293	MSM_SENSOR_RES_4,
1294	MSM_SENSOR_RES_5,
1295	MSM_SENSOR_RES_6,
1296	MSM_SENSOR_RES_7,
1297	MSM_SENSOR_INVALID_RES,
1298};
1299
1300struct msm_sensor_output_info_t {
1301	uint16_t x_output;
1302	uint16_t y_output;
1303	uint16_t line_length_pclk;
1304	uint16_t frame_length_lines;
1305	uint32_t vt_pixel_clk;
1306	uint32_t op_pixel_clk;
1307	uint16_t binning_factor;
1308};
1309
1310struct sensor_output_info_t {
1311	struct msm_sensor_output_info_t *output_info;
1312	uint16_t num_info;
1313};
1314
1315struct msm_sensor_exp_gain_info_t {
1316	uint16_t coarse_int_time_addr;
1317	uint16_t global_gain_addr;
1318	uint16_t vert_offset;
1319};
1320
1321struct msm_sensor_output_reg_addr_t {
1322	uint16_t x_output;
1323	uint16_t y_output;
1324	uint16_t line_length_pclk;
1325	uint16_t frame_length_lines;
1326};
1327
1328struct sensor_driver_params_type {
1329	struct msm_camera_i2c_reg_setting *init_settings;
1330	uint16_t init_settings_size;
1331	struct msm_camera_i2c_reg_setting *mode_settings;
1332	uint16_t mode_settings_size;
1333	struct msm_sensor_output_reg_addr_t *sensor_output_reg_addr;
1334	struct msm_camera_i2c_reg_setting *start_settings;
1335	struct msm_camera_i2c_reg_setting *stop_settings;
1336	struct msm_camera_i2c_reg_setting *groupon_settings;
1337	struct msm_camera_i2c_reg_setting *groupoff_settings;
1338	struct msm_sensor_exp_gain_info_t *sensor_exp_gain_info;
1339	struct msm_sensor_output_info_t *output_info;
1340};
1341
1342struct mirror_flip {
1343	int32_t x_mirror;
1344	int32_t y_flip;
1345};
1346
1347struct cord {
1348	uint32_t x;
1349	uint32_t y;
1350};
1351
1352struct msm_eeprom_data_t {
1353	void *eeprom_data;
1354	uint16_t index;
1355};
1356
1357struct msm_camera_csid_vc_cfg {
1358	uint8_t cid;
1359	uint8_t dt;
1360	uint8_t decode_format;
1361};
1362
1363struct csi_lane_params_t {
1364	uint16_t csi_lane_assign;
1365	uint8_t csi_lane_mask;
1366	uint8_t csi_if;
1367	uint8_t csid_core[2];
1368	uint8_t csi_phy_sel;
1369};
1370
1371struct msm_camera_csid_lut_params {
1372	uint8_t num_cid;
1373	struct msm_camera_csid_vc_cfg *vc_cfg;
1374};
1375
1376struct msm_camera_csid_params {
1377	uint8_t lane_cnt;
1378	uint16_t lane_assign;
1379	uint8_t phy_sel;
1380	struct msm_camera_csid_lut_params lut_params;
1381};
1382
1383struct msm_camera_csiphy_params {
1384	uint8_t lane_cnt;
1385	uint8_t settle_cnt;
1386	uint16_t lane_mask;
1387	uint8_t combo_mode;
1388	uint8_t csid_core;
1389};
1390
1391struct msm_camera_csi2_params {
1392	struct msm_camera_csid_params csid_params;
1393	struct msm_camera_csiphy_params csiphy_params;
1394};
1395
1396enum msm_camera_csi_data_format {
1397	CSI_8BIT,
1398	CSI_10BIT,
1399	CSI_12BIT,
1400};
1401
1402struct msm_camera_csi_params {
1403	enum msm_camera_csi_data_format data_format;
1404	uint8_t lane_cnt;
1405	uint8_t lane_assign;
1406	uint8_t settle_cnt;
1407	uint8_t dpcm_scheme;
1408};
1409
1410enum csic_cfg_type_t {
1411	CSIC_INIT,
1412	CSIC_CFG,
1413};
1414
1415struct csic_cfg_data {
1416	enum csic_cfg_type_t cfgtype;
1417	struct msm_camera_csi_params *csic_params;
1418};
1419
1420enum csid_cfg_type_t {
1421	CSID_INIT,
1422	CSID_CFG,
1423};
1424
1425struct csid_cfg_data {
1426	enum csid_cfg_type_t cfgtype;
1427	union {
1428		uint32_t csid_version;
1429		struct msm_camera_csid_params *csid_params;
1430	} cfg;
1431};
1432
1433enum csiphy_cfg_type_t {
1434	CSIPHY_INIT,
1435	CSIPHY_CFG,
1436};
1437
1438struct csiphy_cfg_data {
1439	enum csiphy_cfg_type_t cfgtype;
1440	struct msm_camera_csiphy_params *csiphy_params;
1441};
1442
1443#define CSI_EMBED_DATA 0x12
1444#define CSI_RESERVED_DATA_0 0x13
1445#define CSI_YUV422_8  0x1E
1446#define CSI_RAW8    0x2A
1447#define CSI_RAW10   0x2B
1448#define CSI_RAW12   0x2C
1449
1450#define CSI_DECODE_6BIT 0
1451#define CSI_DECODE_8BIT 1
1452#define CSI_DECODE_10BIT 2
1453#define CSI_DECODE_DPCM_10_8_10 5
1454
1455#define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\
1456	(action)+((vfe)<<ISPIF_VFE_INTF_SHIFT))
1457#define ISPIF_ON_FRAME_BOUNDARY   (0x01 << 0)
1458#define ISPIF_OFF_FRAME_BOUNDARY  (0x01 << 1)
1459#define ISPIF_OFF_IMMEDIATELY     (0x01 << 2)
1460#define ISPIF_S_STREAM_SHIFT      4
1461#define ISPIF_VFE_INTF_SHIFT      12
1462
1463#define PIX_0 (0x01 << 0)
1464#define RDI_0 (0x01 << 1)
1465#define PIX_1 (0x01 << 2)
1466#define RDI_1 (0x01 << 3)
1467#define RDI_2 (0x01 << 4)
1468
1469enum msm_ispif_vfe_intf {
1470	VFE0,
1471	VFE1,
1472	VFE_MAX,
1473};
1474
1475enum msm_ispif_intftype {
1476	PIX0,
1477	RDI0,
1478	PIX1,
1479	RDI1,
1480	RDI2,
1481	INTF_MAX,
1482};
1483
1484enum msm_ispif_vc {
1485	VC0,
1486	VC1,
1487	VC2,
1488	VC3,
1489};
1490
1491enum msm_ispif_cid {
1492	CID0,
1493	CID1,
1494	CID2,
1495	CID3,
1496	CID4,
1497	CID5,
1498	CID6,
1499	CID7,
1500	CID8,
1501	CID9,
1502	CID10,
1503	CID11,
1504	CID12,
1505	CID13,
1506	CID14,
1507	CID15,
1508};
1509
1510struct msm_ispif_params {
1511	uint8_t intftype;
1512	uint16_t cid_mask;
1513	uint8_t csid;
1514	uint8_t vfe_intf;
1515};
1516
1517struct msm_ispif_params_list {
1518	uint32_t len;
1519	struct msm_ispif_params params[4];
1520};
1521
1522enum ispif_cfg_type_t {
1523	ISPIF_INIT,
1524	ISPIF_SET_CFG,
1525	ISPIF_SET_ON_FRAME_BOUNDARY,
1526	ISPIF_SET_OFF_FRAME_BOUNDARY,
1527	ISPIF_SET_OFF_IMMEDIATELY,
1528	ISPIF_RELEASE,
1529};
1530
1531struct ispif_cfg_data {
1532	enum ispif_cfg_type_t cfgtype;
1533	union {
1534		uint32_t csid_version;
1535		int cmd;
1536		struct msm_ispif_params_list ispif_params;
1537	} cfg;
1538};
1539
1540enum msm_camera_i2c_reg_addr_type {
1541	MSM_CAMERA_I2C_BYTE_ADDR = 1,
1542	MSM_CAMERA_I2C_WORD_ADDR,
1543	MSM_CAMERA_I2C_3B_ADDR,
1544};
1545
1546struct msm_camera_i2c_reg_array {
1547	uint16_t reg_addr;
1548	uint16_t reg_data;
1549};
1550
1551enum msm_camera_i2c_data_type {
1552	MSM_CAMERA_I2C_BYTE_DATA = 1,
1553	MSM_CAMERA_I2C_WORD_DATA,
1554	MSM_CAMERA_I2C_SET_BYTE_MASK,
1555	MSM_CAMERA_I2C_UNSET_BYTE_MASK,
1556	MSM_CAMERA_I2C_SET_WORD_MASK,
1557	MSM_CAMERA_I2C_UNSET_WORD_MASK,
1558	MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA,
1559};
1560
1561struct msm_camera_i2c_reg_setting {
1562	struct msm_camera_i2c_reg_array *reg_setting;
1563	uint16_t size;
1564	enum msm_camera_i2c_reg_addr_type addr_type;
1565	enum msm_camera_i2c_data_type data_type;
1566	uint16_t delay;
1567};
1568
1569enum oem_setting_type {
1570	I2C_READ = 1,
1571	I2C_WRITE,
1572	GPIO_OP,
1573	EEPROM_READ,
1574	VREG_SET,
1575	CLK_SET,
1576};
1577
1578struct sensor_oem_setting {
1579	enum oem_setting_type type;
1580	void *data;
1581};
1582
1583enum camera_vreg_type {
1584	REG_LDO,
1585	REG_VS,
1586	REG_GPIO,
1587};
1588
1589enum msm_camera_vreg_name_t {
1590	CAM_VDIG,
1591	CAM_VIO,
1592	CAM_VANA,
1593	CAM_VAF,
1594	CAM_VREG_MAX,
1595};
1596
1597struct msm_camera_csi_lane_params {
1598	uint16_t csi_lane_assign;
1599	uint16_t csi_lane_mask;
1600};
1601
1602struct camera_vreg_t {
1603	const char *reg_name;
1604	int min_voltage;
1605	int max_voltage;
1606	int op_mode;
1607	uint32_t delay;
1608};
1609
1610struct msm_camera_vreg_setting {
1611	struct camera_vreg_t *cam_vreg;
1612	uint16_t num_vreg;
1613	uint8_t enable;
1614};
1615
1616struct msm_cam_clk_info {
1617	const char *clk_name;
1618	long clk_rate;
1619	uint32_t delay;
1620};
1621
1622struct msm_cam_clk_setting {
1623	struct msm_cam_clk_info *clk_info;
1624	uint16_t num_clk_info;
1625	uint8_t enable;
1626};
1627
1628struct sensor_cfg_data {
1629	int cfgtype;
1630	int mode;
1631	int rs;
1632	uint8_t max_steps;
1633
1634	union {
1635		int8_t effect;
1636		uint8_t lens_shading;
1637		uint16_t prevl_pf;
1638		uint16_t prevp_pl;
1639		uint16_t pictl_pf;
1640		uint16_t pictp_pl;
1641		uint32_t pict_max_exp_lc;
1642		uint16_t p_fps;
1643		uint8_t iso_type;
1644		struct sensor_init_cfg init_info;
1645		struct sensor_pict_fps gfps;
1646		struct exp_gain_cfg exp_gain;
1647		struct focus_cfg focus;
1648		struct fps_cfg fps;
1649		struct wb_info_cfg wb_info;
1650		struct sensor_3d_exp_cfg sensor_3d_exp;
1651		struct sensor_calib_data calib_info;
1652		struct sensor_output_info_t output_info;
1653		struct msm_eeprom_data_t eeprom_data;
1654		struct csi_lane_params_t csi_lane_params;
1655		/* QRD */
1656		uint16_t antibanding;
1657		uint8_t contrast;
1658		uint8_t saturation;
1659		uint8_t sharpness;
1660		int8_t brightness;
1661		int ae_mode;
1662		uint8_t wb_val;
1663		int8_t exp_compensation;
1664		uint32_t pclk;
1665		struct cord aec_cord;
1666		int is_autoflash;
1667		struct mirror_flip mirror_flip;
1668		void *setting;
1669	} cfg;
1670};
1671
1672enum gpio_operation_type {
1673	GPIO_REQUEST,
1674	GPIO_FREE,
1675	GPIO_SET_DIRECTION_OUTPUT,
1676	GPIO_SET_DIRECTION_INPUT,
1677	GPIO_GET_VALUE,
1678	GPIO_SET_VALUE,
1679};
1680
1681struct msm_cam_gpio_operation {
1682	enum gpio_operation_type op_type;
1683	unsigned address;
1684	int value;
1685	const char *tag;
1686};
1687
1688struct damping_params_t {
1689	uint32_t damping_step;
1690	uint32_t damping_delay;
1691	uint32_t hw_params;
1692};
1693
1694enum actuator_type {
1695	ACTUATOR_VCM,
1696	ACTUATOR_PIEZO,
1697	ACTUATOR_HVCM,
1698	ACTUATOR_BIVCM,
1699};
1700
1701enum msm_actuator_data_type {
1702	MSM_ACTUATOR_BYTE_DATA = 1,
1703	MSM_ACTUATOR_WORD_DATA,
1704};
1705
1706enum msm_actuator_addr_type {
1707	MSM_ACTUATOR_BYTE_ADDR = 1,
1708	MSM_ACTUATOR_WORD_ADDR,
1709};
1710
1711enum msm_actuator_write_type {
1712	MSM_ACTUATOR_WRITE_HW_DAMP,
1713	MSM_ACTUATOR_WRITE_DAC,
1714	MSM_ACTUATOR_WRITE,
1715	MSM_ACTUATOR_WRITE_DIR_REG,
1716	MSM_ACTUATOR_POLL,
1717	MSM_ACTUATOR_READ_WRITE,
1718};
1719
1720struct msm_actuator_reg_params_t {
1721	enum msm_actuator_write_type reg_write_type;
1722	uint32_t hw_mask;
1723	uint16_t reg_addr;
1724	uint16_t hw_shift;
1725	uint16_t data_type;
1726	uint16_t addr_type;
1727	uint16_t reg_data;
1728	uint16_t delay;
1729};
1730
1731struct reg_settings_t {
1732	uint16_t reg_addr;
1733	uint16_t reg_data;
1734};
1735
1736struct region_params_t {
1737	/* [0] = ForwardDirection Macro boundary
1738	   [1] = ReverseDirection Inf boundary
1739	 */
1740	uint16_t step_bound[2];
1741	uint16_t code_per_step;
1742};
1743
1744struct msm_actuator_move_params_t {
1745	int8_t dir;
1746	int8_t sign_dir;
1747	int16_t dest_step_pos;
1748	int32_t num_steps;
1749	struct damping_params_t *ringing_params;
1750};
1751
1752struct msm_actuator_tuning_params_t {
1753	int16_t initial_code;
1754	uint16_t pwd_step;
1755	uint16_t region_size;
1756	uint32_t total_steps;
1757	struct region_params_t *region_params;
1758};
1759
1760struct msm_actuator_params_t {
1761	enum actuator_type act_type;
1762	uint8_t reg_tbl_size;
1763	uint16_t data_size;
1764	uint16_t init_setting_size;
1765	uint32_t i2c_addr;
1766	enum msm_actuator_addr_type i2c_addr_type;
1767	enum msm_actuator_data_type i2c_data_type;
1768	struct msm_actuator_reg_params_t *reg_tbl_params;
1769	struct reg_settings_t *init_settings;
1770};
1771
1772struct msm_actuator_set_info_t {
1773	struct msm_actuator_params_t actuator_params;
1774	struct msm_actuator_tuning_params_t af_tuning_params;
1775};
1776
1777struct msm_actuator_get_info_t {
1778	uint32_t focal_length_num;
1779	uint32_t focal_length_den;
1780	uint32_t f_number_num;
1781	uint32_t f_number_den;
1782	uint32_t f_pix_num;
1783	uint32_t f_pix_den;
1784	uint32_t total_f_dist_num;
1785	uint32_t total_f_dist_den;
1786	uint32_t hor_view_angle_num;
1787	uint32_t hor_view_angle_den;
1788	uint32_t ver_view_angle_num;
1789	uint32_t ver_view_angle_den;
1790};
1791
1792enum af_camera_name {
1793	ACTUATOR_MAIN_CAM_0,
1794	ACTUATOR_MAIN_CAM_1,
1795	ACTUATOR_MAIN_CAM_2,
1796	ACTUATOR_MAIN_CAM_3,
1797	ACTUATOR_MAIN_CAM_4,
1798	ACTUATOR_MAIN_CAM_5,
1799	ACTUATOR_WEB_CAM_0,
1800	ACTUATOR_WEB_CAM_1,
1801	ACTUATOR_WEB_CAM_2,
1802};
1803
1804struct msm_actuator_cfg_data {
1805	int cfgtype;
1806	uint8_t is_af_supported;
1807	union {
1808		struct msm_actuator_move_params_t move;
1809		struct msm_actuator_set_info_t set_info;
1810		struct msm_actuator_get_info_t get_info;
1811		enum af_camera_name cam_name;
1812	} cfg;
1813};
1814
1815struct msm_eeprom_support {
1816	uint16_t is_supported;
1817	uint16_t size;
1818	uint16_t index;
1819	uint16_t qvalue;
1820};
1821
1822struct msm_calib_wb {
1823	uint16_t r_over_g;
1824	uint16_t b_over_g;
1825	uint16_t gr_over_gb;
1826};
1827
1828struct msm_calib_af {
1829	uint16_t macro_dac;
1830	uint16_t inf_dac;
1831	uint16_t start_dac;
1832};
1833
1834struct msm_calib_lsc {
1835	uint16_t r_gain[221];
1836	uint16_t b_gain[221];
1837	uint16_t gr_gain[221];
1838	uint16_t gb_gain[221];
1839};
1840
1841struct pixel_t {
1842	int x;
1843	int y;
1844};
1845
1846struct msm_calib_dpc {
1847	uint16_t validcount;
1848	struct pixel_t snapshot_coord[128];
1849	struct pixel_t preview_coord[128];
1850	struct pixel_t video_coord[128];
1851};
1852
1853struct msm_calib_raw {
1854	uint8_t *data;
1855	uint32_t size;
1856};
1857
1858struct msm_camera_eeprom_info_t {
1859	struct msm_eeprom_support af;
1860	struct msm_eeprom_support wb;
1861	struct msm_eeprom_support lsc;
1862	struct msm_eeprom_support dpc;
1863	struct msm_eeprom_support raw;
1864};
1865
1866struct msm_eeprom_cfg_data {
1867	int cfgtype;
1868	uint8_t is_eeprom_supported;
1869	union {
1870		struct msm_eeprom_data_t get_data;
1871		struct msm_camera_eeprom_info_t get_info;
1872	} cfg;
1873};
1874
1875struct sensor_large_data {
1876	int cfgtype;
1877	union {
1878		struct sensor_3d_cali_data_t sensor_3d_cali_data;
1879	} data;
1880};
1881
1882enum sensor_type_t {
1883	BAYER,
1884	YUV,
1885	JPEG_SOC,
1886};
1887
1888enum flash_type {
1889	LED_FLASH,
1890	STROBE_FLASH,
1891};
1892
1893enum strobe_flash_ctrl_type {
1894	STROBE_FLASH_CTRL_INIT,
1895	STROBE_FLASH_CTRL_CHARGE,
1896	STROBE_FLASH_CTRL_RELEASE
1897};
1898
1899struct strobe_flash_ctrl_data {
1900	enum strobe_flash_ctrl_type type;
1901	int charge_en;
1902};
1903
1904struct msm_camera_info {
1905	int num_cameras;
1906	uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1907	uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1908	uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1909	const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1910	enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
1911};
1912
1913struct msm_cam_config_dev_info {
1914	int num_config_nodes;
1915	const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
1916	int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
1917};
1918
1919struct msm_mctl_node_info {
1920	int num_mctl_nodes;
1921	const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1922};
1923
1924struct flash_ctrl_data {
1925	int flashtype;
1926	union {
1927		int led_state;
1928		struct strobe_flash_ctrl_data strobe_ctrl;
1929	} ctrl_data;
1930};
1931
1932#define GET_NAME			0
1933#define GET_PREVIEW_LINE_PER_FRAME	1
1934#define GET_PREVIEW_PIXELS_PER_LINE	2
1935#define GET_SNAPSHOT_LINE_PER_FRAME	3
1936#define GET_SNAPSHOT_PIXELS_PER_LINE	4
1937#define GET_SNAPSHOT_FPS		5
1938#define GET_SNAPSHOT_MAX_EP_LINE_CNT	6
1939
1940struct msm_camsensor_info {
1941	char name[MAX_SENSOR_NAME];
1942	uint8_t flash_enabled;
1943	uint8_t strobe_flash_enabled;
1944	uint8_t actuator_enabled;
1945	uint8_t ispif_supported;
1946	int8_t total_steps;
1947	uint8_t support_3d;
1948	enum flash_type flashtype;
1949	enum sensor_type_t sensor_type;
1950	uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1951	uint32_t camera_type; /* msm_camera_type */
1952	int mount_angle;
1953	uint32_t max_width;
1954	uint32_t max_height;
1955};
1956
1957#define V4L2_SINGLE_PLANE	0
1958#define V4L2_MULTI_PLANE_Y	0
1959#define V4L2_MULTI_PLANE_CBCR	1
1960#define V4L2_MULTI_PLANE_CB	1
1961#define V4L2_MULTI_PLANE_CR	2
1962
1963struct plane_data {
1964	int plane_id;
1965	uint32_t offset;
1966	unsigned long size;
1967};
1968
1969struct img_plane_info {
1970	uint32_t width;
1971	uint32_t height;
1972	uint32_t pixelformat;
1973	uint8_t buffer_type; /*Single/Multi planar*/
1974	uint8_t output_port;
1975	uint32_t ext_mode;
1976	uint8_t num_planes;
1977	struct plane_data plane[MAX_PLANES];
1978	uint32_t sp_y_offset;
1979	uint32_t inst_handle;
1980};
1981
1982#define QCAMERA_NAME "qcamera"
1983#define QCAMERA_SERVER_NAME "qcamera_server"
1984#define QCAMERA_DEVICE_GROUP_ID 1
1985#define QCAMERA_VNODE_GROUP_ID 2
1986
1987enum msm_cam_subdev_type {
1988	CSIPHY_DEV,
1989	CSID_DEV,
1990	CSIC_DEV,
1991	ISPIF_DEV,
1992	VFE_DEV,
1993	AXI_DEV,
1994	VPE_DEV,
1995	SENSOR_DEV,
1996	ACTUATOR_DEV,
1997	EEPROM_DEV,
1998	GESTURE_DEV,
1999	IRQ_ROUTER_DEV,
2000	CPP_DEV,
2001	CCI_DEV,
2002	FLASH_DEV,
2003};
2004
2005struct msm_mctl_set_sdev_data {
2006	uint32_t revision;
2007	enum msm_cam_subdev_type sdev_type;
2008};
2009
2010#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
2011	_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
2012
2013#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
2014	_IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
2015
2016#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
2017	_IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
2018
2019#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
2020	_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
2021
2022#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
2023	_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
2024
2025#define MSM_CAM_IOCTL_SEND_EVENT \
2026	_IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
2027
2028#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
2029	_IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
2030
2031#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
2032	_IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
2033
2034#define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \
2035	_IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
2036
2037#define MSM_CAM_V4L2_IOCTL_PRIVATE_GENERAL \
2038	_IOW('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t)
2039
2040#define VIDIOC_MSM_VPE_INIT \
2041	_IO('V', BASE_VIDIOC_PRIVATE + 15)
2042
2043#define VIDIOC_MSM_VPE_RELEASE \
2044	_IO('V', BASE_VIDIOC_PRIVATE + 16)
2045
2046#define VIDIOC_MSM_VPE_CFG \
2047	_IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *)
2048
2049#define VIDIOC_MSM_AXI_INIT \
2050	_IOWR('V', BASE_VIDIOC_PRIVATE + 18, uint8_t *)
2051
2052#define VIDIOC_MSM_AXI_RELEASE \
2053	_IO('V', BASE_VIDIOC_PRIVATE + 19)
2054
2055#define VIDIOC_MSM_AXI_CFG \
2056	_IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *)
2057
2058#define VIDIOC_MSM_AXI_IRQ \
2059	_IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *)
2060
2061#define VIDIOC_MSM_AXI_BUF_CFG \
2062	_IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
2063
2064#define VIDIOC_MSM_AXI_RDI_COUNT_UPDATE \
2065	_IOWR('V', BASE_VIDIOC_PRIVATE + 23, void *)
2066
2067#define VIDIOC_MSM_VFE_INIT \
2068	_IO('V', BASE_VIDIOC_PRIVATE + 24)
2069
2070#define VIDIOC_MSM_VFE_RELEASE \
2071	_IO('V', BASE_VIDIOC_PRIVATE + 25)
2072
2073struct msm_camera_v4l2_ioctl_t {
2074	uint32_t id;
2075	uint32_t len;
2076	uint32_t trans_code;
2077	void __user *ioctl_ptr;
2078};
2079
2080struct msm_camera_vfe_params_t {
2081	uint32_t operation_mode;
2082	uint32_t capture_count;
2083	uint8_t  skip_reset;
2084	uint8_t  stop_immediately;
2085	uint16_t port_info;
2086	uint32_t inst_handle;
2087	uint16_t cmd_type;
2088};
2089
2090enum msm_camss_irq_idx {
2091	CAMERA_SS_IRQ_0,
2092	CAMERA_SS_IRQ_1,
2093	CAMERA_SS_IRQ_2,
2094	CAMERA_SS_IRQ_3,
2095	CAMERA_SS_IRQ_4,
2096	CAMERA_SS_IRQ_5,
2097	CAMERA_SS_IRQ_6,
2098	CAMERA_SS_IRQ_7,
2099	CAMERA_SS_IRQ_8,
2100	CAMERA_SS_IRQ_9,
2101	CAMERA_SS_IRQ_10,
2102	CAMERA_SS_IRQ_11,
2103	CAMERA_SS_IRQ_12,
2104	CAMERA_SS_IRQ_MAX
2105};
2106
2107enum msm_cam_hw_idx {
2108	MSM_CAM_HW_MICRO,
2109	MSM_CAM_HW_CCI,
2110	MSM_CAM_HW_CSI0,
2111	MSM_CAM_HW_CSI1,
2112	MSM_CAM_HW_CSI2,
2113	MSM_CAM_HW_CSI3,
2114	MSM_CAM_HW_ISPIF,
2115	MSM_CAM_HW_CPP,
2116	MSM_CAM_HW_VFE0,
2117	MSM_CAM_HW_VFE1,
2118	MSM_CAM_HW_JPEG0,
2119	MSM_CAM_HW_JPEG1,
2120	MSM_CAM_HW_JPEG2,
2121	MSM_CAM_HW_MAX
2122};
2123
2124struct msm_camera_irq_cfg {
2125	/* Bit mask of all the camera hardwares that needs to
2126	 * be composited into a single IRQ to the MSM.
2127	 * Current usage: (may be updated based on hw changes)
2128	 * Bits 31:13 - Reserved.
2129	 * Bits 12:0
2130	 * 12 - MSM_CAM_HW_JPEG2
2131	 * 11 - MSM_CAM_HW_JPEG1
2132	 * 10 - MSM_CAM_HW_JPEG0
2133	 *  9 - MSM_CAM_HW_VFE1
2134	 *  8 - MSM_CAM_HW_VFE0
2135	 *  7 - MSM_CAM_HW_CPP
2136	 *  6 - MSM_CAM_HW_ISPIF
2137	 *  5 - MSM_CAM_HW_CSI3
2138	 *  4 - MSM_CAM_HW_CSI2
2139	 *  3 - MSM_CAM_HW_CSI1
2140	 *  2 - MSM_CAM_HW_CSI0
2141	 *  1 - MSM_CAM_HW_CCI
2142	 *  0 - MSM_CAM_HW_MICRO
2143	 */
2144	uint32_t cam_hw_mask;
2145	uint8_t  irq_idx;
2146	uint8_t  num_hwcore;
2147};
2148
2149#define MSM_IRQROUTER_CFG_COMPIRQ \
2150	_IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
2151
2152#define MAX_NUM_CPP_STRIPS 8
2153
2154enum msm_cpp_frame_type {
2155	MSM_CPP_OFFLINE_FRAME,
2156	MSM_CPP_REALTIME_FRAME,
2157};
2158
2159struct msm_cpp_frame_info_t {
2160	int32_t frame_id;
2161	uint32_t inst_id;
2162	uint32_t client_id;
2163	enum msm_cpp_frame_type frame_type;
2164	uint32_t num_strips;
2165};
2166
2167struct msm_ver_num_info {
2168	uint32_t main;
2169	uint32_t minor;
2170	uint32_t rev;
2171};
2172
2173#define VIDIOC_MSM_CPP_CFG \
2174	_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
2175
2176#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
2177	_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
2178
2179#define VIDIOC_MSM_CPP_GET_INST_INFO \
2180	_IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
2181
2182#define V4L2_EVENT_CPP_FRAME_DONE  (V4L2_EVENT_PRIVATE_START + 0)
2183
2184/* Instance Handle - inst_handle
2185 * Data bundle containing the information about where
2186 * to get a buffer for a particular camera instance.
2187 * This is a bitmask containing the following data:
2188 * Buffer Handle Bitmask:
2189 *      ------------------------------------
2190 *      Bits    :  Purpose
2191 *      ------------------------------------
2192 *      31      :  is Dev ID valid?
2193 *      30 - 24 :  Dev ID.
2194 *      23      :  is Image mode valid?
2195 *      22 - 16 :  Image mode.
2196 *      15      :  is MCTL PP inst idx valid?
2197 *      14 - 8  :  MCTL PP inst idx.
2198 *      7       :  is Video inst idx valid?
2199 *      6 - 0   :  Video inst idx.
2200 */
2201#define CLR_DEVID_MODE(handle)	(handle &= 0x00FFFFFF)
2202#define SET_DEVID_MODE(handle, data)	\
2203	(handle |= ((0x1 << 31) | ((data & 0x7F) << 24)))
2204#define GET_DEVID_MODE(handle)	\
2205	((handle & 0x80000000) ? ((handle & 0x7F000000) >> 24) : 0xFF)
2206
2207#define CLR_IMG_MODE(handle)	(handle &= 0xFF00FFFF)
2208#define SET_IMG_MODE(handle, data)	\
2209	(handle |= ((0x1 << 23) | ((data & 0x7F) << 16)))
2210#define GET_IMG_MODE(handle)	\
2211	((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF)
2212
2213#define CLR_MCTLPP_INST_IDX(handle)	(handle &= 0xFFFF00FF)
2214#define SET_MCTLPP_INST_IDX(handle, data)	\
2215	(handle |= ((0x1 << 15) | ((data & 0x7F) << 8)))
2216#define GET_MCTLPP_INST_IDX(handle)	\
2217	((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF)
2218
2219#define CLR_VIDEO_INST_IDX(handle)	(handle &= 0xFFFFFF00)
2220#define GET_VIDEO_INST_IDX(handle)	\
2221	((handle & 0x80) ? (handle & 0x7F) : 0xFF)
2222#define SET_VIDEO_INST_IDX(handle, data)	\
2223	(handle |= (0x1 << 7) | (data & 0x7F))
2224#endif
2225