14bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#ifndef __UAPI_MFD_MSM_ADIE_CODEC_H
24bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define __UAPI_MFD_MSM_ADIE_CODEC_H
34bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
44bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#include <linux/types.h>
54bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
64bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj/* Value Represents a entry */
74bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_ACTION_ENTRY       0x1
84bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj/* Value representing a delay wait */
94bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_ACTION_DELAY_WAIT      0x2
104bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj/* Value representing a stage reached */
114bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_ACTION_STAGE_REACHED   0x3
124bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
134bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj/* This value is the state after the client sets the path */
144bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_PATH_OFF                                        0x0050
154bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
164bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj/* State to which client asks the drv to proceed to where it can
174bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj * set up the clocks and 0-fill PCM buffers
184bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj */
194bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_DIGITAL_READY                                   0x0100
204bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
214bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj/* State to which client asks the drv to proceed to where it can
224bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj * start sending data after internal steady state delay
234bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj */
244bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_DIGITAL_ANALOG_READY                            0x1000
254bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
264bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
274bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj/*  Client Asks adie to switch off the Analog portion of the
284bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj *  the internal codec. After the use of this path
294bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj */
304bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_ANALOG_OFF                                      0x0750
314bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
324bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
334bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj/* Client Asks adie to switch off the digital portion of the
344bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj *  the internal codec. After switching off the analog portion.
354bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj *
364bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj *  0-fill PCM may or maynot be sent at this point
374bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj *
384bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj */
394bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_DIGITAL_OFF                                     0x0600
404bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
414bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj/* State to which client asks the drv to write the default values
424bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj * to the registers */
434bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_FLASH_IMAGE 					   0x0001
444bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
454bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj/* Path type */
464bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_RX 0
474bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_TX 1
484bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_LB 3
494bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_MAX 4
504bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
514bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
524bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
534bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
544bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	do { \
554bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj		((reg) = ((packed >> 16) & (0xff))); \
564bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj		((mask) = ((packed >> 8) & (0xff))); \
574bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj		((val) = ((packed) & (0xff))); \
584bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	} while (0);
594bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
604bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajstruct adie_codec_action_unit {
614bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 type;
624bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 action;
634bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj};
644bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
654bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajstruct adie_codec_hwsetting_entry{
664bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	struct adie_codec_action_unit *actions;
674bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 action_sz;
684bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 freq_plan;
694bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 osr;
704bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	/* u32  VolMask;
714bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	 * u32  SidetoneMask;
724bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	 */
734bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj};
744bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
754bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajstruct adie_codec_dev_profile {
764bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 path_type; /* RX or TX */
774bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 setting_sz;
784bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	struct adie_codec_hwsetting_entry *settings;
794bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj};
804bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
814bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajstruct adie_codec_register {
824bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u8 reg;
834bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u8 mask;
844bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u8 val;
854bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj};
864bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
874bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajstruct adie_codec_register_image {
884bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	struct adie_codec_register *regs;
894bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 img_sz;
904bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj};
914bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
924bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajstruct adie_codec_path;
934bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
944bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajstruct adie_codec_anc_data {
954bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 size;
964bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 writes[];
974bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj};
984bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
994bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajstruct adie_codec_operations {
1004bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	int	 codec_id;
1014bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	int (*codec_open) (struct adie_codec_dev_profile *profile,
1024bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj				struct adie_codec_path **path_pptr);
1034bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	int (*codec_close) (struct adie_codec_path *path_ptr);
1044bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	int (*codec_setpath) (struct adie_codec_path *path_ptr,
1054bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj				u32 freq_plan, u32 osr);
1064bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	int (*codec_proceed_stage) (struct adie_codec_path *path_ptr,
1074bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj					u32 state);
1084bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 (*codec_freq_supported) (struct adie_codec_dev_profile *profile,
1094bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj					u32 requested_freq);
1104bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	int (*codec_enable_sidetone) (struct adie_codec_path *rx_path_ptr,
1114bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj					u32 enable);
1124bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	int (*codec_enable_anc) (struct adie_codec_path *rx_path_ptr,
1134bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj		u32 enable, struct adie_codec_anc_data *calibration_writes);
1144bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	int (*codec_set_device_digital_volume) (
1154bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj					struct adie_codec_path *path_ptr,
1164bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj					u32 num_channels,
1174bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj					u32 vol_percentage);
1184bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
1194bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	int (*codec_set_device_analog_volume) (struct adie_codec_path *path_ptr,
1204bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj						u32 num_channels,
1214bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj						u32 volume);
1224bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	int (*codec_set_master_mode) (struct adie_codec_path *path_ptr,
1234bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj					u8 master);
1244bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj};
1254bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
1264bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajint adie_codec_register_codec_operations(
1274bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj				const struct adie_codec_operations *codec_ops);
1284bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajint adie_codec_open(struct adie_codec_dev_profile *profile,
1294bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	struct adie_codec_path **path_pptr);
1304bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajint adie_codec_setpath(struct adie_codec_path *path_ptr,
1314bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	u32 freq_plan, u32 osr);
1324bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajint adie_codec_proceed_stage(struct adie_codec_path *path_ptr, u32 state);
1334bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajint adie_codec_close(struct adie_codec_path *path_ptr);
1344bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraju32 adie_codec_freq_supported(struct adie_codec_dev_profile *profile,
1354bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj							u32 requested_freq);
1364bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajint adie_codec_enable_sidetone(struct adie_codec_path *rx_path_ptr, u32 enable);
1374bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajint adie_codec_enable_anc(struct adie_codec_path *rx_path_ptr, u32 enable,
1384bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj	struct adie_codec_anc_data *calibration_writes);
1394bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajint adie_codec_set_device_digital_volume(struct adie_codec_path *path_ptr,
1404bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj		u32 num_channels, u32 vol_percentage /* in percentage */);
1414bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
1424bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajint adie_codec_set_device_analog_volume(struct adie_codec_path *path_ptr,
1434bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj		u32 num_channels, u32 volume /* in percentage */);
1444bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj
1454bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramarajint adie_codec_set_master_mode(struct adie_codec_path *path_ptr, u8 master);
1464bdc7e6b80ad433341cdecea394976d89536cc34Naveen Ramaraj#endif
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