Arm64Assembler.cpp revision 66ce3e08c5632a20ea66bde6dd76397041edf034
1658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat/* 2658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * Copyright (C) 2013 The Android Open Source Project 3658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * All rights reserved. 4658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * 5658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * Redistribution and use in source and binary forms, with or without 6658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * modification, are permitted provided that the following conditions 7658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * are met: 8658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * * Redistributions of source code must retain the above copyright 9658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * notice, this list of conditions and the following disclaimer. 10658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * * Redistributions in binary form must reproduce the above copyright 11658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * notice, this list of conditions and the following disclaimer in 12658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * the documentation and/or other materials provided with the 13658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * distribution. 14658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * 15658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * SUCH DAMAGE. 27658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat */ 28658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 29d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#define LOG_TAG "ArmToArm64Assembler" 30658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 31658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include <stdio.h> 32658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include <stdlib.h> 33658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include <string.h> 34658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 3566ce3e08c5632a20ea66bde6dd76397041edf034Mark Salyzyn#include <android/log.h> 36658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include <cutils/properties.h> 37658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include <private/pixelflinger/ggl_context.h> 38658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 39d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#include "codeflinger/Arm64Assembler.h" 40d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#include "codeflinger/Arm64Disassembler.h" 4166ce3e08c5632a20ea66bde6dd76397041edf034Mark Salyzyn#include "codeflinger/CodeCache.h" 42658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 43658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat/* 44658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** -------------------------------------------- 45d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** Support for Arm64 in GGLAssembler JIT 46658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** -------------------------------------------- 47658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 48658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** Approach 49658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - GGLAssembler and associated files are largely un-changed. 50658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - A translator class maps ArmAssemblerInterface calls to 51d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** generate Arm64 instructions. 52658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 53658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 54d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** ArmToArm64Assembler 55658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 56658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 57658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Subclassed from ArmAssemblerInterface 58658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 59658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Translates each ArmAssemblerInterface call to generate 60d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** one or more Arm64 instructions as necessary. 61658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 62658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Does not implement ArmAssemblerInterface portions unused by GGLAssembler 63658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** It calls NOT_IMPLEMENTED() for such cases, which in turn logs 64658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** a fatal message. 65658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 66658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Uses A64_.. series of functions to generate instruction machine code 67d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** for Arm64 instructions. These functions also log the instruction 68d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** to LOG, if ARM64_ASM_DEBUG define is set to 1 69658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 70658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Dumps machine code and eqvt assembly if "debug.pf.disasm" option is set 71d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** It uses arm64_disassemble to perform disassembly 72658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 73658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Uses register 13 (SP in ARM), 15 (PC in ARM), 16, 17 for storing 74658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** intermediate results. GGLAssembler does not use SP and PC as these 75658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** registers are marked as reserved. The temporary registers are not 76d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** saved/restored on stack as these are caller-saved registers in Arm64 77658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 78658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Uses CSEL instruction to support conditional execution. The result is 79658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** stored in a temporary register and then copied to the target register 80658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** if the condition is true. 81658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 82658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - In the case of conditional data transfer instructions, conditional 83658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** branch is used to skip over instruction, if the condition is false 84658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 85658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Wherever possible, immediate values are transferred to temporary 86658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** register prior to processing. This simplifies overall implementation 87658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** as instructions requiring immediate values are converted to 88658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** move immediate instructions followed by register-register instruction. 89658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 90658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** -------------------------------------------- 91d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** ArmToArm64Assembler unit test bench 92658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** -------------------------------------------- 93658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 94d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** - Tests ArmToArm64Assembler interface for all the possible 95658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ways in which GGLAssembler uses ArmAssemblerInterface interface. 96658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 97658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Uses test jacket (written in assembly) to set the registers, 98658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** condition flags prior to calling generated instruction. It also 99658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** copies registers and flags at the end of execution. Caller then 100658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** checks if generated code performed correct operation based on 101658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** output registers and flags. 102658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 103658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Broadly contains three type of tests, (i) data operation tests 104658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** (ii) data transfer tests and (iii) LDM/STM tests. 105658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 106658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 107d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** Arm64 disassembler 108658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 109658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - This disassembler disassembles only those machine codes which can be 110d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** generated by ArmToArm64Assembler. It has a unit testbench which 111658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** tests all the instructions supported by the disassembler. 112658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 113658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ------------------------------------------------------------------ 114658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ARMAssembler/ARMAssemblerInterface/ARMAssemblerProxy changes 115658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ------------------------------------------------------------------ 116658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 117658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - In existing code, addresses were being handled as 32 bit values at 118658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** certain places. 119658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 120658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Added a new set of functions for address load/store/manipulation. 121658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** These are ADDR_LDR, ADDR_STR, ADDR_ADD, ADDR_SUB and they map to 122658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** default 32 bit implementations in ARMAssemblerInterface. 123658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 124d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** - ArmToArm64Assembler maps these functions to appropriate 64 bit 125658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** functions. 126658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 127658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 128658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** GGLAssembler changes 129658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 130d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** - Since ArmToArm64Assembler can generate 4 Arm64 instructions for 131658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** each call in worst case, the memory required is set to 4 times 132658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ARM memory 133658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 134658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Address load/store/manipulation were changed to use new functions 135658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** added in the ARMAssemblerInterface. 136658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 137658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat*/ 138658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 139658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 140658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#define NOT_IMPLEMENTED() LOG_FATAL("Arm instruction %s not yet implemented\n", __func__) 141658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 142d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#define ARM64_ASM_DEBUG 0 143658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 144d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#if ARM64_ASM_DEBUG 145658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat #define LOG_INSTR(...) ALOGD("\t" __VA_ARGS__) 146658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat #define LOG_LABEL(...) ALOGD(__VA_ARGS__) 147658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#else 148658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat #define LOG_INSTR(...) ((void)0) 149658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat #define LOG_LABEL(...) ((void)0) 150658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#endif 151658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 152658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatnamespace android { 153658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 154658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatstatic const char* shift_codes[] = 155658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 156658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "LSL", "LSR", "ASR", "ROR" 157658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; 158658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatstatic const char *cc_codes[] = 159658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 160658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "EQ", "NE", "CS", "CC", "MI", 161658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "PL", "VS", "VC", "HI", "LS", 162658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "GE", "LT", "GT", "LE", "AL", "NV" 163658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; 164658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 165d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin CrossArmToArm64Assembler::ArmToArm64Assembler(const sp<Assembly>& assembly) 166658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat : ARMAssemblerInterface(), 167658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAssembly(assembly) 168658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 169658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mBase = mPC = (uint32_t *)assembly->base(); 170658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mDuration = ggl_system_time(); 171658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mZeroReg = 13; 172658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg1 = 15; 173658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg2 = 16; 174658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg3 = 17; 175658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 176658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 177d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin CrossArmToArm64Assembler::ArmToArm64Assembler(void *base) 178658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat : ARMAssemblerInterface(), mAssembly(NULL) 179658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 180658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mBase = mPC = (uint32_t *)base; 181658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mDuration = ggl_system_time(); 182658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat // Regs 13, 15, 16, 17 are used as temporary registers 183658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mZeroReg = 13; 184658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg1 = 15; 185658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg2 = 16; 186658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg3 = 17; 187658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 188658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 189d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin CrossArmToArm64Assembler::~ArmToArm64Assembler() 190658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 191658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 192658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 193d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t* ArmToArm64Assembler::pc() const 194658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 195658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return mPC; 196658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 197658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 198d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t* ArmToArm64Assembler::base() const 199658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 200658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return mBase; 201658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 202658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 203d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::reset() 204658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 205658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(mAssembly == NULL) 206658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mPC = mBase; 207658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 208658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mBase = mPC = (uint32_t *)mAssembly->base(); 209658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mBranchTargets.clear(); 210658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mLabels.clear(); 211658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mLabelsInverseMapping.clear(); 212658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mComments.clear(); 213d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#if ARM64_ASM_DEBUG 214658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ALOGI("RESET\n"); 215658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#endif 216658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 217658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 218d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossint ArmToArm64Assembler::getCodegenArch() 219658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 220d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross return CODEGEN_ARCH_ARM64; 221658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 222658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 223658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 224658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 225d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::disassemble(const char* name) 226658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 227658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(name) 228658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 229658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf("%s:\n", name); 230658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 231658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat size_t count = pc()-base(); 232658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t* i = base(); 233658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat while (count--) 234658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 235658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ssize_t label = mLabelsInverseMapping.indexOfKey(i); 236658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (label >= 0) 237658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 238658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf("%s:\n", mLabelsInverseMapping.valueAt(label)); 239658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 240658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ssize_t comment = mComments.indexOfKey(i); 241658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (comment >= 0) 242658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 243658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf("; %s\n", mComments.valueAt(comment)); 244658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 245658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf("%p: %08x ", i, uint32_t(i[0])); 246658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 247658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat char instr[256]; 248d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross ::arm64_disassemble(*i, instr); 249658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf("%s\n", instr); 250658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 251658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat i++; 252658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 253658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 254658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 255d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::comment(const char* string) 256658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 257658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mComments.add(mPC, string); 258658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("//%s\n", string); 259658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 260658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 261d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::label(const char* theLabel) 262658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 263658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mLabels.add(theLabel, mPC); 264658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mLabelsInverseMapping.add(mPC, theLabel); 265658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_LABEL("%s:\n", theLabel); 266658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 267658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 268d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::B(int cc, const char* label) 269658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 270658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mBranchTargets.add(branch_target_t(label, mPC)); 271658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("B%s %s\n", cc_codes[cc], label ); 272658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = (0x54 << 24) | cc; 273658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 274658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 2753078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::BL(int /*cc*/, const char* /*label*/) 276658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 277658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not Required 278658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 279658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 280658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 281658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat//Prolog/Epilog & Generate... 282658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 283658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 284d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::prolog() 285658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 286658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat // write prolog code 287658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mPrologPC = mPC; 288658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVZ_X(mZeroReg,0,0); 289658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 290658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 2913078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::epilog(uint32_t /*touched*/) 292658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 293658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat // write epilog code 294658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat static const int XLR = 30; 295658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_RET(XLR); 296658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 297658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 298d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossint ArmToArm64Assembler::generate(const char* name) 299658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 300658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat // fixup all the branches 301658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat size_t count = mBranchTargets.size(); 302658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat while (count--) 303658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 304658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const branch_target_t& bt = mBranchTargets[count]; 305658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t* target_pc = mLabels.valueFor(bt.label); 306658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_ALWAYS_FATAL_IF(!target_pc, 307658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "error resolving branch targets, target_pc is null"); 308658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int32_t offset = int32_t(target_pc - bt.pc); 309658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *bt.pc |= (offset & 0x7FFFF) << 5; 310658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 311658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 312658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(mAssembly != NULL) 313658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAssembly->resize( int(pc()-base())*4 ); 314658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 315658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat // the instruction cache is flushed by CodeCache 316658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const int64_t duration = ggl_system_time() - mDuration; 317658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const char * const format = "generated %s (%d ins) at [%p:%p] in %ld ns\n"; 318658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ALOGI(format, name, int(pc()-base()), base(), pc(), duration); 319658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 320658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 321658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat char value[PROPERTY_VALUE_MAX]; 322658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat property_get("debug.pf.disasm", value, "0"); 323658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (atoi(value) != 0) 324658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 325658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf(format, name, int(pc()-base()), base(), pc(), duration); 326658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat disassemble(name); 327658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 328658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return NO_ERROR; 329658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 330658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 331d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t* ArmToArm64Assembler::pcForLabel(const char* label) 332658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 333658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return mLabels.valueFor(label); 334658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 335658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 336658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 337658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Data Processing... 338658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 339d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::dataProcessingCommon(int opcode, 340658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int s, int Rd, int Rn, uint32_t Op2) 341658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 342658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(opcode != opSUB && s == 1) 343658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 344658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 345658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 346658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 347658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 348658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(opcode != opSUB && opcode != opADD && opcode != opAND && 349658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat opcode != opORR && opcode != opMVN) 350658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 351658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 352658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 353658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 354658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 355658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Op2 == OPERAND_REG_IMM && mAddrMode.reg_imm_shift > 31) 356658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 357658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 358658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 359658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 360658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 361658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat //Store immediate in temporary register and convert 362658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat //immediate operation into register operation 363658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Op2 == OPERAND_IMM) 364658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 365658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int imm = mAddrMode.immediate; 366658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVZ_W(mTmpReg2, imm & 0x0000FFFF, 0); 367658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVK_W(mTmpReg2, (imm >> 16) & 0x0000FFFF, 16); 368658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Op2 = mTmpReg2; 369658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 370658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 371658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 372658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 373658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t shift; 374658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount; 375658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm; 376658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 377658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Op2 == OPERAND_REG_IMM) 378658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 379658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat shift = mAddrMode.reg_imm_type; 380658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat amount = mAddrMode.reg_imm_shift; 381658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rm = mAddrMode.reg_imm_Rm; 382658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 383658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(Op2 < OPERAND_REG) 384658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 385658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat shift = 0; 386658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat amount = 0; 387658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rm = Op2; 388658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 389658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 390658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 391658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 392658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 393658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 394658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 395658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat switch(opcode) 396658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 397658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat case opADD: *mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break; 398658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat case opAND: *mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break; 399658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat case opORR: *mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break; 400658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat case opMVN: *mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break; 401658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break; 402658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat }; 403658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 404658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 405658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 406658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 407d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::dataProcessing(int opcode, int cc, 408658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int s, int Rd, int Rn, uint32_t Op2) 409658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 410658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Wd; 411658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 412658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL) 413658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Wd = mTmpReg1; 414658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 415658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Wd = Rd; 416658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 417658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(opcode == opADD || opcode == opAND || opcode == opORR ||opcode == opSUB) 418658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 419658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opcode, s, Wd, Rn, Op2); 420658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 421658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(opcode == opCMP) 422658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 423658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opSUB, 1, mTmpReg3, Rn, Op2); 424658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 425658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(opcode == opRSB) 426658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 427658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opSUB, s, Wd, Rn, Op2); 428658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opSUB, s, Wd, mZeroReg, Wd); 429658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 430658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(opcode == opMOV) 431658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 432658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opORR, 0, Wd, mZeroReg, Op2); 433658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(s == 1) 434658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 435658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opSUB, 1, mTmpReg3, Wd, mZeroReg); 436658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 437658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 438658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(opcode == opMVN) 439658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 440658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opMVN, s, Wd, mZeroReg, Op2); 441658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 442658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(opcode == opBIC) 443658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 444658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opMVN, s, mTmpReg3, mZeroReg, Op2); 445658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opAND, s, Wd, Rn, mTmpReg3); 446658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 447658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 448658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 449658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 450658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 451658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 452658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 453658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL) 454658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 455658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_CSEL_W(Rd, mTmpReg1, Rd, cc); 456658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 457658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 458658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 459658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Address Processing... 460658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 461658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 462d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::ADDR_ADD(int cc, 463658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int s, int Rd, int Rn, uint32_t Op2) 464658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 465658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 466658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(s != 0) { NOT_IMPLEMENTED(); return;} //Not required 467658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 468658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 469658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Op2 == OPERAND_REG_IMM && mAddrMode.reg_imm_type == LSL) 470658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 471658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rm = mAddrMode.reg_imm_Rm; 472658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int amount = mAddrMode.reg_imm_shift; 473658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); 474658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 475658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(Op2 < OPERAND_REG) 476658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 477658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rm = Op2; 478658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int amount = 0; 479658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); 480658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 481658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(Op2 == OPERAND_IMM) 482658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 483658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int imm = mAddrMode.immediate; 484658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVZ_W(mTmpReg1, imm & 0x0000FFFF, 0); 485658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVK_W(mTmpReg1, (imm >> 16) & 0x0000FFFF, 16); 486658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 487658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rm = mTmpReg1; 488658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int amount = 0; 489658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); 490658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 491658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 492658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 493658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 494658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 495658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 496658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 497d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::ADDR_SUB(int cc, 498658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int s, int Rd, int Rn, uint32_t Op2) 499658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 500658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 501658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(s != 0) { NOT_IMPLEMENTED(); return;} //Not required 502658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 503658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Op2 == OPERAND_REG_IMM && mAddrMode.reg_imm_type == LSR) 504658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 505658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_W(mTmpReg1, mZeroReg, mAddrMode.reg_imm_Rm, 506658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LSR, mAddrMode.reg_imm_shift); 507658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SUB_X_Wm_SXTW(Rd, Rn, mTmpReg1, 0); 508658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 509658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 510658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 511658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 512658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 513658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 514658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 515658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 516658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// multiply... 517658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 518d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::MLA(int cc, int s,int Rd, int Rm, int Rs, int Rn) 519658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 520658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 521658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 522658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MADD_W(Rd, Rm, Rs, Rn); 523658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(s == 1) 524658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opSUB, 1, mTmpReg1, Rd, mZeroReg); 525658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 526d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::MUL(int cc, int s, int Rd, int Rm, int Rs) 527658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 528658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 529658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(s != 0) { NOT_IMPLEMENTED(); return;} //Not required 530658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MADD_W(Rd, Rm, Rs, mZeroReg); 531658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 5323078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::UMULL(int /*cc*/, int /*s*/, 5333078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhat int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/) 534658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 535658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 536658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 5373078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::UMUAL(int /*cc*/, int /*s*/, 5383078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhat int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/) 539658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 540658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 541658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 5423078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::SMULL(int /*cc*/, int /*s*/, 5433078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhat int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/) 544658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 545658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 546658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 5473078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::SMUAL(int /*cc*/, int /*s*/, 5483078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhat int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/) 549658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 550658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 551658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 552658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 553658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 554658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// branches relative to PC... 555658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 5563078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::B(int /*cc*/, uint32_t* /*pc*/){ 557658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 558658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 559658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 5603078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::BL(int /*cc*/, uint32_t* /*pc*/){ 561658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 562658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 563658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 5643078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::BX(int /*cc*/, int /*Rn*/){ 565658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 566658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 567658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 568658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 569658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// data transfer... 570658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 571658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatenum dataTransferOp 572658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 573658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat opLDR,opLDRB,opLDRH,opSTR,opSTRB,opSTRH 574658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; 575658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 576d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::dataTransfer(int op, int cc, 577658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rd, int Rn, uint32_t op_type, uint32_t size) 578658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 579658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const int XSP = 31; 580658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Rn == SP) 581658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rn = XSP; 582658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 583658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(op_type == OPERAND_IMM) 584658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 585658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int addrReg; 586658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int imm = mAddrMode.immediate; 587658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(imm >= 0 && imm < (1<<12)) 588658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_IMM_X(mTmpReg1, mZeroReg, imm, 0); 589658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(imm < 0 && -imm < (1<<12)) 590658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SUB_IMM_X(mTmpReg1, mZeroReg, -imm, 0); 591658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 592658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 593658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 594658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 595658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 596658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 597658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat addrReg = Rn; 598658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(mAddrMode.preindex == true || mAddrMode.postindex == true) 599658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 600658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_X(mTmpReg2, addrReg, mTmpReg1); 601658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(mAddrMode.preindex == true) 602658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat addrReg = mTmpReg2; 603658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 604658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 605658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL) 606658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_B_COND(cc^1, 8); 607658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 608658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_LDRSTR_Wm_SXTW_0(op, size, Rd, addrReg, mZeroReg); 609658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 610658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(mAddrMode.writeback == true) 611658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_CSEL_X(Rn, mTmpReg2, Rn, cc); 612658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 613658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(op_type == OPERAND_REG_OFFSET) 614658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 615658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL) 616658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_B_COND(cc^1, 8); 617658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_LDRSTR_Wm_SXTW_0(op, size, Rd, Rn, mAddrMode.reg_offset); 618658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 619658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 620658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(op_type > OPERAND_UNSUPPORTED) 621658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 622658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL) 623658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_B_COND(cc^1, 8); 624658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_LDRSTR_Wm_SXTW_0(op, size, Rd, Rn, mZeroReg); 625658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 626658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 627658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 628658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); // Not required 629658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 630658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 631658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 632658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 633d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::ADDR_LDR(int cc, int Rd, int Rn, uint32_t op_type) 634658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 635658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opLDR, cc, Rd, Rn, op_type, 64); 636658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 637d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::ADDR_STR(int cc, int Rd, int Rn, uint32_t op_type) 638658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 639658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opSTR, cc, Rd, Rn, op_type, 64); 640658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 641d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::LDR(int cc, int Rd, int Rn, uint32_t op_type) 642658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 643658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opLDR, cc, Rd, Rn, op_type); 644658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 645d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::LDRB(int cc, int Rd, int Rn, uint32_t op_type) 646658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 647658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opLDRB, cc, Rd, Rn, op_type); 648658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 649d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::STR(int cc, int Rd, int Rn, uint32_t op_type) 650658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 651658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opSTR, cc, Rd, Rn, op_type); 652658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 653658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 654d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::STRB(int cc, int Rd, int Rn, uint32_t op_type) 655658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 656658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opSTRB, cc, Rd, Rn, op_type); 657658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 658658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 659d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::LDRH(int cc, int Rd, int Rn, uint32_t op_type) 660658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 661658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opLDRH, cc, Rd, Rn, op_type); 662658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 6633078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::LDRSB(int /*cc*/, int /*Rd*/, int /*Rn*/, uint32_t /*offset*/) 664658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 665658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 666658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 6673078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::LDRSH(int /*cc*/, int /*Rd*/, int /*Rn*/, uint32_t /*offset*/) 668658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 669658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 670658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 671658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 672d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::STRH(int cc, int Rd, int Rn, uint32_t op_type) 673658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 674658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opSTRH, cc, Rd, Rn, op_type); 675658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 676658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 677658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 678658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// block data transfer... 679658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 680d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::LDM(int cc, int dir, 681658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rn, int W, uint32_t reg_list) 682658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 683658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const int XSP = 31; 684658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL || dir != IA || W == 0 || Rn != SP) 685658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 686658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 687658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 688658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 689658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 690658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat for(int i = 0; i < 32; ++i) 691658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 692658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if((reg_list & (1 << i))) 693658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 694658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int reg = i; 695658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int size = 16; 696658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_LDR_IMM_PostIndex(reg, XSP, size); 697658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 698658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 699658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 700658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 701d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::STM(int cc, int dir, 702658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rn, int W, uint32_t reg_list) 703658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 704658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const int XSP = 31; 705658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL || dir != DB || W == 0 || Rn != SP) 706658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 707658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 708658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 709658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 710658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 711658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat for(int i = 31; i >= 0; --i) 712658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 713658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if((reg_list & (1 << i))) 714658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 715658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int size = -16; 716658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int reg = i; 717658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_STR_IMM_PreIndex(reg, XSP, size); 718658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 719658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 720658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 721658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 722658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 723658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// special... 724658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 7253078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::SWP(int /*cc*/, int /*Rn*/, int /*Rd*/, int /*Rm*/) 726658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 727658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 728658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 7293078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::SWPB(int /*cc*/, int /*Rn*/, int /*Rd*/, int /*Rm*/) 730658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 731658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 732658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 7333078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::SWI(int /*cc*/, uint32_t /*comment*/) 734658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 735658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 736658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 737658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 738658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 739658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// DSP instructions... 740658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 7413078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::PLD(int /*Rn*/, uint32_t /*offset*/) { 742658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 743658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 744658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 7453078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::CLZ(int /*cc*/, int /*Rd*/, int /*Rm*/) 746658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 747658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 748658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 749658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 7503078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::QADD(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/) 751658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 752658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 753658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 754658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 7553078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::QDADD(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/) 756658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 757658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 758658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 759658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 7603078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::QSUB(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/) 761658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 762658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 763658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 764658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 7653078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::QDSUB(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/) 766658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 767658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 768658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 769658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 770658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 771658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// 16 x 16 multiplication 772658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 773d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SMUL(int cc, int xy, 774658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rd, int Rm, int Rs) 775658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 776658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 777658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 778658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (xy & xyTB) 779658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg1, Rm, 16, 31); 780658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 781658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg1, Rm, 0, 15); 782658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 783658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (xy & xyBT) 784658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg2, Rs, 16, 31); 785658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 786658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg2, Rs, 0, 15); 787658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 788658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MADD_W(Rd,mTmpReg1,mTmpReg2, mZeroReg); 789658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 790658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 791658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// 32 x 16 multiplication 792658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 793d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SMULW(int cc, int y, int Rd, int Rm, int Rs) 794658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 795658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 796658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 797658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (y & yT) 798658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg1, Rs, 16, 31); 799658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 800658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg1, Rs, 0, 15); 801658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 802658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg2, Rm, 0, 31); 803658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SMADDL(mTmpReg3,mTmpReg1,mTmpReg2, mZeroReg); 804658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_UBFM_X(Rd,mTmpReg3, 16, 47); 805658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 806658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 807658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// 16 x 16 multiplication and accumulate 808658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 809d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) 810658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 811658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 812658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(xy != xyBB) { NOT_IMPLEMENTED(); return;} //Not required 813658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 814658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg1, Rm, 0, 15); 815658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg2, Rs, 0, 15); 816658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MADD_W(Rd, mTmpReg1, mTmpReg2, Rn); 817658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 818658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 8193078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::SMLAL(int /*cc*/, int /*xy*/, 8203078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhat int /*RdHi*/, int /*RdLo*/, int /*Rs*/, int /*Rm*/) 821658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 822658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 823658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 824658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 825658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 8263078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatvoid ArmToArm64Assembler::SMLAW(int /*cc*/, int /*y*/, 8273078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhat int /*Rd*/, int /*Rm*/, int /*Rs*/, int /*Rn*/) 828658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 829658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 830658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 831658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 832658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 833658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 834658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Byte/half word extract and extend 835658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 836d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::UXTB16(int cc, int Rd, int Rm, int rotate) 837658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 838658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 839658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 840658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_EXTR_W(mTmpReg1, Rm, Rm, rotate * 8); 841658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 842658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t imm = 0x00FF00FF; 843658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVZ_W(mTmpReg2, imm & 0xFFFF, 0); 844658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVK_W(mTmpReg2, (imm >> 16) & 0x0000FFFF, 16); 845658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_AND_W(Rd,mTmpReg1, mTmpReg2); 846658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 847658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 848658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 849658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Bit manipulation 850658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 851d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::UBFX(int cc, int Rd, int Rn, int lsb, int width) 852658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 853658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 854658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_UBFM_W(Rd, Rn, lsb, lsb + width - 1); 855658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 856658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 857658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Shifters... 858658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 859d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossint ArmToArm64Assembler::buildImmediate( 860658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t immediate, uint32_t& rot, uint32_t& imm) 861658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 862658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat rot = 0; 863658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat imm = immediate; 864658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return 0; // Always true 865658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 866658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 867658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 868d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossbool ArmToArm64Assembler::isValidImmediate(uint32_t immediate) 869658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 870658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t rot, imm; 871658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return buildImmediate(immediate, rot, imm) == 0; 872658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 873658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 874d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::imm(uint32_t immediate) 875658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 876658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.immediate = immediate; 877658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.writeback = false; 878658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.preindex = false; 879658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.postindex = false; 880658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_IMM; 881658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 882658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 883658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 884d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::reg_imm(int Rm, int type, uint32_t shift) 885658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 886658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.reg_imm_Rm = Rm; 887658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.reg_imm_type = type; 888658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.reg_imm_shift = shift; 889658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_REG_IMM; 890658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 891658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 8923078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatuint32_t ArmToArm64Assembler::reg_rrx(int /*Rm*/) 893658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 894658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 895658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 896658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 897658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 8983078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatuint32_t ArmToArm64Assembler::reg_reg(int /*Rm*/, int /*type*/, int /*Rs*/) 899658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 900658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 901658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 902658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 903658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 904658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Addressing modes... 905658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 906d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::immed12_pre(int32_t immed12, int W) 907658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 908658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.immediate = immed12; 909658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.writeback = W; 910658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.preindex = true; 911658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.postindex = false; 912658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_IMM; 913658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 914658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 915d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::immed12_post(int32_t immed12) 916658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 917658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.immediate = immed12; 918658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.writeback = true; 919658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.preindex = false; 920658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.postindex = true; 921658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_IMM; 922658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 923658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 924d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::reg_scale_pre(int Rm, int type, 925658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t shift, int W) 926658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 927658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(type != 0 || shift != 0 || W != 0) 928658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 929658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 930658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 931658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 932658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 933658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 934658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.reg_offset = Rm; 935658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_REG_OFFSET; 936658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 937658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 938658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 9393078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatuint32_t ArmToArm64Assembler::reg_scale_post(int /*Rm*/, int /*type*/, uint32_t /*shift*/) 940658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 941658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 942658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 943658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 944658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 945d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::immed8_pre(int32_t immed8, int W) 946658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 947658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.immediate = immed8; 948658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.writeback = W; 949658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.preindex = true; 950658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.postindex = false; 951658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_IMM; 952658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 953658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 954d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::immed8_post(int32_t immed8) 955658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 956658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.immediate = immed8; 957658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.writeback = true; 958658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.preindex = false; 959658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.postindex = true; 960658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_IMM; 961658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 962658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 963d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::reg_pre(int Rm, int W) 964658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 965658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(W != 0) 966658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 967658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 968658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 969658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 970658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 971658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 972658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.reg_offset = Rm; 973658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_REG_OFFSET; 974658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 975658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 976658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 9773078b13b98ad8d29dcb2b7e3665c0c92944404a9Ashok Bhatuint32_t ArmToArm64Assembler::reg_post(int /*Rm*/) 978658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 979658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 980658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 981658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 982658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 983658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 984658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// A64 instructions 985658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 986658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 987658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatstatic const char * dataTransferOpName[] = 988658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 989658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "LDR","LDRB","LDRH","STR","STRB","STRH" 990658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; 991658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 992658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatstatic const uint32_t dataTransferOpCode [] = 993658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 994658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0xB8u << 24) | (0x3 << 21) | (0x6 << 13) | (0x0 << 12) |(0x1 << 11)), 995658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0x38u << 24) | (0x3 << 21) | (0x6 << 13) | (0x1 << 12) |(0x1 << 11)), 996658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0x78u << 24) | (0x3 << 21) | (0x6 << 13) | (0x0 << 12) |(0x1 << 11)), 997658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0xB8u << 24) | (0x1 << 21) | (0x6 << 13) | (0x0 << 12) |(0x1 << 11)), 998658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0x38u << 24) | (0x1 << 21) | (0x6 << 13) | (0x1 << 12) |(0x1 << 11)), 999658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0x78u << 24) | (0x1 << 21) | (0x6 << 13) | (0x0 << 12) |(0x1 << 11)) 1000658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; 1001d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_LDRSTR_Wm_SXTW_0(uint32_t op, 1002658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t size, uint32_t Rt, 1003658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rn, uint32_t Rm) 1004658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1005658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(size == 32) 1006658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 1007658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("%s W%d, [X%d, W%d, SXTW #0]\n", 1008658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataTransferOpName[op], Rt, Rn, Rm); 1009658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return(dataTransferOpCode[op] | (Rm << 16) | (Rn << 5) | Rt); 1010658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 1011658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 1012658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 1013658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("%s X%d, [X%d, W%d, SXTW #0]\n", 1014658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataTransferOpName[op], Rt, Rn, Rm); 1015658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return(dataTransferOpCode[op] | (0x1<<30) | (Rm<<16) | (Rn<<5)|Rt); 1016658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 1017658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1018658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1019d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_STR_IMM_PreIndex(uint32_t Rt, 1020658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rn, int32_t simm) 1021658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1022658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Rn == 31) 1023658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("STR W%d, [SP, #%d]!\n", Rt, simm); 1024658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 1025658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("STR W%d, [X%d, #%d]!\n", Rt, Rn, simm); 1026658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1027658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t imm9 = (unsigned)(simm) & 0x01FF; 1028658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0xB8 << 24) | (imm9 << 12) | (0x3 << 10) | (Rn << 5) | Rt; 1029658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1030658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1031d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_LDR_IMM_PostIndex(uint32_t Rt, 1032658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rn, int32_t simm) 1033658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1034658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Rn == 31) 1035658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("LDR W%d, [SP], #%d\n",Rt,simm); 1036658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 1037658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("LDR W%d, [X%d], #%d\n",Rt, Rn, simm); 1038658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1039658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t imm9 = (unsigned)(simm) & 0x01FF; 1040658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0xB8 << 24) | (0x1 << 22) | 1041658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (imm9 << 12) | (0x1 << 10) | (Rn << 5) | Rt; 1042658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1043658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1044d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ADD_X_Wm_SXTW(uint32_t Rd, 1045658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rn, 1046658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, 1047658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1048658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1049658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ADD X%d, X%d, W%d, SXTW #%d\n", Rd, Rn, Rm, amount); 1050658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x8B << 24) | (0x1 << 21) |(Rm << 16) | 1051658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (0x6 << 13) | (amount << 10) | (Rn << 5) | Rd); 1052658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1053658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1054658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1055d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_SUB_X_Wm_SXTW(uint32_t Rd, 1056658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rn, 1057658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, 1058658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1059658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1060658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SUB X%d, X%d, W%d, SXTW #%d\n", Rd, Rn, Rm, amount); 1061658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0xCB << 24) | (0x1 << 21) |(Rm << 16) | 1062658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (0x6 << 13) | (amount << 10) | (Rn << 5) | Rd); 1063658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1064658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1065658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1066d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_B_COND(uint32_t cc, uint32_t offset) 1067658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1068658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("B.%s #.+%d\n", cc_codes[cc], offset); 1069658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0x54 << 24) | ((offset/4) << 5) | (cc); 1070658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1071658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1072d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ADD_X(uint32_t Rd, uint32_t Rn, 1073658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1074658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1075658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1076658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ADD X%d, X%d, X%d, %s #%d\n", 1077658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1078658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x8B << 24) | (shift << 22) | ( Rm << 16) | 1079658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1080658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1081d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ADD_IMM_X(uint32_t Rd, uint32_t Rn, 1082658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t imm, uint32_t shift) 1083658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1084658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ADD X%d, X%d, #%d, LSL #%d\n", Rd, Rn, imm, shift); 1085658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0x91 << 24) | ((shift/12) << 22) | (imm << 10) | (Rn << 5) | Rd; 1086658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1087658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1088d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_SUB_IMM_X(uint32_t Rd, uint32_t Rn, 1089658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t imm, uint32_t shift) 1090658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1091658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SUB X%d, X%d, #%d, LSL #%d\n", Rd, Rn, imm, shift); 1092658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0xD1 << 24) | ((shift/12) << 22) | (imm << 10) | (Rn << 5) | Rd; 1093658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1094658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1095d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ADD_W(uint32_t Rd, uint32_t Rn, 1096658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1097658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1098658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1099658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ADD W%d, W%d, W%d, %s #%d\n", 1100658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1101658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x0B << 24) | (shift << 22) | ( Rm << 16) | 1102658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1103658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1104658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1105d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_SUB_W(uint32_t Rd, uint32_t Rn, 1106658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1107658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount, 1108658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t setflag) 1109658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1110658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(setflag == 0) 1111658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 1112658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SUB W%d, W%d, W%d, %s #%d\n", 1113658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1114658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x4B << 24) | (shift << 22) | ( Rm << 16) | 1115658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1116658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 1117658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 1118658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 1119658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SUBS W%d, W%d, W%d, %s #%d\n", 1120658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1121658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x6B << 24) | (shift << 22) | ( Rm << 16) | 1122658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1123658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 1124658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1125658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1126d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_AND_W(uint32_t Rd, uint32_t Rn, 1127658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1128658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1129658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1130658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("AND W%d, W%d, W%d, %s #%d\n", 1131658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1132658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x0A << 24) | (shift << 22) | ( Rm << 16) | 1133658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1134658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1135658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1136d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ORR_W(uint32_t Rd, uint32_t Rn, 1137658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1138658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1139658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1140658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ORR W%d, W%d, W%d, %s #%d\n", 1141658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1142658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x2A << 24) | (shift << 22) | ( Rm << 16) | 1143658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1144658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1145658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1146d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ORN_W(uint32_t Rd, uint32_t Rn, 1147658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1148658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1149658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1150658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ORN W%d, W%d, W%d, %s #%d\n", 1151658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1152658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x2A << 24) | (shift << 22) | (0x1 << 21) | ( Rm << 16) | 1153658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1154658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1155658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1156d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_CSEL_X(uint32_t Rd, uint32_t Rn, 1157658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t cond) 1158658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1159658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("CSEL X%d, X%d, X%d, %s\n", Rd, Rn, Rm, cc_codes[cond]); 1160658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x9A << 24)|(0x1 << 23)|(Rm << 16) |(cond << 12)| (Rn << 5) | Rd); 1161658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1162658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1163d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_CSEL_W(uint32_t Rd, uint32_t Rn, 1164658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t cond) 1165658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1166658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("CSEL W%d, W%d, W%d, %s\n", Rd, Rn, Rm, cc_codes[cond]); 1167658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x1A << 24)|(0x1 << 23)|(Rm << 16) |(cond << 12)| (Rn << 5) | Rd); 1168658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1169658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1170d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_RET(uint32_t Rn) 1171658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1172658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("RET X%d\n", Rn); 1173658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0xD6 << 24) | (0x1 << 22) | (0x1F << 16) | (Rn << 5)); 1174658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1175658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1176d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_MOVZ_X(uint32_t Rd, uint32_t imm, 1177658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t shift) 1178658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1179658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("MOVZ X%d, #0x%x, LSL #%d\n", Rd, imm, shift); 1180658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return(0xD2 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd; 1181658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1182658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1183d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_MOVK_W(uint32_t Rd, uint32_t imm, 1184658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t shift) 1185658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1186658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("MOVK W%d, #0x%x, LSL #%d\n", Rd, imm, shift); 1187658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0x72 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd; 1188658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1189658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1190d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_MOVZ_W(uint32_t Rd, uint32_t imm, 1191658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t shift) 1192658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1193658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("MOVZ W%d, #0x%x, LSL #%d\n", Rd, imm, shift); 1194658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return(0x52 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd; 1195658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1196658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1197d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_SMADDL(uint32_t Rd, uint32_t Rn, 1198658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t Ra) 1199658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1200658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SMADDL X%d, W%d, W%d, X%d\n",Rd, Rn, Rm, Ra); 1201658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x9B << 24) | (0x1 << 21) | (Rm << 16)|(Ra << 10)|(Rn << 5) | Rd); 1202658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1203658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1204d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_MADD_W(uint32_t Rd, uint32_t Rn, 1205658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t Ra) 1206658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1207658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("MADD W%d, W%d, W%d, W%d\n",Rd, Rn, Rm, Ra); 1208658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x1B << 24) | (Rm << 16) | (Ra << 10) |(Rn << 5) | Rd); 1209658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1210658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1211d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_SBFM_W(uint32_t Rd, uint32_t Rn, 1212658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t immr, uint32_t imms) 1213658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1214658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SBFM W%d, W%d, #%d, #%d\n", Rd, Rn, immr, imms); 1215658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x13 << 24) | (immr << 16) | (imms << 10) | (Rn << 5) | Rd); 1216658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1217658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1218d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_UBFM_W(uint32_t Rd, uint32_t Rn, 1219658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t immr, uint32_t imms) 1220658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1221658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("UBFM W%d, W%d, #%d, #%d\n", Rd, Rn, immr, imms); 1222658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x53 << 24) | (immr << 16) | (imms << 10) | (Rn << 5) | Rd); 1223658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1224658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1225d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_UBFM_X(uint32_t Rd, uint32_t Rn, 1226658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t immr, uint32_t imms) 1227658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1228658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("UBFM X%d, X%d, #%d, #%d\n", Rd, Rn, immr, imms); 1229658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0xD3 << 24) | (0x1 << 22) | 1230658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (immr << 16) | (imms << 10) | (Rn << 5) | Rd); 1231658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1232658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1233d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_EXTR_W(uint32_t Rd, uint32_t Rn, 1234658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t lsb) 1235658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1236658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("EXTR W%d, W%d, W%d, #%d\n", Rd, Rn, Rm, lsb); 1237658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0x13 << 24)|(0x1 << 23) | (Rm << 16) | (lsb << 10)|(Rn << 5) | Rd; 1238658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1239658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1240658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; // namespace android 1241658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1242