Arm64Assembler.cpp revision d4146e6091d6ed947ce9edd0f8ef3e5fe066d716
1658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat/* 2658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * Copyright (C) 2013 The Android Open Source Project 3658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * All rights reserved. 4658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * 5658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * Redistribution and use in source and binary forms, with or without 6658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * modification, are permitted provided that the following conditions 7658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * are met: 8658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * * Redistributions of source code must retain the above copyright 9658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * notice, this list of conditions and the following disclaimer. 10658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * * Redistributions in binary form must reproduce the above copyright 11658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * notice, this list of conditions and the following disclaimer in 12658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * the documentation and/or other materials provided with the 13658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * distribution. 14658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * 15658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat * SUCH DAMAGE. 27658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat */ 28658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 29d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#define LOG_TAG "ArmToArm64Assembler" 30658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 31658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include <stdio.h> 32658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include <stdlib.h> 33658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include <string.h> 34658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 35658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include <cutils/log.h> 36658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include <cutils/properties.h> 37658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include <private/pixelflinger/ggl_context.h> 38658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 39d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#include "codeflinger/Arm64Assembler.h" 40658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#include "codeflinger/CodeCache.h" 41d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#include "codeflinger/Arm64Disassembler.h" 42658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 43658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 44658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat/* 45658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** -------------------------------------------- 46d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** Support for Arm64 in GGLAssembler JIT 47658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** -------------------------------------------- 48658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 49658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** Approach 50658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - GGLAssembler and associated files are largely un-changed. 51658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - A translator class maps ArmAssemblerInterface calls to 52d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** generate Arm64 instructions. 53658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 54658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 55d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** ArmToArm64Assembler 56658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 57658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 58658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Subclassed from ArmAssemblerInterface 59658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 60658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Translates each ArmAssemblerInterface call to generate 61d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** one or more Arm64 instructions as necessary. 62658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 63658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Does not implement ArmAssemblerInterface portions unused by GGLAssembler 64658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** It calls NOT_IMPLEMENTED() for such cases, which in turn logs 65658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** a fatal message. 66658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 67658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Uses A64_.. series of functions to generate instruction machine code 68d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** for Arm64 instructions. These functions also log the instruction 69d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** to LOG, if ARM64_ASM_DEBUG define is set to 1 70658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 71658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Dumps machine code and eqvt assembly if "debug.pf.disasm" option is set 72d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** It uses arm64_disassemble to perform disassembly 73658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 74658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Uses register 13 (SP in ARM), 15 (PC in ARM), 16, 17 for storing 75658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** intermediate results. GGLAssembler does not use SP and PC as these 76658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** registers are marked as reserved. The temporary registers are not 77d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** saved/restored on stack as these are caller-saved registers in Arm64 78658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 79658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Uses CSEL instruction to support conditional execution. The result is 80658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** stored in a temporary register and then copied to the target register 81658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** if the condition is true. 82658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 83658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - In the case of conditional data transfer instructions, conditional 84658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** branch is used to skip over instruction, if the condition is false 85658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 86658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Wherever possible, immediate values are transferred to temporary 87658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** register prior to processing. This simplifies overall implementation 88658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** as instructions requiring immediate values are converted to 89658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** move immediate instructions followed by register-register instruction. 90658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 91658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** -------------------------------------------- 92d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** ArmToArm64Assembler unit test bench 93658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** -------------------------------------------- 94658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 95d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** - Tests ArmToArm64Assembler interface for all the possible 96658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ways in which GGLAssembler uses ArmAssemblerInterface interface. 97658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 98658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Uses test jacket (written in assembly) to set the registers, 99658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** condition flags prior to calling generated instruction. It also 100658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** copies registers and flags at the end of execution. Caller then 101658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** checks if generated code performed correct operation based on 102658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** output registers and flags. 103658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 104658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Broadly contains three type of tests, (i) data operation tests 105658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** (ii) data transfer tests and (iii) LDM/STM tests. 106658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 107658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 108d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** Arm64 disassembler 109658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 110658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - This disassembler disassembles only those machine codes which can be 111d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** generated by ArmToArm64Assembler. It has a unit testbench which 112658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** tests all the instructions supported by the disassembler. 113658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 114658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ------------------------------------------------------------------ 115658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ARMAssembler/ARMAssemblerInterface/ARMAssemblerProxy changes 116658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ------------------------------------------------------------------ 117658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 118658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - In existing code, addresses were being handled as 32 bit values at 119658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** certain places. 120658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 121658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Added a new set of functions for address load/store/manipulation. 122658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** These are ADDR_LDR, ADDR_STR, ADDR_ADD, ADDR_SUB and they map to 123658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** default 32 bit implementations in ARMAssemblerInterface. 124658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 125d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** - ArmToArm64Assembler maps these functions to appropriate 64 bit 126658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** functions. 127658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 128658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 129658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** GGLAssembler changes 130658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ---------------------- 131d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross** - Since ArmToArm64Assembler can generate 4 Arm64 instructions for 132658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** each call in worst case, the memory required is set to 4 times 133658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** ARM memory 134658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 135658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** - Address load/store/manipulation were changed to use new functions 136658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** added in the ARMAssemblerInterface. 137658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat** 138658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat*/ 139658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 140658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 141658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#define NOT_IMPLEMENTED() LOG_FATAL("Arm instruction %s not yet implemented\n", __func__) 142658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 143d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#define ARM64_ASM_DEBUG 0 144658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 145d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#if ARM64_ASM_DEBUG 146658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat #define LOG_INSTR(...) ALOGD("\t" __VA_ARGS__) 147658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat #define LOG_LABEL(...) ALOGD(__VA_ARGS__) 148658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#else 149658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat #define LOG_INSTR(...) ((void)0) 150658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat #define LOG_LABEL(...) ((void)0) 151658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#endif 152658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 153658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatnamespace android { 154658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 155658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatstatic const char* shift_codes[] = 156658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 157658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "LSL", "LSR", "ASR", "ROR" 158658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; 159658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatstatic const char *cc_codes[] = 160658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 161658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "EQ", "NE", "CS", "CC", "MI", 162658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "PL", "VS", "VC", "HI", "LS", 163658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "GE", "LT", "GT", "LE", "AL", "NV" 164658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; 165658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 166d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin CrossArmToArm64Assembler::ArmToArm64Assembler(const sp<Assembly>& assembly) 167658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat : ARMAssemblerInterface(), 168658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAssembly(assembly) 169658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 170658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mBase = mPC = (uint32_t *)assembly->base(); 171658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mDuration = ggl_system_time(); 172658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mZeroReg = 13; 173658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg1 = 15; 174658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg2 = 16; 175658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg3 = 17; 176658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 177658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 178d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin CrossArmToArm64Assembler::ArmToArm64Assembler(void *base) 179658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat : ARMAssemblerInterface(), mAssembly(NULL) 180658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 181658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mBase = mPC = (uint32_t *)base; 182658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mDuration = ggl_system_time(); 183658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat // Regs 13, 15, 16, 17 are used as temporary registers 184658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mZeroReg = 13; 185658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg1 = 15; 186658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg2 = 16; 187658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mTmpReg3 = 17; 188658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 189658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 190d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin CrossArmToArm64Assembler::~ArmToArm64Assembler() 191658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 192658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 193658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 194d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t* ArmToArm64Assembler::pc() const 195658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 196658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return mPC; 197658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 198658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 199d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t* ArmToArm64Assembler::base() const 200658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 201658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return mBase; 202658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 203658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 204d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::reset() 205658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 206658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(mAssembly == NULL) 207658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mPC = mBase; 208658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 209658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mBase = mPC = (uint32_t *)mAssembly->base(); 210658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mBranchTargets.clear(); 211658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mLabels.clear(); 212658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mLabelsInverseMapping.clear(); 213658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mComments.clear(); 214d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross#if ARM64_ASM_DEBUG 215658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ALOGI("RESET\n"); 216658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat#endif 217658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 218658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 219d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossint ArmToArm64Assembler::getCodegenArch() 220658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 221d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross return CODEGEN_ARCH_ARM64; 222658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 223658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 224658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 225658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 226d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::disassemble(const char* name) 227658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 228658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(name) 229658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 230658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf("%s:\n", name); 231658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 232658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat size_t count = pc()-base(); 233658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t* i = base(); 234658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat while (count--) 235658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 236658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ssize_t label = mLabelsInverseMapping.indexOfKey(i); 237658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (label >= 0) 238658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 239658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf("%s:\n", mLabelsInverseMapping.valueAt(label)); 240658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 241658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ssize_t comment = mComments.indexOfKey(i); 242658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (comment >= 0) 243658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 244658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf("; %s\n", mComments.valueAt(comment)); 245658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 246658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf("%p: %08x ", i, uint32_t(i[0])); 247658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 248658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat char instr[256]; 249d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Cross ::arm64_disassemble(*i, instr); 250658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf("%s\n", instr); 251658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 252658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat i++; 253658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 254658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 255658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 256d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::comment(const char* string) 257658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 258658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mComments.add(mPC, string); 259658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("//%s\n", string); 260658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 261658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 262d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::label(const char* theLabel) 263658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 264658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mLabels.add(theLabel, mPC); 265658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mLabelsInverseMapping.add(mPC, theLabel); 266658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_LABEL("%s:\n", theLabel); 267658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 268658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 269d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::B(int cc, const char* label) 270658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 271658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mBranchTargets.add(branch_target_t(label, mPC)); 272658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("B%s %s\n", cc_codes[cc], label ); 273658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = (0x54 << 24) | cc; 274658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 275658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 276d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::BL(int cc, const char* label) 277658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 278658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not Required 279658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 280658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 281658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 282658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat//Prolog/Epilog & Generate... 283658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 284658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 285d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::prolog() 286658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 287658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat // write prolog code 288658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mPrologPC = mPC; 289658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVZ_X(mZeroReg,0,0); 290658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 291658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 292d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::epilog(uint32_t touched) 293658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 294658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat // write epilog code 295658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat static const int XLR = 30; 296658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_RET(XLR); 297658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 298658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 299d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossint ArmToArm64Assembler::generate(const char* name) 300658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 301658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat // fixup all the branches 302658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat size_t count = mBranchTargets.size(); 303658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat while (count--) 304658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 305658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const branch_target_t& bt = mBranchTargets[count]; 306658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t* target_pc = mLabels.valueFor(bt.label); 307658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_ALWAYS_FATAL_IF(!target_pc, 308658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "error resolving branch targets, target_pc is null"); 309658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int32_t offset = int32_t(target_pc - bt.pc); 310658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *bt.pc |= (offset & 0x7FFFF) << 5; 311658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 312658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 313658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(mAssembly != NULL) 314658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAssembly->resize( int(pc()-base())*4 ); 315658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 316658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat // the instruction cache is flushed by CodeCache 317658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const int64_t duration = ggl_system_time() - mDuration; 318658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const char * const format = "generated %s (%d ins) at [%p:%p] in %ld ns\n"; 319658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ALOGI(format, name, int(pc()-base()), base(), pc(), duration); 320658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 321658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 322658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat char value[PROPERTY_VALUE_MAX]; 323658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat property_get("debug.pf.disasm", value, "0"); 324658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (atoi(value) != 0) 325658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 326658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat printf(format, name, int(pc()-base()), base(), pc(), duration); 327658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat disassemble(name); 328658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 329658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return NO_ERROR; 330658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 331658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 332d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t* ArmToArm64Assembler::pcForLabel(const char* label) 333658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 334658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return mLabels.valueFor(label); 335658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 336658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 337658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 338658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Data Processing... 339658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 340d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::dataProcessingCommon(int opcode, 341658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int s, int Rd, int Rn, uint32_t Op2) 342658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 343658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(opcode != opSUB && s == 1) 344658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 345658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 346658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 347658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 348658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 349658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(opcode != opSUB && opcode != opADD && opcode != opAND && 350658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat opcode != opORR && opcode != opMVN) 351658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 352658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 353658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 354658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 355658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 356658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Op2 == OPERAND_REG_IMM && mAddrMode.reg_imm_shift > 31) 357658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 358658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 359658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 360658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 361658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 362658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat //Store immediate in temporary register and convert 363658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat //immediate operation into register operation 364658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Op2 == OPERAND_IMM) 365658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 366658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int imm = mAddrMode.immediate; 367658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVZ_W(mTmpReg2, imm & 0x0000FFFF, 0); 368658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVK_W(mTmpReg2, (imm >> 16) & 0x0000FFFF, 16); 369658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Op2 = mTmpReg2; 370658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 371658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 372658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 373658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 374658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t shift; 375658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount; 376658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm; 377658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 378658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Op2 == OPERAND_REG_IMM) 379658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 380658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat shift = mAddrMode.reg_imm_type; 381658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat amount = mAddrMode.reg_imm_shift; 382658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rm = mAddrMode.reg_imm_Rm; 383658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 384658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(Op2 < OPERAND_REG) 385658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 386658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat shift = 0; 387658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat amount = 0; 388658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rm = Op2; 389658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 390658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 391658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 392658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 393658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 394658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 395658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 396658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat switch(opcode) 397658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 398658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat case opADD: *mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break; 399658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat case opAND: *mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break; 400658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat case opORR: *mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break; 401658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat case opMVN: *mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break; 402658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break; 403658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat }; 404658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 405658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 406658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 407658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 408d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::dataProcessing(int opcode, int cc, 409658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int s, int Rd, int Rn, uint32_t Op2) 410658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 411658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Wd; 412658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 413658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL) 414658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Wd = mTmpReg1; 415658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 416658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Wd = Rd; 417658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 418658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(opcode == opADD || opcode == opAND || opcode == opORR ||opcode == opSUB) 419658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 420658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opcode, s, Wd, Rn, Op2); 421658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 422658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(opcode == opCMP) 423658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 424658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opSUB, 1, mTmpReg3, Rn, Op2); 425658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 426658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(opcode == opRSB) 427658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 428658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opSUB, s, Wd, Rn, Op2); 429658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opSUB, s, Wd, mZeroReg, Wd); 430658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 431658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(opcode == opMOV) 432658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 433658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opORR, 0, Wd, mZeroReg, Op2); 434658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(s == 1) 435658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 436658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opSUB, 1, mTmpReg3, Wd, mZeroReg); 437658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 438658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 439658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(opcode == opMVN) 440658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 441658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opMVN, s, Wd, mZeroReg, Op2); 442658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 443658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(opcode == opBIC) 444658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 445658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opMVN, s, mTmpReg3, mZeroReg, Op2); 446658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opAND, s, Wd, Rn, mTmpReg3); 447658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 448658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 449658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 450658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 451658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 452658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 453658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 454658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL) 455658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 456658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_CSEL_W(Rd, mTmpReg1, Rd, cc); 457658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 458658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 459658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 460658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Address Processing... 461658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 462658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 463d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::ADDR_ADD(int cc, 464658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int s, int Rd, int Rn, uint32_t Op2) 465658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 466658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 467658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(s != 0) { NOT_IMPLEMENTED(); return;} //Not required 468658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 469658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 470658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Op2 == OPERAND_REG_IMM && mAddrMode.reg_imm_type == LSL) 471658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 472658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rm = mAddrMode.reg_imm_Rm; 473658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int amount = mAddrMode.reg_imm_shift; 474658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); 475658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 476658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(Op2 < OPERAND_REG) 477658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 478658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rm = Op2; 479658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int amount = 0; 480658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); 481658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 482658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(Op2 == OPERAND_IMM) 483658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 484658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int imm = mAddrMode.immediate; 485658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVZ_W(mTmpReg1, imm & 0x0000FFFF, 0); 486658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVK_W(mTmpReg1, (imm >> 16) & 0x0000FFFF, 16); 487658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 488658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rm = mTmpReg1; 489658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int amount = 0; 490658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount); 491658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 492658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 493658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 494658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 495658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 496658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 497658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 498d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::ADDR_SUB(int cc, 499658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int s, int Rd, int Rn, uint32_t Op2) 500658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 501658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 502658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(s != 0) { NOT_IMPLEMENTED(); return;} //Not required 503658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 504658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Op2 == OPERAND_REG_IMM && mAddrMode.reg_imm_type == LSR) 505658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 506658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_W(mTmpReg1, mZeroReg, mAddrMode.reg_imm_Rm, 507658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LSR, mAddrMode.reg_imm_shift); 508658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SUB_X_Wm_SXTW(Rd, Rn, mTmpReg1, 0); 509658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 510658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 511658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 512658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 513658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 514658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 515658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 516658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 517658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// multiply... 518658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 519d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::MLA(int cc, int s,int Rd, int Rm, int Rs, int Rn) 520658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 521658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 522658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 523658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MADD_W(Rd, Rm, Rs, Rn); 524658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(s == 1) 525658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataProcessingCommon(opSUB, 1, mTmpReg1, Rd, mZeroReg); 526658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 527d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::MUL(int cc, int s, int Rd, int Rm, int Rs) 528658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 529658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 530658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(s != 0) { NOT_IMPLEMENTED(); return;} //Not required 531658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MADD_W(Rd, Rm, Rs, mZeroReg); 532658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 533d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::UMULL(int cc, int s, 534658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int RdLo, int RdHi, int Rm, int Rs) 535658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 536658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 537658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 538d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::UMUAL(int cc, int s, 539658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int RdLo, int RdHi, int Rm, int Rs) 540658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 541658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 542658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 543d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SMULL(int cc, int s, 544658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int RdLo, int RdHi, int Rm, int Rs) 545658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 546658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 547658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 548d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SMUAL(int cc, int s, 549658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int RdLo, int RdHi, int Rm, int Rs) 550658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 551658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 552658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 553658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 554658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 555658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// branches relative to PC... 556658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 557d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::B(int cc, uint32_t* pc){ 558658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 559658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 560658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 561d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::BL(int cc, uint32_t* pc){ 562658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 563658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 564658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 565d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::BX(int cc, int Rn){ 566658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 567658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 568658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 569658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 570658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// data transfer... 571658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 572658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatenum dataTransferOp 573658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 574658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat opLDR,opLDRB,opLDRH,opSTR,opSTRB,opSTRH 575658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; 576658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 577d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::dataTransfer(int op, int cc, 578658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rd, int Rn, uint32_t op_type, uint32_t size) 579658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 580658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const int XSP = 31; 581658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Rn == SP) 582658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rn = XSP; 583658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 584658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(op_type == OPERAND_IMM) 585658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 586658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int addrReg; 587658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int imm = mAddrMode.immediate; 588658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(imm >= 0 && imm < (1<<12)) 589658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_IMM_X(mTmpReg1, mZeroReg, imm, 0); 590658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(imm < 0 && -imm < (1<<12)) 591658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SUB_IMM_X(mTmpReg1, mZeroReg, -imm, 0); 592658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 593658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 594658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 595658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 596658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 597658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 598658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat addrReg = Rn; 599658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(mAddrMode.preindex == true || mAddrMode.postindex == true) 600658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 601658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_ADD_X(mTmpReg2, addrReg, mTmpReg1); 602658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(mAddrMode.preindex == true) 603658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat addrReg = mTmpReg2; 604658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 605658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 606658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL) 607658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_B_COND(cc^1, 8); 608658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 609658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_LDRSTR_Wm_SXTW_0(op, size, Rd, addrReg, mZeroReg); 610658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 611658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(mAddrMode.writeback == true) 612658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_CSEL_X(Rn, mTmpReg2, Rn, cc); 613658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 614658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(op_type == OPERAND_REG_OFFSET) 615658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 616658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL) 617658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_B_COND(cc^1, 8); 618658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_LDRSTR_Wm_SXTW_0(op, size, Rd, Rn, mAddrMode.reg_offset); 619658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 620658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 621658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else if(op_type > OPERAND_UNSUPPORTED) 622658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 623658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL) 624658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_B_COND(cc^1, 8); 625658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_LDRSTR_Wm_SXTW_0(op, size, Rd, Rn, mZeroReg); 626658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 627658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 628658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 629658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); // Not required 630658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 631658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 632658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 633658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 634d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::ADDR_LDR(int cc, int Rd, int Rn, uint32_t op_type) 635658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 636658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opLDR, cc, Rd, Rn, op_type, 64); 637658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 638d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::ADDR_STR(int cc, int Rd, int Rn, uint32_t op_type) 639658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 640658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opSTR, cc, Rd, Rn, op_type, 64); 641658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 642d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::LDR(int cc, int Rd, int Rn, uint32_t op_type) 643658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 644658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opLDR, cc, Rd, Rn, op_type); 645658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 646d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::LDRB(int cc, int Rd, int Rn, uint32_t op_type) 647658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 648658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opLDRB, cc, Rd, Rn, op_type); 649658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 650d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::STR(int cc, int Rd, int Rn, uint32_t op_type) 651658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 652658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opSTR, cc, Rd, Rn, op_type); 653658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 654658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 655d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::STRB(int cc, int Rd, int Rn, uint32_t op_type) 656658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 657658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opSTRB, cc, Rd, Rn, op_type); 658658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 659658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 660d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::LDRH(int cc, int Rd, int Rn, uint32_t op_type) 661658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 662658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opLDRH, cc, Rd, Rn, op_type); 663658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 664d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::LDRSB(int cc, int Rd, int Rn, uint32_t offset) 665658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 666658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 667658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 668d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::LDRSH(int cc, int Rd, int Rn, uint32_t offset) 669658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 670658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 671658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 672658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 673d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::STRH(int cc, int Rd, int Rn, uint32_t op_type) 674658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 675658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return dataTransfer(opSTRH, cc, Rd, Rn, op_type); 676658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 677658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 678658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 679658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// block data transfer... 680658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 681d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::LDM(int cc, int dir, 682658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rn, int W, uint32_t reg_list) 683658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 684658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const int XSP = 31; 685658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL || dir != IA || W == 0 || Rn != SP) 686658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 687658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 688658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 689658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 690658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 691658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat for(int i = 0; i < 32; ++i) 692658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 693658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if((reg_list & (1 << i))) 694658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 695658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int reg = i; 696658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int size = 16; 697658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_LDR_IMM_PostIndex(reg, XSP, size); 698658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 699658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 700658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 701658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 702d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::STM(int cc, int dir, 703658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rn, int W, uint32_t reg_list) 704658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 705658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat const int XSP = 31; 706658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL || dir != DB || W == 0 || Rn != SP) 707658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 708658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 709658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 710658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 711658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 712658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat for(int i = 31; i >= 0; --i) 713658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 714658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if((reg_list & (1 << i))) 715658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 716658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int size = -16; 717658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int reg = i; 718658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_STR_IMM_PreIndex(reg, XSP, size); 719658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 720658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 721658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 722658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 723658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 724658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// special... 725658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 726d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SWP(int cc, int Rn, int Rd, int Rm) 727658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 728658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 729658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 730d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SWPB(int cc, int Rn, int Rd, int Rm) 731658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 732658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 733658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 734d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SWI(int cc, uint32_t comment) 735658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 736658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 737658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 738658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 739658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 740658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// DSP instructions... 741658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 742d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::PLD(int Rn, uint32_t offset) { 743658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 744658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 745658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 746d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::CLZ(int cc, int Rd, int Rm) 747658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 748658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 749658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 750658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 751d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::QADD(int cc, int Rd, int Rm, int Rn) 752658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 753658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 754658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 755658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 756d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::QDADD(int cc, int Rd, int Rm, int Rn) 757658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 758658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 759658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 760658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 761d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::QSUB(int cc, int Rd, int Rm, int Rn) 762658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 763658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 764658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 765658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 766d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::QDSUB(int cc, int Rd, int Rm, int Rn) 767658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 768658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 769658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 770658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 771658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 772658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// 16 x 16 multiplication 773658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 774d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SMUL(int cc, int xy, 775658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rd, int Rm, int Rs) 776658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 777658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 778658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 779658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (xy & xyTB) 780658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg1, Rm, 16, 31); 781658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 782658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg1, Rm, 0, 15); 783658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 784658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (xy & xyBT) 785658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg2, Rs, 16, 31); 786658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 787658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg2, Rs, 0, 15); 788658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 789658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MADD_W(Rd,mTmpReg1,mTmpReg2, mZeroReg); 790658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 791658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 792658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// 32 x 16 multiplication 793658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 794d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SMULW(int cc, int y, int Rd, int Rm, int Rs) 795658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 796658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 797658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 798658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if (y & yT) 799658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg1, Rs, 16, 31); 800658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 801658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg1, Rs, 0, 15); 802658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 803658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg2, Rm, 0, 31); 804658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SMADDL(mTmpReg3,mTmpReg1,mTmpReg2, mZeroReg); 805658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_UBFM_X(Rd,mTmpReg3, 16, 47); 806658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 807658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 808658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// 16 x 16 multiplication and accumulate 809658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 810d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) 811658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 812658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 813658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(xy != xyBB) { NOT_IMPLEMENTED(); return;} //Not required 814658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 815658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg1, Rm, 0, 15); 816658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_SBFM_W(mTmpReg2, Rs, 0, 15); 817658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MADD_W(Rd, mTmpReg1, mTmpReg2, Rn); 818658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 819658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 820d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SMLAL(int cc, int xy, 821658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int RdHi, int RdLo, int Rs, int Rm) 822658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 823658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 824658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 825658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 826658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 827d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::SMLAW(int cc, int y, 828658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat int Rd, int Rm, int Rs, int Rn) 829658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 830658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 831658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return; 832658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 833658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 834658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 835658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Byte/half word extract and extend 836658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 837d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::UXTB16(int cc, int Rd, int Rm, int rotate) 838658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 839658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 840658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 841658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_EXTR_W(mTmpReg1, Rm, Rm, rotate * 8); 842658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 843658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t imm = 0x00FF00FF; 844658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVZ_W(mTmpReg2, imm & 0xFFFF, 0); 845658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_MOVK_W(mTmpReg2, (imm >> 16) & 0x0000FFFF, 16); 846658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_AND_W(Rd,mTmpReg1, mTmpReg2); 847658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 848658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 849658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 850658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Bit manipulation 851658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 852d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossvoid ArmToArm64Assembler::UBFX(int cc, int Rd, int Rn, int lsb, int width) 853658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 854658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(cc != AL){ NOT_IMPLEMENTED(); return;} //Not required 855658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat *mPC++ = A64_UBFM_W(Rd, Rn, lsb, lsb + width - 1); 856658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 857658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 858658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Shifters... 859658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 860d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossint ArmToArm64Assembler::buildImmediate( 861658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t immediate, uint32_t& rot, uint32_t& imm) 862658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 863658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat rot = 0; 864658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat imm = immediate; 865658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return 0; // Always true 866658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 867658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 868658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 869d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossbool ArmToArm64Assembler::isValidImmediate(uint32_t immediate) 870658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 871658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t rot, imm; 872658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return buildImmediate(immediate, rot, imm) == 0; 873658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 874658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 875d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::imm(uint32_t immediate) 876658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 877658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.immediate = immediate; 878658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.writeback = false; 879658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.preindex = false; 880658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.postindex = false; 881658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_IMM; 882658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 883658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 884658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 885d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::reg_imm(int Rm, int type, uint32_t shift) 886658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 887658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.reg_imm_Rm = Rm; 888658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.reg_imm_type = type; 889658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.reg_imm_shift = shift; 890658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_REG_IMM; 891658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 892658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 893d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::reg_rrx(int Rm) 894658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 895658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); 896658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 897658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 898658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 899d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::reg_reg(int Rm, int type, int Rs) 900658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 901658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 902658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 903658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 904658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 905658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// Addressing modes... 906658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 907d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::immed12_pre(int32_t immed12, int W) 908658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 909658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.immediate = immed12; 910658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.writeback = W; 911658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.preindex = true; 912658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.postindex = false; 913658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_IMM; 914658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 915658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 916d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::immed12_post(int32_t immed12) 917658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 918658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.immediate = immed12; 919658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.writeback = true; 920658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.preindex = false; 921658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.postindex = true; 922658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_IMM; 923658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 924658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 925d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::reg_scale_pre(int Rm, int type, 926658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t shift, int W) 927658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 928658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(type != 0 || shift != 0 || W != 0) 929658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 930658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 931658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 932658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 933658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 934658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 935658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.reg_offset = Rm; 936658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_REG_OFFSET; 937658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 938658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 939658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 940d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::reg_scale_post(int Rm, int type, uint32_t shift) 941658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 942658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 943658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 944658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 945658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 946d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::immed8_pre(int32_t immed8, int W) 947658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 948658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.immediate = immed8; 949658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.writeback = W; 950658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.preindex = true; 951658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.postindex = false; 952658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_IMM; 953658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 954658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 955d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::immed8_post(int32_t immed8) 956658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 957658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.immediate = immed8; 958658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.writeback = true; 959658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.preindex = false; 960658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.postindex = true; 961658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_IMM; 962658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 963658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 964d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::reg_pre(int Rm, int W) 965658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 966658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(W != 0) 967658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 968658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 969658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 970658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 971658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 972658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 973658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat mAddrMode.reg_offset = Rm; 974658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_REG_OFFSET; 975658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 976658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 977658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 978d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::reg_post(int Rm) 979658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 980658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat NOT_IMPLEMENTED(); //Not required 981658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return OPERAND_UNSUPPORTED; 982658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 983658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 984658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 985658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// A64 instructions 986658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat// ---------------------------------------------------------------------------- 987658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 988658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatstatic const char * dataTransferOpName[] = 989658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 990658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat "LDR","LDRB","LDRH","STR","STRB","STRH" 991658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; 992658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 993658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhatstatic const uint32_t dataTransferOpCode [] = 994658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 995658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0xB8u << 24) | (0x3 << 21) | (0x6 << 13) | (0x0 << 12) |(0x1 << 11)), 996658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0x38u << 24) | (0x3 << 21) | (0x6 << 13) | (0x1 << 12) |(0x1 << 11)), 997658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0x78u << 24) | (0x3 << 21) | (0x6 << 13) | (0x0 << 12) |(0x1 << 11)), 998658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0xB8u << 24) | (0x1 << 21) | (0x6 << 13) | (0x0 << 12) |(0x1 << 11)), 999658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0x38u << 24) | (0x1 << 21) | (0x6 << 13) | (0x1 << 12) |(0x1 << 11)), 1000658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat ((0x78u << 24) | (0x1 << 21) | (0x6 << 13) | (0x0 << 12) |(0x1 << 11)) 1001658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; 1002d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_LDRSTR_Wm_SXTW_0(uint32_t op, 1003658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t size, uint32_t Rt, 1004658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rn, uint32_t Rm) 1005658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1006658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(size == 32) 1007658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 1008658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("%s W%d, [X%d, W%d, SXTW #0]\n", 1009658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataTransferOpName[op], Rt, Rn, Rm); 1010658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return(dataTransferOpCode[op] | (Rm << 16) | (Rn << 5) | Rt); 1011658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 1012658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 1013658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 1014658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("%s X%d, [X%d, W%d, SXTW #0]\n", 1015658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat dataTransferOpName[op], Rt, Rn, Rm); 1016658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return(dataTransferOpCode[op] | (0x1<<30) | (Rm<<16) | (Rn<<5)|Rt); 1017658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 1018658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1019658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1020d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_STR_IMM_PreIndex(uint32_t Rt, 1021658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rn, int32_t simm) 1022658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1023658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Rn == 31) 1024658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("STR W%d, [SP, #%d]!\n", Rt, simm); 1025658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 1026658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("STR W%d, [X%d, #%d]!\n", Rt, Rn, simm); 1027658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1028658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t imm9 = (unsigned)(simm) & 0x01FF; 1029658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0xB8 << 24) | (imm9 << 12) | (0x3 << 10) | (Rn << 5) | Rt; 1030658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1031658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1032d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_LDR_IMM_PostIndex(uint32_t Rt, 1033658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rn, int32_t simm) 1034658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1035658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(Rn == 31) 1036658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("LDR W%d, [SP], #%d\n",Rt,simm); 1037658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 1038658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("LDR W%d, [X%d], #%d\n",Rt, Rn, simm); 1039658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1040658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t imm9 = (unsigned)(simm) & 0x01FF; 1041658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0xB8 << 24) | (0x1 << 22) | 1042658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (imm9 << 12) | (0x1 << 10) | (Rn << 5) | Rt; 1043658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1044658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1045d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ADD_X_Wm_SXTW(uint32_t Rd, 1046658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rn, 1047658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, 1048658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1049658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1050658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ADD X%d, X%d, W%d, SXTW #%d\n", Rd, Rn, Rm, amount); 1051658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x8B << 24) | (0x1 << 21) |(Rm << 16) | 1052658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (0x6 << 13) | (amount << 10) | (Rn << 5) | Rd); 1053658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1054658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1055658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1056d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_SUB_X_Wm_SXTW(uint32_t Rd, 1057658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rn, 1058658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, 1059658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1060658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1061658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SUB X%d, X%d, W%d, SXTW #%d\n", Rd, Rn, Rm, amount); 1062658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0xCB << 24) | (0x1 << 21) |(Rm << 16) | 1063658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (0x6 << 13) | (amount << 10) | (Rn << 5) | Rd); 1064658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1065658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1066658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1067d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_B_COND(uint32_t cc, uint32_t offset) 1068658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1069658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("B.%s #.+%d\n", cc_codes[cc], offset); 1070658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0x54 << 24) | ((offset/4) << 5) | (cc); 1071658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1072658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1073d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ADD_X(uint32_t Rd, uint32_t Rn, 1074658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1075658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1076658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1077658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ADD X%d, X%d, X%d, %s #%d\n", 1078658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1079658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x8B << 24) | (shift << 22) | ( Rm << 16) | 1080658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1081658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1082d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ADD_IMM_X(uint32_t Rd, uint32_t Rn, 1083658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t imm, uint32_t shift) 1084658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1085658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ADD X%d, X%d, #%d, LSL #%d\n", Rd, Rn, imm, shift); 1086658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0x91 << 24) | ((shift/12) << 22) | (imm << 10) | (Rn << 5) | Rd; 1087658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1088658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1089d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_SUB_IMM_X(uint32_t Rd, uint32_t Rn, 1090658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t imm, uint32_t shift) 1091658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1092658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SUB X%d, X%d, #%d, LSL #%d\n", Rd, Rn, imm, shift); 1093658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0xD1 << 24) | ((shift/12) << 22) | (imm << 10) | (Rn << 5) | Rd; 1094658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1095658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1096d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ADD_W(uint32_t Rd, uint32_t Rn, 1097658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1098658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1099658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1100658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ADD W%d, W%d, W%d, %s #%d\n", 1101658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1102658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x0B << 24) | (shift << 22) | ( Rm << 16) | 1103658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1104658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1105658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1106d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_SUB_W(uint32_t Rd, uint32_t Rn, 1107658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1108658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount, 1109658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t setflag) 1110658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1111658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat if(setflag == 0) 1112658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 1113658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SUB W%d, W%d, W%d, %s #%d\n", 1114658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1115658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x4B << 24) | (shift << 22) | ( Rm << 16) | 1116658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1117658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 1118658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat else 1119658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat { 1120658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SUBS W%d, W%d, W%d, %s #%d\n", 1121658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1122658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x6B << 24) | (shift << 22) | ( Rm << 16) | 1123658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1124658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat } 1125658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1126658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1127d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_AND_W(uint32_t Rd, uint32_t Rn, 1128658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1129658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1130658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1131658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("AND W%d, W%d, W%d, %s #%d\n", 1132658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1133658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x0A << 24) | (shift << 22) | ( Rm << 16) | 1134658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1135658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1136658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1137d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ORR_W(uint32_t Rd, uint32_t Rn, 1138658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1139658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1140658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1141658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ORR W%d, W%d, W%d, %s #%d\n", 1142658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1143658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x2A << 24) | (shift << 22) | ( Rm << 16) | 1144658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1145658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1146658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1147d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_ORN_W(uint32_t Rd, uint32_t Rn, 1148658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t shift, 1149658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t amount) 1150658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1151658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("ORN W%d, W%d, W%d, %s #%d\n", 1152658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat Rd, Rn, Rm, shift_codes[shift], amount); 1153658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x2A << 24) | (shift << 22) | (0x1 << 21) | ( Rm << 16) | 1154658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (amount << 10) |(Rn << 5) | Rd); 1155658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1156658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1157d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_CSEL_X(uint32_t Rd, uint32_t Rn, 1158658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t cond) 1159658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1160658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("CSEL X%d, X%d, X%d, %s\n", Rd, Rn, Rm, cc_codes[cond]); 1161658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x9A << 24)|(0x1 << 23)|(Rm << 16) |(cond << 12)| (Rn << 5) | Rd); 1162658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1163658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1164d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_CSEL_W(uint32_t Rd, uint32_t Rn, 1165658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t cond) 1166658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1167658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("CSEL W%d, W%d, W%d, %s\n", Rd, Rn, Rm, cc_codes[cond]); 1168658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x1A << 24)|(0x1 << 23)|(Rm << 16) |(cond << 12)| (Rn << 5) | Rd); 1169658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1170658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1171d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_RET(uint32_t Rn) 1172658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1173658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("RET X%d\n", Rn); 1174658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0xD6 << 24) | (0x1 << 22) | (0x1F << 16) | (Rn << 5)); 1175658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1176658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1177d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_MOVZ_X(uint32_t Rd, uint32_t imm, 1178658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t shift) 1179658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1180658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("MOVZ X%d, #0x%x, LSL #%d\n", Rd, imm, shift); 1181658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return(0xD2 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd; 1182658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1183658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1184d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_MOVK_W(uint32_t Rd, uint32_t imm, 1185658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t shift) 1186658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1187658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("MOVK W%d, #0x%x, LSL #%d\n", Rd, imm, shift); 1188658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0x72 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd; 1189658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1190658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1191d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_MOVZ_W(uint32_t Rd, uint32_t imm, 1192658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t shift) 1193658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1194658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("MOVZ W%d, #0x%x, LSL #%d\n", Rd, imm, shift); 1195658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return(0x52 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd; 1196658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1197658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1198d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_SMADDL(uint32_t Rd, uint32_t Rn, 1199658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t Ra) 1200658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1201658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SMADDL X%d, W%d, W%d, X%d\n",Rd, Rn, Rm, Ra); 1202658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x9B << 24) | (0x1 << 21) | (Rm << 16)|(Ra << 10)|(Rn << 5) | Rd); 1203658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1204658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1205d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_MADD_W(uint32_t Rd, uint32_t Rn, 1206658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t Ra) 1207658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1208658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("MADD W%d, W%d, W%d, W%d\n",Rd, Rn, Rm, Ra); 1209658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x1B << 24) | (Rm << 16) | (Ra << 10) |(Rn << 5) | Rd); 1210658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1211658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1212d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_SBFM_W(uint32_t Rd, uint32_t Rn, 1213658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t immr, uint32_t imms) 1214658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1215658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("SBFM W%d, W%d, #%d, #%d\n", Rd, Rn, immr, imms); 1216658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x13 << 24) | (immr << 16) | (imms << 10) | (Rn << 5) | Rd); 1217658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1218658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1219d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_UBFM_W(uint32_t Rd, uint32_t Rn, 1220658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t immr, uint32_t imms) 1221658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1222658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("UBFM W%d, W%d, #%d, #%d\n", Rd, Rn, immr, imms); 1223658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0x53 << 24) | (immr << 16) | (imms << 10) | (Rn << 5) | Rd); 1224658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1225658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1226d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_UBFM_X(uint32_t Rd, uint32_t Rn, 1227658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t immr, uint32_t imms) 1228658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1229658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("UBFM X%d, X%d, #%d, #%d\n", Rd, Rn, immr, imms); 1230658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return ((0xD3 << 24) | (0x1 << 22) | 1231658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat (immr << 16) | (imms << 10) | (Rn << 5) | Rd); 1232658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1233658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1234d4146e6091d6ed947ce9edd0f8ef3e5fe066d716Colin Crossuint32_t ArmToArm64Assembler::A64_EXTR_W(uint32_t Rd, uint32_t Rn, 1235658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat uint32_t Rm, uint32_t lsb) 1236658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat{ 1237658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat LOG_INSTR("EXTR W%d, W%d, W%d, #%d\n", Rd, Rn, Rm, lsb); 1238658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat return (0x13 << 24)|(0x1 << 23) | (Rm << 16) | (lsb << 10)|(Rn << 5) | Rd; 1239658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat} 1240658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1241658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat}; // namespace android 1242658f89dc5c418dbbc0c5d78f5861855b90ca8c9fAshok Bhat 1243