| 1f47a77c4e4951f141bf20fe7f7c5d9438ea1663 |
|
11-Sep-2014 |
Heikki Krogerus <heikki.krogerus@linux.intel.com> |
ACPI / LPSS: not using UART RTS override with Auto Flow Control
Adding a check for UART Auto Flow Control feature and only
enabling the RTS override when it's not supported. RTS
override is not needed when Auto Flow Control is used and
they shouldn't be used together.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 457920817e645a7dee42c2a75c81c5ed8e12ee1c |
|
24-Sep-2014 |
Fu Zhonghui <zhonghui.fu@linux.intel.com> |
ACPI / platform / LPSS: disable async suspend/resume of LPSS devices
On some systems (Asus T100 in particular) there are strict ordering
dependencies between LPSS devices with respect to power management
that break if they suspend/resume asynchronously.
In theory it should be possible to follow those dependencies in the
async suspend/resume case too (the ACPI tables tell as that the
dependencies are there), but since we're missing infrastructure
for that at the moment, disable async suspend/resume for all of
the LPSS devices for the time being.
Link: http://marc.info/?l=linux-acpi&m=141158962321905&w=2
Fixes: 8ce62f85a81f (ACPI / platform / LPSS: Enable async suspend/resume of LPSS devices)
Signed-off-by: Li Aubrey <aubrey.li@linux.intel.com>
Signed-off-by: Fu Zhonghui <zhonghui.fu@linux.intel.com>
Cc: 3.16+ <stable@vger.kernel.org> # 3.16+
[ rjw: Changelog ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| f4168b617ac09986c4333accaff5d8ba5a9db7bf |
|
09-Sep-2014 |
Fu Zhonghui <zhonghui.fu@linux.intel.com> |
ACPI / LPSS: complete PM entries for LPSS power domain
PM entries of LPSS power domain were not implemented correctly
in commit c78b0830667a "ACPI / LPSS: custom power domain for LPSS".
This patch fixes and completes these PM entries.
Fixes: c78b0830667a (ACPI / LPSS: custom power domain for LPSS)
Signed-off-by: Li Aubrey <aubrey.li@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Fu Zhonghui <zhonghui.fu@linux.intel.com>
Cc: 3.16+ <stable@vger.kernel.org> # 3.16+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 3f56bf3e939f0344febf92c41fbc0c26a21593c4 |
|
02-Sep-2014 |
Heikki Krogerus <heikki.krogerus@linux.intel.com> |
ACPI / LPSS: remove struct lpss_shared_clock
Nothing requires it anymore. The PWM driver no longer
uses clk framework to get the rate.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 03f09f73bbd805f918fdc76888a1a83cdc28f28b |
|
02-Sep-2014 |
Heikki Krogerus <heikki.krogerus@linux.intel.com> |
ACPI / LPSS: support for 133MHz I2C source clock on Baytrail
The I2C controllers on Baytrail can get the clock from
100MHz or 133MHz source clock. The first bits in the private
clock parameter register indicates which one is being used.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| b0d00f8bd526dab6878913dfd5690eee5d4be10e |
|
02-Sep-2014 |
Heikki Krogerus <heikki.krogerus@linux.intel.com> |
ACPI / LPSS: drop clkdev_name member from lpss_device_desc
It was used to provide the correct con_id for the dma
driver, but it's not needed. Even if the driver requests a
clock with the con_id, it still gets the correct clock. The
device name is enough to match a single clock.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| ff8c1af5e7ebfdf2da5d2063ee34e16a8d05643c |
|
02-Sep-2014 |
Heikki Krogerus <heikki.krogerus@linux.intel.com> |
ACPI / LPSS: introduce flags
Replace the booleans with a single flags member variable.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 1bfbd8eb8a7f6f1eb573ccdfae5c86395abc79cb |
|
19-Aug-2014 |
Alan Cox <alan@linux.intel.com> |
ACPI / LPSS: Add ACPI IDs for Intel Braswell
Enable more identifiers for the existing devices for Intel Braswell and
Cherryview.
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 43218a1b3ba7c8e39d88b5c0a43841f0e3e17470 |
|
01-Aug-2014 |
Jie Yang <yang.jie@intel.com> |
ACPI / LPSS: add LPSS device for Wildcat Point PCH
INT3438 is the ADSP device on Wildcat Point platform
with 2 DW DMA engines built In. The DMA engines are
used for DSP FW loading and audio data transferring.
These DMA engine probing need the clock, without it,
probing may failed and can't go forward.
Add LPSS device "INT3438" for Wildcat Point PCH, to
provide clock for its ADSP DMA engine probing.
Signed-off-by: Jie Yang <yang.jie@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 765bdd4e51674c1ae3a61ceb12a05706bf6b691b |
|
17-Jun-2014 |
Mika Westerberg <mika.westerberg@linux.intel.com> |
ACPI / LPSS: Take I2C host controllers out of reset
On Intel Baytrail, some I2C host controllers are held in reset when the OS
gets control. This causes the driver to fail to detect the hardware
properly.
Fix this so that we make sure that the I2C host controller is not in reset
when the driver gets probe'd.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| d6ddaaac8f5c37ad84db3e6e019981f392389cf0 |
|
30-May-2014 |
Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
ACPI / scan: always register ACPI LPSS scan handler
Prevent platform devices from being created for ACPI LPSS devices
if CONFIG_X86_INTEL_LPSS is unset by compiling out the LPSS scan
handler's callbacks only in that case and still compiling its device
ID list in and registering the scan handler in either case.
This change is based on a prototype from Zhang Rui.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
|
| ed3a872e2ef62bde06e2f579d8d1458766ced078 |
|
19-May-2014 |
Heikki Krogerus <heikki.krogerus@linux.intel.com> |
ACPI / LPSS: support for fractional divider clock
This creates fractional divider type clock for the ones that
have it. It is needed by the UART driver as the clock rate must
accommodate to the requested baud rate.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| c78b0830667a7e7c1f0ca65b76b33166a84806b3 |
|
23-May-2014 |
Heikki Krogerus <heikki.krogerus@linux.intel.com> |
ACPI / LPSS: custom power domain for LPSS
A power domain where we save the context of the additional
LPSS registers. We need to do this or all LPSS devices are
left in reset state when resuming from D3 on some Baytrails.
The devices with the fractional clock divider also have
zeros for N and M values after resuming unless they are
reset.
Li Aubrey found the root cause for the issue. The idea of
using power domain for LPSS came from Mika Westerberg.
Reported-by: Jin Yao <yao.jin@linux.intel.com>
Suggested-by: Li Aubrey <aubrey.li@linux.intel.com>
Suggested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
[rjw: Added the .complete() callback to the PM domain, fixed build
warning on 32-bit.]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 8ce62f85a81f57e86bc120ab690facc612223188 |
|
25-May-2014 |
Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
ACPI / platform / LPSS: Enable async suspend/resume of LPSS devices
To seed up suspend and resume of devices included into Intel SoCs
handled by the ACPI LPSS driver during system suspend, make
acpi_lpss_create_device() call device_enable_async_suspend() for
every device created by it.
This requires acpi_create_platform_device() to be modified to return
a pointer to struct platform_device instead of an int. As a result,
acpi_create_platform_device() cannot be pointed to by the .attach
pointer in platform_handler directly any more, so a simple wrapper
around it is necessary for this purpose. That, in turn, allows the
second unused argument of acpi_create_platform_device() to be
dropped, which is an improvement.
Tested-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 20482d3279226d2d2802647ffa3ce82e511b74d7 |
|
15-May-2014 |
Jin Yao <yao.jin@intel.com> |
pinctrl: baytrail: Add back Baytrail-T ACPI ID
Now that the x86 dynamic IRQ allocation problem has been resolved with
commmit 62a08ae2a576 (genirq: x86: Ensure that dynamic irq allocation does
not conflict), we can add back Baytrail-T ACPI ID to the pinctrl driver.
This makes the driver to work on Asus T100 where it is needed for several
things like ACPI GPIO events and SD card detection.
References: https://bugzilla.kernel.org/show_bug.cgi?id=68291
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Jin Yao <yao.jin@intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| e1c7481797542f4d2039d5a458ef80603298ad78 |
|
18-Feb-2014 |
Chew, Chiau Ee <chiau.ee.chew@intel.com> |
ACPI / LPSS: Add Intel BayTrail ACPI mode PWM
Intel BayTrail LPSS consists of two PWM controllers which can
be enumerated from ACPI namespace. This change will cause
platform device objects to be created for Intel BayTrail PWM
controllers which will allow the pwm-lpss driver to bind to them
and handle those devices.
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 1a8f83515c1646e134163f0ab310362fae49fcca |
|
11-Feb-2014 |
Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
ACPI / LPSS: Support for device latency tolerance PM QoS
Add a new routine, acpi_lpss_set_ltr(), for setting latency tolerance
values for LPSS devices having LTR (Latency Tolerance Reporting)
registers. Add .bind()/.unbind() callbacks to lpss_handler to set
the LPSS devices' power.set_latency_tolerance callback pointers to
acpi_lpss_set_ltr() during device addition and to clear them on
device removal, respectively.
That will cause the device latency tolerance PM QoS to work for
the devices in question as documented.
This changeset includes a fix from Mika Westerberg.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 2b844ba79f4a114bd228ad6fee040ffd99a0963d |
|
17-Jan-2014 |
Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
Revert "ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs"
This reverts commit f6308b36c411 (ACPI: Add BayTrail SoC GPIO and LPSS
ACPI IDs), because it causes the Alan Cox' ASUS T100TA to "crash and
burn" during boot if the Baytrail pinctrl driver is compiled in.
Fixes: f6308b36c411 (ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs)
Reported-by: One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk>
Requested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| f6308b36c411dc5afd6a6f73e6454722bfde57b7 |
|
25-Nov-2013 |
Paul Drews <paul.drews@intel.com> |
ACPI: Add BayTrail SoC GPIO and LPSS ACPI IDs
This adds the new ACPI ID (INT33FC) for the BayTrail GPIO
banks as seen on a BayTrail M System-On-Chip platform. This
ACPI ID is used by the BayTrail GPIO (pinctrl) driver to
manage the Low Power Subsystem (LPSS).
Signed-off-by: Paul Drews <paul.drews@intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| a4d97536a1a20a70a65ded5d445013a3904d5a8d |
|
12-Nov-2013 |
Mika Westerberg <mika.westerberg@linux.intel.com> |
ACPI / LPSS: add ACPI IDs for newer Intel PCHs
Some recent Intel PCHs with LPSS have different ACPI IDs for the LPSS
devices, so add these to the list as well.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 088f1fd267c7f43b5d87850a0fa0c7e851ecae97 |
|
09-Oct-2013 |
Heikki Krogerus <heikki.krogerus@linux.intel.com> |
ACPI / LPSS: fix UART Auto Flow Control
There is an additional bit in the GENERAL register on newer
silicon that needs to be set or UART's RTS pin fails to
reflect the flow control settings in the Modem Control
Register.
This will fix an issue where the RTS pin of the UART stays
always at 1.8V, regardless of the register settings.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| af65cfe9aeae03e0682bebdf4db94582d75562dd |
|
02-Sep-2013 |
Mika Westerberg <mika.westerberg@linux.intel.com> |
ACPI / LPSS: don't crash if a device has no MMIO resources
Intel LPSS devices that are enumerated from ACPI have both MMIO and IRQ
resources returned in their _CRS method. However, Apple Macbook Air with
Haswell has LPSS devices enumerated from PCI bus instead and _CRS method
returns only an interrupt number (but the device has _HID set that causes
the scan handler to match it).
The current ACPI / LPSS code sets pdata->dev_desc only when MMIO resource
is found for the device and in case of Macbook Air it is never found. That
leads to a NULL pointer dereference in register_device_clock().
Correct this by always setting the pdata->dev_desc.
Reported-and-tested-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: 3.10+ <stable@vger.kernel.org> # 3.10+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| b9e95fc65ededbec083aa91b4faa58ad992c0891 |
|
19-Jun-2013 |
Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
ACPI / LPSS: Power up LPSS devices during enumeration
Commit 7cd8407 (ACPI / PM: Do not execute _PS0 for devices without
_PSC during initialization) introduced a regression on some systems
with Intel Lynxpoint Low-Power Subsystem (LPSS) where some devices
need to be powered up during initialization, but their device objects
in the ACPI namespace have _PS0 and _PS3 only (without _PSC or power
resources).
To work around this problem, make the ACPI LPSS driver power up
devices it knows about by using a new helper function
acpi_device_fix_up_power() that does all of the necessary
sanity checks and calls acpi_dev_pm_explicit_set() to put the
device into D0.
Reported-and-tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 958c4eb2aa325099ea1f54c7354e381e3d79f3ae |
|
18-Jun-2013 |
Mika Westerberg <mika.westerberg@linux.intel.com> |
ACPI / LPSS: override SDIO private register space size from ACPI tables
The SDIO device in Lynxpoint has its LTR registers reserved for a
WiFi device (a child of the SDIO device) in the ACPI namespace even
though those registers physically belong to the SDIO device itself.
In order to be able to access the SDIO LTR registers from the ACPI
LPSS driver for diagnostic purposes we need to use a size override
for the SDIO private register space.
Add a possibility to override the size of the private register space
of an LPSS device provided by the ACPI tables in the ACPI LPSS driver
and set the correct size for the SDIO device in there.
[rjw: Changelog]
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 06d8641504726322fca54400bbac982bd44f9a27 |
|
17-Jun-2013 |
Heikki Krogerus <heikki.krogerus@linux.intel.com> |
ACPI / LPSS: mask the UART TX completion interrupt
Intel LPSS provides an extra TX byte counter and an extra TX
completion interrupt for some of its bus controllers. However,
there is no use for the extra UART interrupt and it has to be
masked out during initialization.
Otherwise, if the firmware does not mask the interrupt and
the driver does not clear it, it may cause an interrupt flood
freezing the board to happen.
Add code masking that problematic interrupt to the ACPI LPSS driver.
[rjw: Changelog]
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| f627217064dbef1eef53ceb01edb9c94203991e0 |
|
13-May-2013 |
Mika Westerberg <mika.westerberg@linux.intel.com> |
ACPI / LPSS: add support for Intel BayTrail
Intel BayTrail has almost the same Low Power Subsystem than Lynxpoint with
few differences. Peripherals are clocked with different speeds (typically
lower) and the clock is not always gated. To support this we add
possibility to share a common fixed rate clock and make clock gating
optional.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| b59cc200ac025aca597fb21862c1c9e667f2eff2 |
|
08-May-2013 |
Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
ACPI / LPSS: register clock device for Lynxpoint DMA properly
The DMA controller in Lynxpoint is enumerated as a regular ACPI device now. To
work properly it is using the LPSS root clock as a functional clock. That's why
we have to register the clock device accordingly to the ACPI ID of the DMA
controller. The acpi_lpss.c module is responsible to do the job.
This patch also removes hardcoded name of the DMA device in clk-lpt.c and the
name of the root clock in acpi_lpss.c.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
|
| cf8df962aa830d05be1a8d5a9c7d2a67b2837b45 |
|
20-Mar-2013 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
ACPI / LPSS: make code less confusing for reader
The excerpt like this:
if (err) {
err = 0;
goto error_out;
}
makes a reader confused even if it's commented. Let's do necessary actions and
return no error explicitly.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| 2e0f8822d1a6d839e66786e99ce1043e4ad1cd72 |
|
06-Mar-2013 |
Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
ACPI / LPSS: Add support for exposing LTR registers to user space
Devices on the Intel Lynxpoint Low Power Subsystem (LPSS) have
registers providing access to LTR (Latency Tolerance Reporting)
functionality that allows software to monitor and possibly influence
the aggressiveness of the platform's active-state power management.
For each LPSS device, there are two modes of operation related to LTR,
the auto mode and the software mode. In the auto mode the LTR is
set up by the platform firmware and managed by hardware. Software
can only read the LTR register values to monitor the platform's
behavior. In the software mode it is possible to use LTR to control
the extent to which the platform will use its built-in power
management features.
This changeset adds support for reading the LPSS devices' LTR
registers and exposing their values to user space for monitoring and
diagnostics purposes. It re-uses the MMIO mappings created to access
the LPSS devices' clock registers for reading the values of the LTR
registers and exposes them to user space through sysfs device
attributes. Namely, a new atrribute group, lpss_ltr, is created for
each LPSS device. It contains three new attributes: ltr_mode,
auto_ltr, sw_ltr. The value of the ltr_mode attribute reflects the
LTR mode being used at the moment (software vs auto) and the other
two contain the actual register values (raw) whose meaning depends
on the LTR mode. All of these attributes are read-only.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
| f58b082aed43400c03e53beacc50a9f9eb23ac91 |
|
06-Mar-2013 |
Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
ACPI / scan: Add special handler for Intel Lynxpoint LPSS devices
Devices on the Intel Lynxpoint Low Power Subsystem (LPSS) have some
common features that aren't shared with any other platform devices,
including the clock and LTR (Latency Tolerance Reporting) registers.
It is better to handle those features in common code than to bother
device drivers with doing that (I/O functionality-wise the LPSS
devices are generally compatible with other devices that don't
have those special registers and may be handled by the same drivers).
The clock registers of the LPSS devices are now taken care of by
the special clk-x86-lpss driver, but the MMIO mappings used for
accessing those registers can also be used for accessing the LTR
registers on those devices (LTR support for the Lynxpoint LPSS is
going to be added by a subsequent patch). Thus it is convenient
to add a special ACPI scan handler for the Lynxpoint LPSS devices
that will create the MMIO mappings for accessing the clock (and
LTR in the future) registers and will register the LPSS devices'
clocks, so the clk-x86-lpss driver will only need to take care of
the main Lynxpoint LPSS clock.
Introduce a special ACPI scan handler for Intel Lynxpoint LPSS
devices as described above. This also reduces overhead related to
browsing the ACPI namespace in search of the LPSS devices before the
registration of their clocks, removes some LPSS-specific (and
somewhat ugly) code from acpi_platform.c and shrinks the overall code
size slightly.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
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