Lines Matching refs:csr
97 ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */
99 ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr;
175 volatile unsigned long *csr,
180 val = *csr;
184 *csr = val;
186 *csr;
197 val = io7->csrs->PO7_LSI_CTL[which].csr;
201 io7->csrs->PO7_LSI_CTL[which].csr = val;
203 io7->csrs->PO7_LSI_CTL[which].csr;
214 val = io7->csrs->PO7_MSI_CTL[which].csr;
218 io7->csrs->PO7_MSI_CTL[which].csr = val;
220 io7->csrs->PO7_MSI_CTL[which].csr;
229 io7->csrs->PO7_LSI_CTL[which].csr = ((unsigned long)where << 14);
231 io7->csrs->PO7_LSI_CTL[which].csr;
240 io7->csrs->PO7_MSI_CTL[which].csr = ((unsigned long)where << 14);
242 io7->csrs->PO7_MSI_CTL[which].csr;
270 io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, boot_cpuid);
271 io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, boot_cpuid);
272 io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, boot_cpuid);
273 io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, boot_cpuid);
274 io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, boot_cpuid);
419 io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, cpuid);
420 io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, cpuid);
421 io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, cpuid);
422 io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, cpuid);
423 io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, cpuid);