Lines Matching refs:str
67 str w4, [x3, #VGIC_V2_CPU_HCR]
68 str w5, [x3, #VGIC_V2_CPU_VMCR]
69 str w6, [x3, #VGIC_V2_CPU_MISR]
70 CPU_LE( str w7, [x3, #VGIC_V2_CPU_EISR] )
71 CPU_LE( str w8, [x3, #(VGIC_V2_CPU_EISR + 4)] )
72 CPU_LE( str w9, [x3, #VGIC_V2_CPU_ELRSR] )
73 CPU_LE( str w10, [x3, #(VGIC_V2_CPU_ELRSR + 4)] )
74 CPU_BE( str w7, [x3, #(VGIC_V2_CPU_EISR + 4)] )
75 CPU_BE( str w8, [x3, #VGIC_V2_CPU_EISR] )
76 CPU_BE( str w9, [x3, #(VGIC_V2_CPU_ELRSR + 4)] )
77 CPU_BE( str w10, [x3, #VGIC_V2_CPU_ELRSR] )
78 str w11, [x3, #VGIC_V2_CPU_APR]
81 str wzr, [x2, #GICH_HCR]
89 str w5, [x3], #4
120 str w4, [x2, #GICH_HCR]
121 str w5, [x2, #GICH_VMCR]
122 str w6, [x2, #GICH_APR]
130 str w5, [x2], #4