Lines Matching defs:ctx
36 static void spufs_handle_event(struct spu_context *ctx,
41 if (ctx->flags & SPU_CREATE_EVENTS_ENABLED) {
42 ctx->event_return |= type;
43 wake_up_all(&ctx->stop_wq);
58 ctx->ops->restart_dma(ctx);
68 ctx->ops->npc_read(ctx) - 4;
77 int spufs_handle_class0(struct spu_context *ctx)
79 unsigned long stat = ctx->csa.class_0_pending & CLASS0_INTR_MASK;
85 spufs_handle_event(ctx, ctx->csa.class_0_dar,
89 spufs_handle_event(ctx, ctx->csa.class_0_dar,
93 spufs_handle_event(ctx, ctx->csa.class_0_dar,
96 ctx->csa.class_0_pending = 0;
110 int spufs_handle_class1(struct spu_context *ctx)
126 ea = ctx->csa.class_1_dar;
127 dsisr = ctx->csa.class_1_dsisr;
132 spuctx_switch_state(ctx, SPU_UTIL_IOWAIT);
134 pr_debug("ctx %p: ea %016llx, dsisr %016llx state %d\n", ctx, ea,
135 dsisr, ctx->state);
137 ctx->stats.hash_flt++;
138 if (ctx->state == SPU_STATE_RUNNABLE)
139 ctx->spu->stats.hash_flt++;
142 spu_release(ctx);
158 mutex_lock(&ctx->state_mutex);
165 ctx->csa.class_1_dar = ctx->csa.class_1_dsisr = 0;
174 ctx->stats.maj_flt++;
176 ctx->stats.min_flt++;
177 if (ctx->state == SPU_STATE_RUNNABLE) {
179 ctx->spu->stats.maj_flt++;
181 ctx->spu->stats.min_flt++;
184 if (ctx->spu)
185 ctx->ops->restart_dma(ctx);
187 spufs_handle_event(ctx, ea, SPE_EVENT_SPE_DATA_STORAGE);
189 spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);