Lines Matching defs:hpriv

184 static int imx_sata_phy_reset(struct ahci_host_priv *hpriv)
186 void __iomem *mmio = hpriv->mmio;
215 static int imx_sata_enable(struct ahci_host_priv *hpriv)
217 struct imx_ahci_priv *imxpriv = hpriv->plat_data;
224 if (hpriv->target_pwr) {
225 ret = regulator_enable(hpriv->target_pwr);
259 ret = imx_sata_phy_reset(hpriv);
273 if (hpriv->target_pwr)
274 regulator_disable(hpriv->target_pwr);
279 static void imx_sata_disable(struct ahci_host_priv *hpriv)
281 struct imx_ahci_priv *imxpriv = hpriv->plat_data;
294 if (hpriv->target_pwr)
295 regulator_disable(hpriv->target_pwr);
303 struct ahci_host_priv *hpriv = host->private_data;
304 void __iomem *mmio = hpriv->mmio;
305 struct imx_ahci_priv *imxpriv = hpriv->plat_data;
323 imx_sata_disable(hpriv);
335 struct ahci_host_priv *hpriv = host->private_data;
336 struct imx_ahci_priv *imxpriv = hpriv->plat_data;
531 struct ahci_host_priv *hpriv;
588 hpriv = ahci_platform_get_resources(pdev);
589 if (IS_ERR(hpriv))
590 return PTR_ERR(hpriv);
592 hpriv->plat_data = imxpriv;
598 ret = imx_sata_enable(hpriv);
609 reg_val = readl(hpriv->mmio + HOST_CAP);
612 writel(reg_val, hpriv->mmio + HOST_CAP);
614 reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL);
617 writel(reg_val, hpriv->mmio + HOST_PORTS_IMPL);
621 writel(reg_val, hpriv->mmio + IMX_TIMER1MS);
623 ret = ahci_platform_init_host(pdev, hpriv, &ahci_imx_port_info);
630 imx_sata_disable(hpriv);
638 struct ahci_host_priv *hpriv = host->private_data;
639 struct imx_ahci_priv *imxpriv = hpriv->plat_data;
641 imx_sata_disable(hpriv);
649 struct ahci_host_priv *hpriv = host->private_data;
656 imx_sata_disable(hpriv);
664 struct ahci_host_priv *hpriv = host->private_data;
667 ret = imx_sata_enable(hpriv);