Lines Matching refs:reg_base
86 static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
92 writel(0, reg_base + AHCI_RWCR);
95 sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(19));
96 sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
99 sunxi_clrsetbits(reg_base + AHCI_PHYCS1R,
102 sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(28) | BIT(15));
103 sunxi_clrbits(reg_base + AHCI_PHYCS1R, BIT(19));
104 sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
106 sunxi_clrsetbits(reg_base + AHCI_PHYCS2R,
110 sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19));
114 reg_val = sunxi_getbits(reg_base + AHCI_PHYCS0R, 0x7, 28);
125 sunxi_setbits(reg_base + AHCI_PHYCS2R, (0x1 << 24));
129 reg_val = sunxi_getbits(reg_base + AHCI_PHYCS2R, 0x1, 24);
142 writel(0x7, reg_base + AHCI_RWCR);