Lines Matching refs:port
166 if (dd->port) {
167 set_bit(MTIP_PF_SR_CLEANUP_BIT, &dd->port->flags);
168 wake_up_interruptible(&dd->port->svc_wait);
171 "%s: dd->port is NULL\n", __func__);
220 * @port Pointer to the port data structure.
228 static void mtip_async_complete(struct mtip_port *port,
231 struct driver_data *dd = port->dd;
234 if (unlikely(!dd) || unlikely(!port))
238 dev_warn(&port->dd->pdev->dev,
248 up(&port->cmd_slot_unal);
294 * @port Pointer to the port structure.
300 static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
305 spin_lock(&port->cmd_issue_lock[group]);
307 port->s_active[MTIP_TAG_INDEX(tag)]);
309 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
310 spin_unlock(&port->cmd_issue_lock[group]);
316 * @port Pointer to the port data structure
322 static int mtip_enable_fis(struct mtip_port *port, int enable)
327 tmp = readl(port->mmio + PORT_CMD);
329 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
331 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
334 readl(port->mmio + PORT_CMD);
342 * @port Pointer to the port data structure
348 static int mtip_enable_engine(struct mtip_port *port, int enable)
353 tmp = readl(port->mmio + PORT_CMD);
355 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
357 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
359 readl(port->mmio + PORT_CMD);
364 * Enables the port DMA engine and FIS reception.
369 static inline void mtip_start_port(struct mtip_port *port)
372 mtip_enable_fis(port, 1);
375 mtip_enable_engine(port, 1);
379 * Deinitialize a port by disabling port interrupts, the DMA engine,
382 * @port Pointer to the port structure
387 static inline void mtip_deinit_port(struct mtip_port *port)
389 /* Disable interrupts on this port */
390 writel(0, port->mmio + PORT_IRQ_MASK);
393 mtip_enable_engine(port, 0);
396 mtip_enable_fis(port, 0);
400 * Initialize a port.
402 * This function deinitializes the port by calling mtip_deinit_port() and
404 * clearing the SError register and any pending port interrupts before
405 * re-enabling the default set of port interrupts.
407 * @port Pointer to the port structure.
412 static void mtip_init_port(struct mtip_port *port)
415 mtip_deinit_port(port);
418 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
419 writel((port->command_list_dma >> 16) >> 16,
420 port->mmio + PORT_LST_ADDR_HI);
421 writel((port->rxfis_dma >> 16) >> 16,
422 port->mmio + PORT_FIS_ADDR_HI);
425 writel(port->command_list_dma & 0xFFFFFFFF,
426 port->mmio + PORT_LST_ADDR);
427 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
430 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
433 for (i = 0; i < port->dd->slot_groups; i++)
434 writel(0xFFFFFFFF, port->completed[i]);
436 /* Clear any pending interrupts for this port */
437 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
440 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
441 port->dd->mmio + HOST_IRQ_STAT);
443 /* Enable port interrupts */
444 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
448 * Restart a port
450 * @port Pointer to the port data structure.
455 static void mtip_restart_port(struct mtip_port *port)
460 mtip_enable_engine(port, 0);
464 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
468 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
475 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
476 dev_warn(&port->dd->pdev->dev,
479 if (mtip_hba_reset(port->dd))
480 dev_err(&port->dd->pdev->dev,
487 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
490 writel(readl(port->mmio + PORT_SCR_CTL) |
491 1, port->mmio + PORT_SCR_CTL);
492 readl(port->mmio + PORT_SCR_CTL);
499 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
503 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
504 port->mmio + PORT_SCR_CTL);
505 readl(port->mmio + PORT_SCR_CTL);
509 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
513 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
516 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
517 dev_warn(&port->dd->pdev->dev,
520 mtip_init_port(port);
521 mtip_start_port(port);
536 mtip_init_port(dd->port);
537 mtip_start_port(dd->port);
571 * @port Pointer to the port data structure.
579 static void mtip_completion(struct mtip_port *port,
584 dev_warn(&port->dd->pdev->dev,
590 static void mtip_null_completion(struct mtip_port *port,
595 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
597 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
610 struct mtip_port *port;
622 port = dd->port;
624 set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
626 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
627 test_bit(MTIP_TAG_INTERNAL, port->allocated)) {
632 cmd->comp_func(port, MTIP_TAG_INTERNAL,
643 completed = readl(port->completed[group]);
648 writel(completed, port->completed[group]);
664 cmd->comp_func(port, tag, cmd, 0);
666 dev_err(&port->dd->pdev->dev,
679 /* Restart the port */
681 mtip_restart_port(port);
684 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
685 dd->port->log_buf,
686 dd->port->log_buf_dma, 1);
692 buf = (unsigned char *)dd->port->log_buf;
744 cmd->comp_func(port, tag,
760 mtip_issue_ncq_command(port, tag);
766 dev_warn(&port->dd->pdev->dev,
770 cmd->comp_func(port, tag, cmd, PORT_IRQ_TF_ERR);
772 dev_warn(&port->dd->pdev->dev,
781 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
782 wake_up_interruptible(&port->svc_wait);
788 static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
791 struct driver_data *dd = port->dd;
800 writel(completed, port->completed[group]);
813 command->comp_func(port, tag, command, 0);
838 struct mtip_port *port = dd->port;
841 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
842 (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL])
845 cmd->comp_func(port, MTIP_TAG_INTERNAL, cmd, 0);
862 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
868 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
879 set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags);
880 wake_up_interruptible(&dd->port->svc_wait);
887 struct mtip_port *port = dd->port;
897 /* Acknowledge the interrupt status on the port.*/
898 port_stat = readl(port->mmio + PORT_IRQ_STAT);
899 writel(port_stat, port->mmio + PORT_IRQ_STAT);
901 /* Demux port status */
910 twork->completed = readl(port->completed[i]);
927 mtip_workq_sdbfx(port, 0,
979 static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
982 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
985 static bool mtip_pause_ncq(struct mtip_port *port,
991 reply = port->rxfis + RX_FIS_D2H_REG;
992 task_file_data = readl(port->mmio+PORT_TFDATA);
995 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1001 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1002 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1003 port->ic_pause_timer = jiffies;
1007 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1008 port->ic_pause_timer = jiffies;
1015 mtip_restart_port(port);
1023 * Wait for port to quiesce
1025 * @port Pointer to port data structure
1032 static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
1038 blk_mq_stop_hw_queues(port->dd->queue);
1042 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
1043 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
1049 if (mtip_check_surprise_removal(port->dd->pdev))
1051 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1058 active = readl(port->s_active[0]) & 0xFFFFFFFE;
1059 for (n = 1; n < port->dd->slot_groups; n++)
1060 active |= readl(port->s_active[n]);
1066 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
1069 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
1076 * @port Pointer to the port data structure.
1091 static int mtip_exec_internal_command(struct mtip_port *port,
1103 struct driver_data *dd = port->dd;
1114 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1115 port->ic_pause_timer = 0;
1117 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1118 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1123 if (mtip_quiesce_io(port,
1128 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1129 wake_up_interruptible(&port->svc_wait);
1168 mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL);
1208 while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1221 port_stat = readl(port->mmio + PORT_IRQ_STAT);
1233 writel(port_stat, port->mmio + PORT_IRQ_STAT);
1243 if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
1254 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1258 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1259 wake_up_interruptible(&port->svc_wait);
1295 *timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1297 *timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1320 * into the identify data buffer (@e port->identify) in the
1321 * port data structure.
1323 * port->identify_valid is non-zero.
1325 * @port Pointer to the port structure.
1334 static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1339 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
1349 port->identify_valid = 0;
1352 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1355 if (mtip_exec_internal_command(port,
1358 port->identify_dma,
1374 ata_swap_string(port->identify + 27, 40); /* model string*/
1375 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1376 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1381 port->identify[i] = le16_to_cpu(port->identify[i]);
1386 if (port->identify[128] & 0x4)
1387 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1389 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1393 if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5))
1394 port->dd->trim_supp = true;
1397 port->dd->trim_supp = false;
1400 port->identify_valid = 1;
1405 port->identify,
1419 * @port Pointer to the port structure.
1425 static int mtip_standby_immediate(struct mtip_port *port)
1438 mtip_set_timeout(port->dd, &fis, &timeout, 0);
1441 rv = mtip_exec_internal_command(port,
1452 dev_warn(&port->dd->pdev->dev,
1461 * @port pointer to the port structure.
1470 static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1487 return mtip_exec_internal_command(port,
1500 * @port pointer to the port structure.
1507 static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1522 return mtip_exec_internal_command(port,
1535 * @port pointer to the port structure
1543 static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1552 if (!port->identify_valid) {
1553 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1556 if (!(port->identify[82] & 0x1)) {
1557 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1560 if (!(port->identify[85] & 0x1)) {
1561 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1565 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1566 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1568 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1572 pattr = (struct smart_attr *)(port->smart_buf + 2);
1580 dev_warn(&port->dd->pdev->dev,
1650 if (mtip_exec_internal_command(dd->port,
1676 struct mtip_port *port = dd->port;
1678 raw0 = port->identify[100];
1679 raw1 = port->identify[101];
1680 raw2 = port->identify[102];
1681 raw3 = port->identify[103];
1684 return (bool) !!port->identify_valid;
1690 * @port Pointer to the port data structure.
1695 static void mtip_dump_identify(struct mtip_port *port)
1701 if (!port->identify_valid)
1704 strlcpy(cbuf, (char *)(port->identify+10), 21);
1705 dev_info(&port->dd->pdev->dev,
1708 strlcpy(cbuf, (char *)(port->identify+23), 9);
1709 dev_info(&port->dd->pdev->dev,
1712 strlcpy(cbuf, (char *)(port->identify+27), 41);
1713 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1715 dev_info(&port->dd->pdev->dev, "Security: %04x %s\n",
1716 port->identify[128],
1717 port->identify[128] & 0x4 ? "(LOCKED)" : "");
1719 if (mtip_hw_get_capacity(port->dd, §ors))
1720 dev_info(&port->dd->pdev->dev,
1725 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
1737 dev_info(&port->dd->pdev->dev,
1783 static int exec_drive_task(struct mtip_port *port, u8 *command)
1786 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
1801 mtip_set_timeout(port->dd, &fis, &to, 0);
1814 if (mtip_exec_internal_command(port,
1843 * @param port Pointer to the port data structure.
1853 static int exec_drive_command(struct mtip_port *port, u8 *command,
1867 buf = dmam_alloc_coherent(&port->dd->pdev->dev,
1872 dev_err(&port->dd->pdev->dev,
1893 mtip_set_timeout(port->dd, &fis, &to, 0);
1896 reply = (port->rxfis + RX_FIS_PIO_SETUP);
1898 reply = (port->rxfis + RX_FIS_D2H_REG);
1910 if (mtip_exec_internal_command(port,
1946 dmam_free_coherent(&port->dd->pdev->dev,
2079 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2082 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2085 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
2164 if (mtip_exec_internal_command(dd->port,
2176 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2179 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2182 reply = dd->port->rxfis + RX_FIS_D2H_REG;
2273 if (copy_to_user((void __user *)arg, dd->port->identify,
2289 if (exec_drive_command(dd->port,
2313 if (exec_drive_task(dd->port, drive_command))
2376 struct mtip_port *port = dd->port;
2384 prefetch(&port->flags);
2439 if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) {
2440 set_bit(rq->tag, port->cmds_to_issue);
2441 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
2446 mtip_issue_ncq_command(port, rq->tag);
2492 if (dd->port &&
2493 dd->port->identify &&
2494 dd->port->identify_valid) {
2496 (char *) (dd->port->identify + 10), 21);
2497 status = *(dd->port->identify + 141);
2503 if (dd->port &&
2504 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2522 if (dd->port &&
2523 dd->port->identify &&
2524 dd->port->identify_valid) {
2526 (char *) (dd->port->identify+10), 21);
2527 status = *(dd->port->identify + 141);
2533 if (dd->port &&
2534 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2605 readl(dd->port->s_active[n]));
2612 readl(dd->port->cmd_issue[n]));
2619 readl(dd->port->completed[n]));
2623 readl(dd->port->mmio + PORT_IRQ_STAT));
2633 dd->port->allocated[n/2] >> (32*(n&1));
2635 group_allocated = dd->port->allocated[n];
2645 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2647 group_allocated = dd->port->cmds_to_issue[n];
2679 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2680 dd->port->flags);
2927 if (mtip_get_identify(dd->port, NULL) < 0)
2930 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2971 struct mtip_port *port = dd->port;
2976 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2978 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2984 wait_event_interruptible(port->svc_wait, (port->flags) &&
2985 !(port->flags & MTIP_PF_PAUSE_IO));
2987 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2990 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2994 if (test_bit(MTIP_PF_SR_CLEANUP_BIT, &port->flags))
3003 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) {
3005 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
3008 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags))
3011 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
3017 slot = find_next_bit(port->cmds_to_issue,
3034 mtip_issue_ncq_command(port, slot);
3036 clear_bit(slot, port->cmds_to_issue);
3039 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
3042 if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
3046 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
3084 struct mtip_port *port = dd->port;
3086 if (port->block1)
3088 port->block1, port->block1_dma);
3090 if (port->command_list) {
3092 port->command_list, port->command_list_dma);
3106 struct mtip_port *port = dd->port;
3109 port->block1 =
3111 &port->block1_dma, GFP_KERNEL);
3112 if (!port->block1)
3114 memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ);
3117 port->command_list =
3119 &port->command_list_dma, GFP_KERNEL);
3120 if (!port->command_list) {
3122 port->block1, port->block1_dma);
3123 port->block1 = NULL;
3124 port->block1_dma = 0;
3127 memset(port->command_list, 0, AHCI_CMD_TBL_SZ);
3130 port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET;
3131 port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET;
3132 port->identify = port->block1 + AHCI_IDFY_OFFSET;
3133 port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET;
3134 port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET;
3135 port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET;
3136 port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET;
3137 port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET;
3148 if (mtip_get_identify(dd->port, NULL) < 0)
3151 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3153 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
3156 mtip_dump_identify(dd->port);
3159 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
3160 dd->port->log_buf,
3161 dd->port->log_buf_dma, 1);
3167 buf = (unsigned char *)dd->port->log_buf;
3187 if (mtip_get_smart_attr(dd->port, 242, &attr242))
3224 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
3226 if (!dd->port) {
3228 "Memory allocation: port structure\n");
3234 dd->work[i].port = dd->port;
3242 sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth);
3246 spin_lock_init(&dd->port->cmd_issue_lock[i]);
3248 /* Set the port mmio base address. */
3249 dd->port->mmio = dd->mmio + PORT_OFFSET;
3250 dd->port->dd = dd;
3259 dd->port->s_active[i] =
3260 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3261 dd->port->cmd_issue[i] =
3262 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3263 dd->port->completed[i] =
3264 dd->port->mmio + i*0x80 + PORT_SDBV;
3269 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3304 mtip_init_port(dd->port);
3305 mtip_start_port(dd->port);
3326 init_waitqueue_head(&dd->port->svc_wait);
3345 mtip_deinit_port(dd->port);
3350 kfree(dd->port);
3364 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) &&
3366 if (mtip_standby_immediate(dd->port))
3386 /* de-initialize the port. */
3387 mtip_deinit_port(dd->port);
3402 kfree(dd->port);
3403 dd->port = NULL;
3425 if (!dd->sr && dd->port)
3426 mtip_standby_immediate(dd->port);
3449 if (mtip_standby_immediate(dd->port) != 0) {
3458 mtip_deinit_port(dd->port);
3488 * Enable the port, DMA engine, and FIS reception specific
3491 mtip_init_port(dd->port);
3492 mtip_start_port(dd->port);
3772 if (cmd->unaligned && down_trylock(&dd->port->cmd_slot_unal))
3824 cmd->command_header = dd->port->command_list +
3826 cmd->command_header_dma = dd->port->command_list_dma +
4072 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
4073 wake_up_interruptible(&dd->port->svc_wait);