Cross Reference: /drivers/clk/qcom/clk-pll.c

Lines Matching refs:pll
25 #include "clk-pll.h"
39 	struct clk_pll *pll = to_clk_pll(hw);
44 	ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val);
53 	ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL,
65 	ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N,
74 	ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL,
84 	struct clk_pll *pll = to_clk_pll(hw);
88 	regmap_read(pll->clkr.regmap, pll->mode_reg, &val);
93 	regmap_update_bits(pll->clkr.regmap, pll->mode_reg, mask, 0);
99 	struct clk_pll *pll = to_clk_pll(hw);
104 	regmap_read(pll->clkr.regmap, pll->l_reg, &l);
105 	regmap_read(pll->clkr.regmap, pll->m_reg, &m);
106 	regmap_read(pll->clkr.regmap, pll->n_reg, &n);
119 	if (pll->post_div_width) {
120 		regmap_read(pll->clkr.regmap, pll->config_reg, &config);
121 		config >>= pll->post_div_shift;
122 		config &= BIT(pll->post_div_width) - 1;
146 	struct clk_pll *pll = to_clk_pll(hw);
149 	f = find_freq(pll->freq_tbl, rate);
159 	struct clk_pll *pll = to_clk_pll(hw);
165 	f = find_freq(pll->freq_tbl, rate);
169 	regmap_read(pll->clkr.regmap, pll->mode_reg, &mode);
175 	regmap_update_bits(pll->clkr.regmap, pll->l_reg, 0x3ff, f->l);
176 	regmap_update_bits(pll->clkr.regmap, pll->m_reg, 0x7ffff, f->m);
177 	regmap_update_bits(pll->clkr.regmap, pll->n_reg, 0x7ffff, f->n);
178 	regmap_write(pll->clkr.regmap, pll->config_reg, f->ibits);
195 static int wait_for_pll(struct clk_pll *pll)
200 	const char *name = __clk_get_name(pll->clkr.hw.clk);
202 	/* Wait for pll to enable. */
204 		ret = regmap_read(pll->clkr.regmap, pll->status_reg, &val);
207 		if (val & BIT(pll->status_bit))
235 clk_pll_set_fsm_mode(struct clk_pll *pll, struct regmap *regmap, u8 lock_count)
241 	regmap_update_bits(regmap, pll->mode_reg, PLL_VOTE_FSM_RESET, 0);
247 	regmap_update_bits(regmap, pll->mode_reg, mask, val);
250 	regmap_update_bits(regmap, pll->mode_reg, PLL_VOTE_FSM_ENA,
254 static void clk_pll_configure(struct clk_pll *pll, struct regmap *regmap,
260 	regmap_write(regmap, pll->l_reg, config->l);
261 	regmap_write(regmap, pll->m_reg, config->m);
262 	regmap_write(regmap, pll->n_reg, config->n);
278 	regmap_update_bits(regmap, pll->config_reg, mask, val);
281 void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap,
284 	clk_pll_configure(pll, regmap, config);
286 		clk_pll_set_fsm_mode(pll, regmap, 8);
290 void clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap,
293 	clk_pll_configure(pll, regmap, config);
295 		clk_pll_set_fsm_mode(pll, regmap, 0);