Cross Reference: /drivers/clk/samsung/clk-pll.c

Lines Matching refs:pdiv
77 	u32 pll_con, mdiv, pdiv, sdiv;
82 	pdiv = (pll_con >> PLL2126_PDIV_SHIFT) & PLL2126_PDIV_MASK;
86 	do_div(fvco, (pdiv + 2) << sdiv);
110 	u32 pll_con, mdiv, pdiv, sdiv;
115 	pdiv = (pll_con >> PLL3000_PDIV_SHIFT) & PLL3000_PDIV_MASK;
119 	do_div(fvco, pdiv << sdiv);
147 	u32 mdiv, pdiv, sdiv, pll_con;
152 	pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK;
156 	do_div(fvco, (pdiv << sdiv));
169 	return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv);
199 	__raw_writel(rate->pdiv * PLL35XX_LOCK_FACTOR,
207 			(rate->pdiv << PLL35XX_PDIV_SHIFT) |
250 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;
257 	pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK;
262 	do_div(fvco, (pdiv << sdiv));
277 	return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv ||
308 	__raw_writel(rate->pdiv * PLL36XX_LOCK_FACTOR, pll->lock_reg);
315 			(rate->pdiv << PLL36XX_PDIV_SHIFT) |
364 	u32 mdiv, pdiv, sdiv, pll_con;
369 	pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK;
376 	do_div(fvco, (pdiv << sdiv));
390 	return (old_mdiv != rate->mdiv || old_pdiv != rate->pdiv
427 			(rate->pdiv << PLL45XX_PDIV_SHIFT) |
438 		__raw_writel(rate->pdiv * PLL4502_LOCK_FACTOR, pll->lock_reg);
441 		__raw_writel(rate->pdiv * PLL4508_LOCK_FACTOR, pll->lock_reg);
509 	u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift;
515 	pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;
522 	do_div(fvco, (pdiv << sdiv));
537 	return (old_mdiv != rate->mdiv || old_pdiv != rate->pdiv
570 	lock = rate->pdiv * PLL46XX_LOCK_FACTOR;
581 			(rate->pdiv << PLL46XX_PDIV_SHIFT) |
643 	u32 mdiv, pdiv, sdiv, pll_con;
649 		pdiv = (pll_con >> PLL6552_PDIV_SHIFT_2416) & PLL6552_PDIV_MASK;
652 		pdiv = (pll_con >> PLL6552_PDIV_SHIFT) & PLL6552_PDIV_MASK;
657 	do_div(fvco, (pdiv << sdiv));
683 	u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1;
689 	pdiv = (pll_con0 >> PLL6553_PDIV_SHIFT) & PLL6553_PDIV_MASK;
694 	do_div(fvco, (pdiv << sdiv));
721 	u32 pll_con, mdiv, pdiv, sdiv;
726 	pdiv = (pll_con >> PLLS3C2410_PDIV_SHIFT) & PLLS3C2410_PDIV_MASK;
730 	do_div(fvco, (pdiv + 2) << sdiv);
739 	u32 pll_con, mdiv, pdiv, sdiv;
744 	pdiv = (pll_con >> PLLS3C2410_PDIV_SHIFT) & PLLS3C2410_PDIV_MASK;
748 	do_div(fvco, (pdiv + 2) << sdiv);
775 			(rate->pdiv << PLLS3C2410_PDIV_SHIFT) |
970 	u32 mdiv, pdiv, sdiv, pll_con;
975 	pdiv = (pll_con >> PLL2550XX_P_SHIFT) & PLL2550XX_P_MASK;
979 	do_div(fvco, (pdiv << sdiv));
984 static inline bool samsung_pll2550xx_mp_change(u32 mdiv, u32 pdiv, u32 pll_con)
991 	return mdiv != old_mdiv || pdiv != old_pdiv;
1011 	if (!(samsung_pll2550xx_mp_change(rate->mdiv, rate->pdiv, tmp))) {
1021 	__raw_writel(rate->pdiv * PLL2550XX_LOCK_FACTOR, pll->lock_reg);
1028 			(rate->pdiv << PLL2550XX_P_SHIFT) |
1075 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con2;
1082 	pdiv = (pll_con0 >> PLL2650XX_PDIV_SHIFT) & PLL2650XX_PDIV_MASK;
1087 	do_div(fvco, (pdiv << sdiv));
1115 	pll_con0 |= rate->pdiv << PLL2650XX_PDIV_SHIFT;
1125 	__raw_writel(PLL2650XX_LOCK_FACTOR * rate->pdiv, pll->lock_reg);