Lines Matching refs:evt

68 static void mtk_clkevt_time_stop(struct mtk_clock_event_device *evt, u8 timer)
72 val = readl(evt->gpt_base + TIMER_CTRL_REG(timer));
73 writel(val & ~TIMER_CTRL_ENABLE, evt->gpt_base +
77 static void mtk_clkevt_time_setup(struct mtk_clock_event_device *evt,
80 writel(delay, evt->gpt_base + TIMER_CMP_REG(timer));
83 static void mtk_clkevt_time_start(struct mtk_clock_event_device *evt,
89 writel(GPT_IRQ_ACK(timer), evt->gpt_base + GPT_IRQ_ACK_REG);
91 val = readl(evt->gpt_base + TIMER_CTRL_REG(timer));
102 evt->gpt_base + TIMER_CTRL_REG(timer));
108 struct mtk_clock_event_device *evt = to_mtk_clk(clk);
110 mtk_clkevt_time_stop(evt, GPT_CLK_EVT);
114 mtk_clkevt_time_setup(evt, evt->ticks_per_jiffy, GPT_CLK_EVT);
115 mtk_clkevt_time_start(evt, true, GPT_CLK_EVT);
131 struct mtk_clock_event_device *evt = to_mtk_clk(clk);
133 mtk_clkevt_time_stop(evt, GPT_CLK_EVT);
134 mtk_clkevt_time_setup(evt, event, GPT_CLK_EVT);
135 mtk_clkevt_time_start(evt, false, GPT_CLK_EVT);
142 struct mtk_clock_event_device *evt = dev_id;
145 writel(GPT_IRQ_ACK(GPT_CLK_EVT), evt->gpt_base + GPT_IRQ_ACK_REG);
146 evt->dev.event_handler(&evt->dev);
151 static void mtk_timer_global_reset(struct mtk_clock_event_device *evt)
154 writel(0x0, evt->gpt_base + GPT_IRQ_EN_REG);
156 writel(0x3f, evt->gpt_base + GPT_IRQ_ACK_REG);
160 mtk_timer_setup(struct mtk_clock_event_device *evt, u8 timer, u8 option)
163 evt->gpt_base + TIMER_CTRL_REG(timer));
166 evt->gpt_base + TIMER_CLK_REG(timer));
168 writel(0x0, evt->gpt_base + TIMER_CMP_REG(timer));
171 evt->gpt_base + TIMER_CTRL_REG(timer));
174 static void mtk_timer_enable_irq(struct mtk_clock_event_device *evt, u8 timer)
178 val = readl(evt->gpt_base + GPT_IRQ_EN_REG);
180 evt->gpt_base + GPT_IRQ_EN_REG);
185 struct mtk_clock_event_device *evt;
190 evt = kzalloc(sizeof(*evt), GFP_KERNEL);
191 if (!evt) {
196 evt->dev.name = "mtk_tick";
197 evt->dev.rating = 300;
198 evt->dev.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
199 evt->dev.set_mode = mtk_clkevt_mode;
200 evt->dev.set_next_event = mtk_clkevt_next_event;
201 evt->dev.cpumask = cpu_possible_mask;
203 evt->gpt_base = of_io_request_and_map(node, 0, "mtk-timer");
204 if (IS_ERR(evt->gpt_base)) {
209 evt->dev.irq = irq_of_parse_and_map(node, 0);
210 if (evt->dev.irq <= 0) {
227 if (request_irq(evt->dev.irq, mtk_timer_interrupt,
228 IRQF_TIMER | IRQF_IRQPOLL, "mtk_timer", evt)) {
229 pr_warn("failed to setup irq %d\n", evt->dev.irq);
233 evt->ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
235 mtk_timer_global_reset(evt);
238 mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN);
239 clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC),
243 mtk_timer_setup(evt, GPT_CLK_EVT, TIMER_CTRL_OP_REPEAT);
244 mtk_timer_enable_irq(evt, GPT_CLK_EVT);
246 clockevents_config_and_register(&evt->dev, rate, 0x3,
255 irq_dispose_mapping(evt->dev.irq);
257 iounmap(evt->gpt_base);