Lines Matching refs:ret
107 int ret;
110 ret = clk_set_rate(s3c_freq->armdiv, freq * 1000);
111 if (ret < 0) {
113 freq, ret);
114 return ret;
126 int ret;
135 ret = clk_set_parent(s3c_freq->armclk, s3c_freq->hclk);
136 if (ret < 0) {
137 pr_err("cpufreq: Failed to switch armclk to hclk: %d\n", ret);
138 return ret;
148 ret = regulator_set_voltage(s3c_freq->vddarm,
153 if (ret != 0)
154 pr_err("cpufreq: Failed to set VDDARM: %d\n", ret);
168 int ret;
181 ret = regulator_set_voltage(s3c_freq->vddarm,
184 if (ret != 0) {
185 pr_err("cpufreq: Failed to set VDDARM: %d\n", ret);
186 return ret;
195 ret = s3c2416_cpufreq_set_armdiv(s3c_freq,
197 if (ret < 0) {
199 clk_get_rate(s3c_freq->hclk) / 1000, ret);
200 return ret;
207 ret = clk_set_parent(s3c_freq->armclk, s3c_freq->armdiv);
208 if (ret < 0) {
210 ret);
211 return ret;
224 int idx, ret, to_dvs = 0;
236 ret = -EINVAL;
250 ret = s3c2416_cpufreq_enter_dvs(s3c_freq, idx);
253 ret = s3c2416_cpufreq_leave_dvs(s3c_freq, idx);
256 ret = s3c2416_cpufreq_set_armdiv(s3c_freq, new_freq);
262 return ret;
309 int ret;
324 ret = cpufreq_driver_target(cpufreq_cpu_get(0), FREQ_SLEEP, 0);
325 if (ret < 0)
342 int ret;
349 ret = PTR_ERR(msysclk);
350 pr_err("cpufreq: Unable to obtain msysclk: %d\n", ret);
351 return ret;
385 ret = PTR_ERR(s3c_freq->armdiv);
386 pr_err("cpufreq: Unable to obtain ARMDIV: %d\n", ret);
387 return ret;
392 ret = PTR_ERR(s3c_freq->hclk);
393 pr_err("cpufreq: Unable to obtain HCLK: %d\n", ret);
404 ret = -EINVAL;
410 ret = PTR_ERR(s3c_freq->armclk);
411 pr_err("cpufreq: Unable to obtain ARMCLK: %d\n", ret);
418 ret = PTR_ERR(s3c_freq->vddarm);
419 pr_err("cpufreq: Failed to obtain VDDARM: %d\n", ret);
454 ret = cpufreq_generic_init(policy, s3c_freq->freq_table,
456 if (ret)
474 return ret;