Lines Matching refs:XILINX_VDMA_REG_DMACR
47 #define XILINX_VDMA_REG_DMACR 0x0000
541 (vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &
565 vdma_ctrl_clr(chan, XILINX_VDMA_REG_DMACR, XILINX_VDMA_DMACR_RUNSTOP);
591 vdma_ctrl_set(chan, XILINX_VDMA_REG_DMACR, XILINX_VDMA_DMACR_RUNSTOP);
658 reg = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR);
675 vdma_ctrl_write(chan, XILINX_VDMA_REG_DMACR, reg);
776 vdma_ctrl_set(chan, XILINX_VDMA_REG_DMACR, XILINX_VDMA_DMACR_RESET);
778 tmp = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &
783 tmp = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR) &
789 vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR),
815 vdma_ctrl_set(chan, XILINX_VDMA_REG_DMACR,
1030 dmacr = vdma_ctrl_read(chan, XILINX_VDMA_REG_DMACR);
1067 vdma_ctrl_write(chan, XILINX_VDMA_REG_DMACR, dmacr);
1105 vdma_ctrl_clr(chan, XILINX_VDMA_REG_DMACR,