Cross Reference: /drivers/gpu/drm/exynos/exynos_dp

Lines Matching refs:lane_count
282 	int lane, lane_count, pll_tries, retval;
284 	lane_count = dp->link_train.lane_count;
289 	for (lane = 0; lane < lane_count; lane++)
294 	exynos_dp_set_lane_count(dp, dp->link_train.lane_count);
298 	buf[1] = dp->link_train.lane_count;
305 	for (lane = 0; lane < lane_count; lane++)
331 	for (lane = 0; lane < lane_count; lane++)
336 			lane_count, buf);
349 static int exynos_dp_clock_recovery_ok(u8 link_status[2], int lane_count)
354 	for (lane = 0; lane < lane_count; lane++) {
363 				int lane_count)
371 	for (lane = 0; lane < lane_count; lane++) {
459 	int lane, lane_count;
462 	lane_count = dp->link_train.lane_count;
463 	for (lane = 0; lane < lane_count; lane++) {
482 	int lane, lane_count, retval;
488 	lane_count = dp->link_train.lane_count;
500 	if (exynos_dp_clock_recovery_ok(link_status, lane_count) == 0) {
514 		for (lane = 0; lane < lane_count; lane++) {
542 	for (lane = 0; lane < lane_count; lane++)
547 			DP_TRAINING_LANE0_SET, lane_count,
557 	int lane, lane_count, retval;
563 	lane_count = dp->link_train.lane_count;
570 	if (exynos_dp_clock_recovery_ok(link_status, lane_count)) {
587 	if (!exynos_dp_channel_eq_ok(link_status, link_align, lane_count)) {
599 		dp->link_train.lane_count = reg;
601 			dp->link_train.lane_count);
619 	for (lane = 0; lane < lane_count; lane++)
624 			lane_count, dp->link_train.training_lane);
643 					u8 *lane_count)
652 	*lane_count = DPCD_MAX_LANE_COUNT(data);
667 	exynos_dp_get_max_rx_lane_count(dp, &dp->link_train.lane_count);
676 	if (dp->link_train.lane_count == 0) {
678 			dp->link_train.lane_count);
679 		dp->link_train.lane_count = (u8)LANE_COUNT1;
683 	if (dp->link_train.lane_count > max_lane)
684 		dp->link_train.lane_count = max_lane;
906 	ret = exynos_dp_set_link_train(dp, dp->video_info->lane_count,
917 	exynos_dp_set_lane_count(dp, dp->video_info->lane_count);
1205 				&dp_video_config->lane_count)) {