Cross Reference: /drivers/gpu/drm/gma500/intel

Lines Matching refs:panel_fixed_mode
159 static void fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
162 	panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
164 	panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
166 	panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
168 	panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
171 	panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
173 	panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
175 	panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
177 	panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
179 	panel_fixed_mode->clock = dvo_timing->clock * 10;
180 	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
183 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
185 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
188 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
190 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
193 	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
194 		panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
195 	if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
196 		panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
198 	drm_mode_set_name(panel_fixed_mode);
237 	struct drm_display_mode *panel_fixed_mode;
261 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode),
263 	if (panel_fixed_mode == NULL) {
269 	fill_detail_timing_data(panel_fixed_mode, dvo_timing);
271 	if (panel_fixed_mode->htotal > 0 && panel_fixed_mode->vtotal > 0) {
272 		dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode;
273 		drm_mode_debug_printmodeline(panel_fixed_mode);
277 		kfree(panel_fixed_mode);
288 	struct drm_display_mode *panel_fixed_mode;
300 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
302 	if (!panel_fixed_mode)
305 	fill_detail_timing_data(panel_fixed_mode,
308 	dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode;