Cross Reference: /drivers/gpu/drm/msm/hdmi/hdmi_phy

Lines Matching refs:hdmi
23 #include "hdmi.h"
27 	struct hdmi *hdmi;
42  * To get the parent clock setup properly, we need to plug in hdmi pll
221 	struct hdmi *hdmi = phy_8960->hdmi;
228 	hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG2, 0x8d);
229 	hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG0, 0x10);
230 	hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG1, 0x1a);
240 	hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG2, 0x0d);
242 	val = hdmi_read(hdmi, REG_HDMI_8960_PHY_REG12);
245 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG12, val);
253 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG12, val);
254 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG2,  0x3f);
256 	val = hdmi_read(hdmi, REG_HDMI_8960_PHY_REG12);
258 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG12, val);
263 	val = hdmi_read(hdmi, REG_HDMI_8960_PHY_PLL_PWRDN_B);
266 	hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_PWRDN_B, val);
267 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG2, 0x80);
273 		val = hdmi_read(hdmi, REG_HDMI_8960_PHY_PLL_STATUS0);
287 		hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG2, 0x8d);
289 		hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_LOCKDET_CFG2, 0x0d);
306 	struct hdmi *hdmi = phy_8960->hdmi;
311 	val = hdmi_read(hdmi, REG_HDMI_8960_PHY_REG12);
313 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG12, val);
315 	val = hdmi_read(hdmi, REG_HDMI_8960_PHY_PLL_PWRDN_B);
318 	hdmi_write(hdmi, REG_HDMI_8960_PHY_PLL_PWRDN_B, val);
350 	struct hdmi *hdmi = phy_8960->hdmi;
357 		hdmi_write(hdmi, pll_rate->conf[i].reg, pll_rate->conf[i].val);
398 	struct hdmi *hdmi = phy_8960->hdmi;
401 	val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL);
405 		hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
409 		hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
415 		hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
419 		hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
427 		hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
431 		hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
437 		hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
441 		hdmi_write(hdmi, REG_HDMI_PHY_CTRL,
450 	struct hdmi *hdmi = phy_8960->hdmi;
454 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG2, 0x00);
455 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG0, 0x1b);
456 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG1, 0xf2);
457 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG4, 0x00);
458 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG5, 0x00);
459 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG6, 0x00);
460 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG7, 0x00);
461 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG8, 0x00);
462 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG9, 0x00);
463 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG10, 0x00);
464 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG11, 0x00);
465 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG3, 0x20);
471 	struct hdmi *hdmi = phy_8960->hdmi;
475 	hdmi_write(hdmi, REG_HDMI_8960_PHY_REG2, 0x7f);
485 struct hdmi_phy *hdmi_phy_8960_init(struct hdmi *hdmi)
509 	phy_8960->hdmi = hdmi;
513 	phy_8960->pll = devm_clk_register(hdmi->dev->dev, &phy_8960->pll_hw);