Lines Matching defs:device
45 #include <engine/device.h>
58 gm100_identify(struct nouveau_device *device)
60 switch (device->chipset) {
62 device->cname = "GM107";
63 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
64 device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
65 device->oclass[NVDEV_SUBDEV_I2C ] = nvd0_i2c_oclass;
66 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
67 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass;
68 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
69 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
70 device->oclass[NVDEV_SUBDEV_DEVINIT] = gm107_devinit_oclass;
71 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
72 device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
73 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
74 device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
75 device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
76 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
77 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
78 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
79 device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
80 device->oclass[NVDEV_SUBDEV_PWR ] = nv108_pwr_oclass;
83 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
85 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
86 device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
87 device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
88 device->oclass[NVDEV_ENGINE_GR ] = gm107_graph_oclass;
89 device->oclass[NVDEV_ENGINE_DISP ] = gm107_disp_oclass;
90 device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
92 device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
94 device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
96 device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
97 device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
98 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
102 nv_fatal(device, "unknown Maxwell chipset\n");