Lines Matching defs:device
45 #include <engine/device.h>
58 nve0_identify(struct nouveau_device *device)
60 switch (device->chipset) {
62 device->cname = "GK104";
63 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
64 device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
65 device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
66 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
67 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass;
68 device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
69 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
70 device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
71 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
72 device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
73 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
74 device->oclass[NVDEV_SUBDEV_FB ] = nve0_fb_oclass;
75 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
76 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
77 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
78 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
79 device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
80 device->oclass[NVDEV_SUBDEV_PWR ] = gk104_pwr_oclass;
81 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
82 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
83 device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass;
84 device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
85 device->oclass[NVDEV_ENGINE_GR ] = nve4_graph_oclass;
86 device->oclass[NVDEV_ENGINE_DISP ] = nve0_disp_oclass;
87 device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
88 device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
89 device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
90 device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
91 device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
92 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
93 device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
96 device->cname = "GK107";
97 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
98 device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
99 device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
100 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
101 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass;
102 device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
103 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
104 device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
105 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
106 device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
107 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
108 device->oclass[NVDEV_SUBDEV_FB ] = nve0_fb_oclass;
109 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
110 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
111 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
112 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
113 device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
114 device->oclass[NVDEV_SUBDEV_PWR ] = nvd0_pwr_oclass;
115 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
116 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
117 device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass;
118 device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
119 device->oclass[NVDEV_ENGINE_GR ] = nve4_graph_oclass;
120 device->oclass[NVDEV_ENGINE_DISP ] = nve0_disp_oclass;
121 device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
122 device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
123 device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
124 device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
125 device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
126 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
127 device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
130 device->cname = "GK106";
131 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
132 device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
133 device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
134 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
135 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass;
136 device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
137 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
138 device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
139 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
140 device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
141 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
142 device->oclass[NVDEV_SUBDEV_FB ] = nve0_fb_oclass;
143 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
144 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
145 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
146 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
147 device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
148 device->oclass[NVDEV_SUBDEV_PWR ] = gk104_pwr_oclass;
149 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
150 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
151 device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass;
152 device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
153 device->oclass[NVDEV_ENGINE_GR ] = nve4_graph_oclass;
154 device->oclass[NVDEV_ENGINE_DISP ] = nve0_disp_oclass;
155 device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
156 device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
157 device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
158 device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
159 device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
160 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
161 device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
164 device->cname = "GK20A";
165 device->oclass[NVDEV_SUBDEV_CLOCK ] = &gk20a_clock_oclass;
166 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
167 device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
168 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
169 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
170 device->oclass[NVDEV_SUBDEV_FB ] = gk20a_fb_oclass;
171 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
172 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
173 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
174 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
175 device->oclass[NVDEV_SUBDEV_BAR ] = &gk20a_bar_oclass;
176 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
177 device->oclass[NVDEV_ENGINE_FIFO ] = gk20a_fifo_oclass;
178 device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
179 device->oclass[NVDEV_ENGINE_GR ] = gk20a_graph_oclass;
180 device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
181 device->oclass[NVDEV_ENGINE_PERFMON] = &nve0_perfmon_oclass;
184 device->cname = "GK110";
185 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
186 device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
187 device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
188 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
189 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass;
190 device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
191 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
192 device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
193 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
194 device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
195 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
196 device->oclass[NVDEV_SUBDEV_FB ] = nve0_fb_oclass;
197 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
198 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
199 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
200 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
201 device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
202 device->oclass[NVDEV_SUBDEV_PWR ] = nvd0_pwr_oclass;
203 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
204 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
205 device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass;
206 device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
207 device->oclass[NVDEV_ENGINE_GR ] = nvf0_graph_oclass;
208 device->oclass[NVDEV_ENGINE_DISP ] = nvf0_disp_oclass;
209 device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
210 device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
211 device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
212 device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
213 device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
214 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
215 device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass;
218 device->cname = "GK110B";
219 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
220 device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
221 device->oclass[NVDEV_SUBDEV_I2C ] = nvd0_i2c_oclass;
222 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
223 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass;
224 device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
225 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
226 device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
227 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
228 device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
229 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
230 device->oclass[NVDEV_SUBDEV_FB ] = nve0_fb_oclass;
231 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
232 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
233 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
234 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
235 device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
236 device->oclass[NVDEV_SUBDEV_PWR ] = nvd0_pwr_oclass;
237 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
238 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
239 device->oclass[NVDEV_ENGINE_FIFO ] = nve0_fifo_oclass;
240 device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
241 device->oclass[NVDEV_ENGINE_GR ] = gk110b_graph_oclass;
242 device->oclass[NVDEV_ENGINE_DISP ] = nvf0_disp_oclass;
243 device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
244 device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
245 device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
246 device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
247 device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
248 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
249 device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass;
252 device->cname = "GK208";
253 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
254 device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
255 device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
256 device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
257 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass;
258 device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
259 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
260 device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
261 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
262 device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
263 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
264 device->oclass[NVDEV_SUBDEV_FB ] = nve0_fb_oclass;
265 device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
266 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
267 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
268 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
269 device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
270 device->oclass[NVDEV_SUBDEV_PWR ] = nv108_pwr_oclass;
271 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
272 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
273 device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
274 device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
275 device->oclass[NVDEV_ENGINE_GR ] = nv108_graph_oclass;
276 device->oclass[NVDEV_ENGINE_DISP ] = nvf0_disp_oclass;
277 device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
278 device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
279 device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
280 device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
281 device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
282 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
285 nv_fatal(device, "unknown Kepler chipset\n");