Cross Reference: /drivers/gpu/drm/radeon/rv6xx

Lines Matching refs:new_state
970 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
974 					new_state->low.vddc,
1049 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1051 	rv6xx_calculate_engine_speed_stepping_parameters(rdev, new_state);
1052 	rv6xx_calculate_memory_clock_stepping_parameters(rdev, new_state);
1053 	rv6xx_calculate_voltage_stepping_parameters(rdev, new_state);
1054 	rv6xx_calculate_ap(rdev, new_state);
1203 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1207 	safe_voltage = (new_state->low.vddc >= old_state->low.vddc) ?
1208 		new_state->low.vddc : old_state->low.vddc;
1233 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1236 	if ((new_state->low.flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) &&
1247 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1250 	if ((new_state->low.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) !=
1309 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1312 	if (new_state->low.vddc > old_state->low.vddc)
1315 					     new_state->low.vddc);
1324 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1327 	if (new_state->low.vddc < old_state->low.vddc)
1330 					     new_state->low.vddc);
1422 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1428 			     new_state->low.sclk,
1435 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1440 				   new_state->low.sclk,
1455 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1461 			     new_state->low.sclk,
1462 			     new_state->medium.sclk,
1466 			     new_state->medium.sclk,
1467 			     new_state->high.sclk,
1498 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1505 		if (!(new_state->low.flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2))
1516 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1523 	if (new_state->high.sclk >= current_state->high.sclk)
1533 	struct rv6xx_ps *new_state = rv6xx_get_ps(new_ps);
1540 	if (new_state->high.sclk < current_state->high.sclk)