Cross Reference: /drivers/gpu/drm/radeon/rv770

Lines Matching defs:pl
228 		       struct rv7xx_pl *pl)
230 	return (pl->flags & ATOM_PPLIB_R600_FLAGS_LOWPOWER) ?
613 					    struct rv7xx_pl *pl,
621 		((pl->flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? 1 : 0) : 0;
622 	level->gen2XSP  = (pl->flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? 1 : 0;
623 	level->backbias = (pl->flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? 1 : 0;
627 		ret = rv740_populate_sclk_value(rdev, pl->sclk,
630 		ret = rv730_populate_sclk_value(rdev, pl->sclk,
633 		ret = rv770_populate_sclk_value(rdev, pl->sclk,
640 			if (pl->mclk <= pi->mclk_strobe_mode_threshold)
642 					rv740_get_mclk_frequency_ratio(pl->mclk) | 0x10;
646 			if (pl->mclk > pi->mclk_edc_enable_threshold)
651 		ret = rv740_populate_mclk_value(rdev, pl->sclk,
652 						pl->mclk, &level->mclk);
654 		ret = rv730_populate_mclk_value(rdev, pl->sclk,
655 						pl->mclk, &level->mclk);
657 		ret = rv770_populate_mclk_value(rdev, pl->sclk,
658 						pl->mclk, &level->mclk);
662 	ret = rv770_populate_vddc_value(rdev, pl->vddc,
667 	ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd);
2178 	struct rv7xx_pl *pl;
2182 		pl = &ps->low;
2185 		pl = &ps->medium;
2189 		pl = &ps->high;
2199 		pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC);
2200 		pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI);
2201 		pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags);
2208 		pl->vddc = le16_to_cpu(clock_info->r600.usVDDC);
2209 		pl->flags = le32_to_cpu(clock_info->r600.ulFlags);
2212 	pl->mclk = mclk;
2213 	pl->sclk = sclk;
2216 	if (pl->vddc == 0xff01) {
2218 			pl->vddc = pi->max_vddc;
2222 		pi->acpi_vddc = pl->vddc;
2224 			eg_pi->acpi_vddci = pl->vddci;
2234 			eg_pi->ulv.pl = pl;
2238 	if (pi->min_vddc_in_table > pl->vddc)
2239 		pi->min_vddc_in_table = pl->vddc;
2241 	if (pi->max_vddc_in_table < pl->vddc)
2242 		pi->max_vddc_in_table = pl->vddc;
2248 		pl->mclk = rdev->clock.default_mclk;
2249 		pl->sclk = rdev->clock.default_sclk;
2250 		pl->vddc = vddc;
2251 		pl->vddci = vddci;
2256 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk;
2257 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;
2258 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;
2259 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;
2432 	struct rv7xx_pl *pl;
2438 		pl = &ps->low;
2440 		       pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2441 		pl = &ps->medium;
2443 		       pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2444 		pl = &ps->high;
2446 		       pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2448 		pl = &ps->low;
2450 		       pl->sclk, pl->mclk, pl->vddc);
2451 		pl = &ps->medium;
2453 		       pl->sclk, pl->mclk, pl->vddc);
2454 		pl = &ps->high;
2456 		       pl->sclk, pl->mclk, pl->vddc);
2466 	struct rv7xx_pl *pl;
2475 			pl = &ps->low;
2477 			pl = &ps->medium;
2479 			pl = &ps->high;
2483 				   current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2486 				   current_index, pl->sclk, pl->mclk, pl->vddc);