Lines Matching refs:dd
77 * to be of that type, and dd->i2c_chain_type is set to the index+1
107 * @dd: the infinipath device
114 static int i2c_gpio_set(struct ipath_devdata *dd,
121 gpioval = &dd->ipath_gpio_out;
124 dir_mask = dd->ipath_gpio_scl;
125 out_mask = (1UL << dd->ipath_gpio_scl_num);
127 dir_mask = dd->ipath_gpio_sda;
128 out_mask = (1UL << dd->ipath_gpio_sda_num);
131 spin_lock_irqsave(&dd->ipath_gpio_lock, flags);
134 dd->ipath_extctrl &= ~dir_mask;
137 dd->ipath_extctrl |= dir_mask;
139 ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, dd->ipath_extctrl);
147 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_out, *gpioval);
148 spin_unlock_irqrestore(&dd->ipath_gpio_lock, flags);
155 * @dd: the infinipath device
162 static int i2c_gpio_get(struct ipath_devdata *dd,
178 mask = dd->ipath_gpio_scl;
180 mask = dd->ipath_gpio_sda;
182 spin_lock_irqsave(&dd->ipath_gpio_lock, flags);
183 dd->ipath_extctrl &= ~mask;
184 ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, dd->ipath_extctrl);
189 read_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extstatus);
190 spin_unlock_irqrestore(&dd->ipath_gpio_lock, flags);
205 * @dd: the infinipath device
212 static void i2c_wait_for_writes(struct ipath_devdata *dd)
214 (void)ipath_read_kreg32(dd, dd->ipath_kregs->kr_scratch);
218 static void scl_out(struct ipath_devdata *dd, u8 bit)
221 i2c_gpio_set(dd, i2c_line_scl, bit ? i2c_line_high : i2c_line_low);
223 i2c_wait_for_writes(dd);
226 static void sda_out(struct ipath_devdata *dd, u8 bit)
228 i2c_gpio_set(dd, i2c_line_sda, bit ? i2c_line_high : i2c_line_low);
230 i2c_wait_for_writes(dd);
233 static u8 sda_in(struct ipath_devdata *dd, int wait)
237 if (i2c_gpio_get(dd, i2c_line_sda, &bit))
241 i2c_wait_for_writes(dd);
248 * @dd: the infinipath device
250 static int i2c_ackrcv(struct ipath_devdata *dd)
256 ack_received = sda_in(dd, 1);
257 scl_out(dd, i2c_line_high);
258 ack_received = sda_in(dd, 1) == 0;
259 scl_out(dd, i2c_line_low);
265 * @dd: the infinipath device
269 static int rd_byte(struct ipath_devdata *dd)
277 scl_out(dd, i2c_line_high);
278 data |= sda_in(dd, 0);
279 scl_out(dd, i2c_line_low);
286 * @dd: the infinipath device
291 static int wr_byte(struct ipath_devdata *dd, u8 data)
298 sda_out(dd, bit);
299 scl_out(dd, i2c_line_high);
300 scl_out(dd, i2c_line_low);
302 return (!i2c_ackrcv(dd)) ? 1 : 0;
305 static void send_ack(struct ipath_devdata *dd)
307 sda_out(dd, i2c_line_low);
308 scl_out(dd, i2c_line_high);
309 scl_out(dd, i2c_line_low);
310 sda_out(dd, i2c_line_high);
315 * @dd: the infinipath device
320 static int i2c_startcmd(struct ipath_devdata *dd, u8 offset_dir)
325 sda_out(dd, i2c_line_high);
326 scl_out(dd, i2c_line_high);
327 sda_out(dd, i2c_line_low);
328 scl_out(dd, i2c_line_low);
331 res = wr_byte(dd, offset_dir);
341 * @dd: the infinipath device
345 static void stop_cmd(struct ipath_devdata *dd)
347 scl_out(dd, i2c_line_low);
348 sda_out(dd, i2c_line_low);
349 scl_out(dd, i2c_line_high);
350 sda_out(dd, i2c_line_high);
356 * @dd: the infinipath device
359 static int eeprom_reset(struct ipath_devdata *dd)
362 u64 *gpioval = &dd->ipath_gpio_out;
366 spin_lock_irqsave(&dd->ipath_gpio_lock, flags);
368 dd->ipath_extctrl = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extctrl);
369 *gpioval = ipath_read_kreg64(dd, dd->ipath_kregs->kr_gpio_out);
370 spin_unlock_irqrestore(&dd->ipath_gpio_lock, flags);
380 scl_out(dd, i2c_line_low);
381 sda_out(dd, i2c_line_high);
385 scl_out(dd, i2c_line_high);
388 if (sda_in(dd, 0)) {
389 sda_out(dd, i2c_line_low);
390 scl_out(dd, i2c_line_low);
392 scl_out(dd, i2c_line_high);
393 sda_out(dd, i2c_line_high);
398 scl_out(dd, i2c_line_low);
412 static int i2c_probe(struct ipath_devdata *dd, int devaddr)
416 ret = eeprom_reset(dd);
418 ipath_dev_err(dd, "Failed reset probing device 0x%02X\n",
426 ret = i2c_startcmd(dd, devaddr | READ_CMD);
437 data = rd_byte(dd);
438 stop_cmd(dd);
453 static struct i2c_chain_desc *ipath_i2c_type(struct ipath_devdata *dd)
458 idx = dd->ipath_i2c_chain_type - 1;
465 if (!i2c_probe(dd, i2c_chains[idx].probe_dev))
475 eeprom_reset(dd);
480 dd->ipath_i2c_chain_type = idx + 1;
485 static int ipath_eeprom_internal_read(struct ipath_devdata *dd,
493 icd = ipath_i2c_type(dd);
501 ret = i2c_startcmd(dd, eeprom_offset);
505 if (i2c_startcmd(dd, icd->eeprom_dev | WRITE_CMD)) {
507 stop_cmd(dd);
511 ret = wr_byte(dd, eeprom_offset);
512 stop_cmd(dd);
514 ipath_dev_err(dd, "Failed to write EEPROM address\n");
518 ret = i2c_startcmd(dd, icd->eeprom_dev | READ_CMD);
522 stop_cmd(dd);
533 *bp++ = rd_byte(dd);
536 send_ack(dd);
539 stop_cmd(dd);
547 static int ipath_eeprom_internal_write(struct ipath_devdata *dd, u8 eeprom_offset,
557 icd = ipath_i2c_type(dd);
563 if (i2c_startcmd(dd,
571 if (i2c_startcmd(dd, icd->eeprom_dev | WRITE_CMD)) {
575 ret = wr_byte(dd, eeprom_offset);
577 ipath_dev_err(dd, "Failed to write EEPROM "
588 if (wr_byte(dd, *bp++)) {
596 stop_cmd(dd);
610 while (i2c_startcmd(dd, icd->eeprom_dev | READ_CMD)) {
611 stop_cmd(dd);
619 rd_byte(dd);
620 stop_cmd(dd);
627 stop_cmd(dd);
636 * @dd: the infinipath device
641 int ipath_eeprom_read(struct ipath_devdata *dd, u8 eeprom_offset,
646 ret = mutex_lock_interruptible(&dd->ipath_eep_lock);
648 ret = ipath_eeprom_internal_read(dd, eeprom_offset, buff, len);
649 mutex_unlock(&dd->ipath_eep_lock);
657 * @dd: the infinipath device
662 int ipath_eeprom_write(struct ipath_devdata *dd, u8 eeprom_offset,
667 ret = mutex_lock_interruptible(&dd->ipath_eep_lock);
669 ret = ipath_eeprom_internal_write(dd, eeprom_offset, buff, len);
670 mutex_unlock(&dd->ipath_eep_lock);
701 * @dd: the infinipath device
706 void ipath_get_eeprom_info(struct ipath_devdata *dd)
713 int t = dd->ipath_unit;
718 dd->ipath_guid = dd0->ipath_guid;
719 bguid = (u8 *) & dd->ipath_guid;
727 dd,
731 dd->ipath_guid = 0;
738 dd->ipath_nguid = 1;
743 (unsigned long long) be64_to_cpu(dd->ipath_guid));
754 ipath_dev_err(dd, "Couldn't allocate memory to read %u "
759 mutex_lock(&dd->ipath_eep_lock);
760 eep_stat = ipath_eeprom_internal_read(dd, 0, buf, len);
761 mutex_unlock(&dd->ipath_eep_lock);
764 ipath_dev_err(dd, "Failed reading GUID from eeprom\n");
771 dev_info(&dd->pcidev->dev, "Bad I2C flash checksum: "
777 ipath_dev_err(dd, "Invalid GUID %llx from flash; "
786 dev_info(&dd->pcidev->dev, "Warning, GUID %llx is "
804 dd->ipath_guid = guid;
805 dd->ipath_nguid = ifp->if_numguid;
816 char *snp = dd->ipath_serial;
821 len = (sizeof dd->ipath_serial) - len;
827 memcpy(dd->ipath_serial, ifp->if_serial,
830 ipath_dev_err(dd, "Board SN %s did not pass functional "
831 "test: %s\n", dd->ipath_serial,
835 (unsigned long long) be64_to_cpu(dd->ipath_guid));
837 memcpy(&dd->ipath_eep_st_errs, &ifp->if_errcntp, IPATH_EEP_LOG_CNT);
843 atomic_set(&dd->ipath_active_time, 0);
844 dd->ipath_eep_hrs = ifp->if_powerhour[0] | (ifp->if_powerhour[1] << 8);
854 * @dd: the infinipath device
865 int ipath_update_eeprom_log(struct ipath_devdata *dd)
878 if (dd->ipath_eep_st_new_errs[idx]) {
883 new_time = atomic_read(&dd->ipath_active_time);
898 ipath_dev_err(dd, "Couldn't allocate memory to read %u "
906 ret = mutex_lock_interruptible(&dd->ipath_eep_lock);
908 ipath_dev_err(dd, "Unable to acquire EEPROM for logging\n");
911 ret = ipath_eeprom_internal_read(dd, 0, buf, len);
913 mutex_unlock(&dd->ipath_eep_lock);
914 ipath_dev_err(dd, "Unable read EEPROM for logging\n");
921 mutex_unlock(&dd->ipath_eep_lock);
922 ipath_dev_err(dd, "EEPROM cks err (0x%02X, S/B 0x%02X)\n",
928 spin_lock_irqsave(&dd->ipath_eep_st_lock, flags);
930 int new_val = dd->ipath_eep_st_new_errs[idx];
952 dd->ipath_eep_st_errs[idx] = new_val;
953 dd->ipath_eep_st_new_errs[idx] = 0;
965 atomic_sub((new_hrs * 3600), &dd->ipath_active_time);
966 new_hrs += dd->ipath_eep_hrs;
969 dd->ipath_eep_hrs = new_hrs;
985 spin_unlock_irqrestore(&dd->ipath_eep_st_lock, flags);
989 ret = ipath_eeprom_internal_write(dd, 0, buf, hi_water + 1);
991 mutex_unlock(&dd->ipath_eep_lock);
993 ipath_dev_err(dd, "Failed updating EEPROM\n");
1005 * @dd: the infinipath device
1015 void ipath_inc_eeprom_err(struct ipath_devdata *dd, u32 eidx, u32 incr)
1020 spin_lock_irqsave(&dd->ipath_eep_st_lock, flags);
1021 new_val = dd->ipath_eep_st_new_errs[eidx] + incr;
1024 dd->ipath_eep_st_new_errs[eidx] = new_val;
1025 spin_unlock_irqrestore(&dd->ipath_eep_st_lock, flags);
1029 static int ipath_tempsense_internal_read(struct ipath_devdata *dd, u8 regnum)
1036 icd = ipath_i2c_type(dd);
1046 if (i2c_startcmd(dd, icd->temp_dev | WRITE_CMD)) {
1048 stop_cmd(dd);
1052 ret = wr_byte(dd, regnum);
1053 stop_cmd(dd);
1055 ipath_dev_err(dd, "Failed tempsense WR command %02X\n",
1060 if (i2c_startcmd(dd, icd->temp_dev | READ_CMD)) {
1062 stop_cmd(dd);
1069 ret = rd_byte(dd);
1070 stop_cmd(dd);
1080 * @dd: the infinipath device
1085 int ipath_tempsense_read(struct ipath_devdata *dd, u8 regnum)
1096 ret = mutex_lock_interruptible(&dd->ipath_eep_lock);
1098 ret = ipath_tempsense_internal_read(dd, regnum);
1099 mutex_unlock(&dd->ipath_eep_lock);
1111 static int ipath_tempsense_internal_write(struct ipath_devdata *dd,
1117 icd = ipath_i2c_type(dd);
1126 if (i2c_startcmd(dd, icd->temp_dev | WRITE_CMD)) {
1128 stop_cmd(dd);
1132 ret = wr_byte(dd, regnum);
1134 stop_cmd(dd);
1135 ipath_dev_err(dd, "Failed to write tempsense command %02X\n",
1140 ret = wr_byte(dd, data);
1141 stop_cmd(dd);
1142 ret = i2c_startcmd(dd, icd->temp_dev | READ_CMD);
1144 ipath_dev_err(dd, "Failed tempsense data wrt to %02X\n",
1157 * @dd: the infinipath device
1163 int ipath_tempsense_write(struct ipath_devdata *dd, u8 regnum, u8 data)
1170 ret = mutex_lock_interruptible(&dd->ipath_eep_lock);
1172 ret = ipath_tempsense_internal_write(dd, regnum, data);
1173 mutex_unlock(&dd->ipath_eep_lock);