Cross Reference: /drivers/infiniband/hw/ipath/ipath

Lines Matching refs:ipath_kregs
204 static const struct ipath_kregs ipath_ht_kregs = {
454 		ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
510 	hwerrs = ipath_read_kreg64(dd, dd->ipath_kregs->kr_hwerrstatus);
532 	ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
559 	ctrl = ipath_read_kreg32(dd, dd->ipath_kregs->kr_control);
610 		ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
627 		ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
637 		ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
756 		ipath_read_kreg32(dd, dd->ipath_kregs->kr_pagealign);
976 		ipath_write_kreg(dd, dd->ipath_kregs->kr_interruptconfig,
1148 	ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, extctl);
1158 	dd->ipath_kregs = &ipath_ht_kregs;
1302 	extsval = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extstatus);
1360 	if (ipath_read_kreg64(dd, dd->ipath_kregs->kr_hwerrstatus) &
1365 		ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
1369 	val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesconfig0);
1370 	config1 = ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesconfig1);
1376 		   ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesstatus),
1378 		   ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig));
1384 	ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0, val);
1394 		ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0,
1399 		val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1415 		ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0,
1419 	val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
1435 		ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
1437 	val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesconfig0);
1445 	ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig1, config1);
1451 		   ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesstatus),
1453 		   ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig));
1465 	u64 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_serdesconfig0);
1470 	ipath_write_kreg(dd, dd->ipath_kregs->kr_serdesconfig0, val);
1660 		ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1707 		ipath_read_kreg32(dd, dd->ipath_kregs->kr_portcnt);
1709 		ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
1835 	prev_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
1838 	ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
1840 	ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
1841 	ipath_read_kreg32(dd, dd->ipath_kregs->kr_scratch);
1842 	ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, prev_val);
1843 	ipath_write_kreg(dd, dd->ipath_kregs->kr_control,