Lines Matching refs:level
32 * @levels_altered: Record of altered level bits
261 * Earlier versions without these registers should use SoC level IRQ masking
308 * HWMASKEXT registers, or a SoC level means of masking IRQs. Instead the IRQ is
327 * have HWMASKEXT registers, or a SoC level means of masking IRQs. Instead the
364 * meta_intc_unmask_level_irq_nomask() - unmask a level irq by revectoring
368 * have HWMASKEXT registers, or a SoC level means of masking IRQs. Instead the
371 * The retriggering done by this function is specific to level interrupts.
398 * handler depending on whether the irq is edge or level sensitive (the polarity
412 unsigned int level;
424 level = metag_in32(level_addr);
426 level |= bit;
428 level &= ~bit;
429 metag_out32(level, level_addr);
536 /* public edge/level irq chips which SoCs can override */
567 * edge/level flow type. These registers will have been set when the irq type is
657 /* save level state if any IRQ levels altered */
733 /* restore level state */