Lines Matching refs:cs
64 static void Amd7930_new_ph(struct IsdnCardState *cs);
102 WriteWordAmd7930(struct IsdnCardState *cs, BYTE reg, WORD val)
104 wByteAMD(cs, 0x00, reg);
105 wByteAMD(cs, 0x01, LOBYTE(val));
106 wByteAMD(cs, 0x01, HIBYTE(val));
110 ReadWordAmd7930(struct IsdnCardState *cs, BYTE reg)
115 res = rByteAMD(cs, reg);
116 res += 256 * rByteAMD(cs, reg);
120 wByteAMD(cs, 0x00, reg);
121 res = rByteAMD(cs, 0x01);
122 res += 256 * rByteAMD(cs, 0x01);
129 Amd7930_ph_command(struct IsdnCardState *cs, u_char command, char *s)
131 if (cs->debug & L1_DEB_ISAC)
132 debugl1(cs, "AMD7930: %s: ph_command 0x%02X", s, command);
134 cs->dc.amd7930.lmr1 = command;
135 wByteAMD(cs, 0xA3, command);
160 Amd7930_get_state(struct IsdnCardState *cs) {
161 BYTE lsr = rByteAMD(cs, 0xA1);
162 cs->dc.amd7930.ph_state = (lsr & 0x7) + 2;
163 Amd7930_new_ph(cs);
169 Amd7930_new_ph(struct IsdnCardState *cs)
171 u_char index = stateHelper[cs->dc.amd7930.old_state] * 8 + stateHelper[cs->dc.amd7930.ph_state] - 1;
174 if (cs->debug & L1_DEB_ISAC)
175 debugl1(cs, "AMD7930: new_ph %d, old_ph %d, message %d, index %d",
176 cs->dc.amd7930.ph_state, cs->dc.amd7930.old_state, message & 0x0f, index);
178 cs->dc.amd7930.old_state = cs->dc.amd7930.ph_state;
181 if ((message & 0xf0) && (cs->tx_skb)) {
182 wByteAMD(cs, 0x21, 0xC2);
183 wByteAMD(cs, 0x21, 0x02);
189 l1_msg(cs, HW_RESET | INDICATION, NULL);
190 Amd7930_get_state(cs);
193 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
196 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
199 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
200 Amd7930_ph_command(cs, 0x50, "HW_ENABLE REQUEST");
203 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
206 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
209 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
210 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
213 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
216 Amd7930_ph_command(cs, 0x40, "HW_ENABLE REQ cleared if set");
217 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
218 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
219 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
222 Amd7930_ph_command(cs, 0x40, "T3 expired, HW_ENABLE REQ cleared");
223 cs->dc.amd7930.old_state = 3;
226 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
238 struct IsdnCardState *cs =
242 if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) {
243 if (cs->debug)
244 debugl1(cs, "Amd7930: bh, D-Channel Busy cleared");
245 stptr = cs->stlist;
251 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) {
252 if (cs->debug & L1_DEB_ISAC)
253 debugl1(cs, "AMD7930: bh, D_L1STATECHANGE");
254 Amd7930_new_ph(cs);
257 if (test_and_clear_bit(D_RCVBUFREADY, &cs->event)) {
258 if (cs->debug & L1_DEB_ISAC)
259 debugl1(cs, "AMD7930: bh, D_RCVBUFREADY");
260 DChannel_proc_rcv(cs);
263 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event)) {
264 if (cs->debug & L1_DEB_ISAC)
265 debugl1(cs, "AMD7930: bh, D_XMTBUFREADY");
266 DChannel_proc_xmt(cs);
271 Amd7930_empty_Dfifo(struct IsdnCardState *cs, int flag)
279 if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
280 debugl1(cs, "Amd7930: empty_Dfifo");
283 ptr = cs->rcvbuf + cs->rcvidx;
286 AmdIrqOff(cs);
289 stat = rByteAMD(cs, 0x07); // DSR2
292 while ((stat & 2) && ((ptr-cs->rcvbuf) < MAX_DFRAME_LEN_L1)) {
293 *ptr = rByteAMD(cs, 0x04); // DCRB
295 stat = rByteAMD(cs, 0x07); // DSR2
296 cs->rcvidx = ptr - cs->rcvbuf;
301 der = rWordAMD(cs, 0x03);
305 rWordAMD(cs, 0x89); // clear DRCR
307 if ((cs->rcvidx) > 0) {
308 if (!(skb = alloc_skb(cs->rcvidx, GFP_ATOMIC)))
312 if (cs->debug & L1_DEB_ISAC_FIFO) {
313 char *t = cs->dlog;
315 t += sprintf(t, "Amd7930: empty_Dfifo cnt: %d |", cs->rcvidx);
316 QuickHex(t, cs->rcvbuf, cs->rcvidx);
317 debugl1(cs, "%s", cs->dlog);
320 memcpy(skb_put(skb, cs->rcvidx), cs->rcvbuf, cs->rcvidx);
321 skb_queue_tail(&cs->rq, skb);
327 ptr = cs->rcvbuf;
328 cs->rcvidx = 0;
329 schedule_event(cs, D_RCVBUFREADY);
333 if (cs->rcvidx >= MAX_DFRAME_LEN_L1) {
334 if (cs->debug & L1_DEB_WARN)
335 debugl1(cs, "AMD7930: empty_Dfifo L2-Framelength overrun");
336 cs->rcvidx = 0;
340 AmdIrqOn(cs);
345 Amd7930_fill_Dfifo(struct IsdnCardState *cs)
352 if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
353 debugl1(cs, "Amd7930: fill_Dfifo");
355 if ((!cs->tx_skb) || (cs->tx_skb->len <= 0))
359 if (!cs->dc.amd7930.tx_xmtlen)
361 len = dtcrw = cs->tx_skb->len;
363 else len = cs->dc.amd7930.tx_xmtlen;
367 AmdIrqOff(cs);
369 deb_ptr = ptr = cs->tx_skb->data;
373 while ((txstat & 0x10) && (cs->tx_cnt < len)) {
374 wByteAMD(cs, 0x04, *ptr);
376 cs->tx_cnt++;
377 txstat = rByteAMD(cs, 0x07);
379 count = ptr - cs->tx_skb->data;
380 skb_pull(cs->tx_skb, count);
383 dtcrr = rWordAMD(cs, 0x85); // DTCR
384 dmr3 = rByteAMD(cs, 0x8E);
386 if (cs->debug & L1_DEB_ISAC) {
387 debugl1(cs, "Amd7930: fill_Dfifo, DMR3: 0x%02X, DTCR read: 0x%04X write: 0x%02X 0x%02X", dmr3, dtcrr, LOBYTE(dtcrw), HIBYTE(dtcrw));
391 if (!cs->dc.amd7930.tx_xmtlen) {
392 wWordAMD(cs, 0x85, dtcrw);
393 cs->dc.amd7930.tx_xmtlen = dtcrw;
396 if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
397 debugl1(cs, "Amd7930: fill_Dfifo dbusytimer running");
398 del_timer(&cs->dbusytimer);
400 init_timer(&cs->dbusytimer);
401 cs->dbusytimer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
402 add_timer(&cs->dbusytimer);
404 if (cs->debug & L1_DEB_ISAC_FIFO) {
405 char *t = cs->dlog;
409 debugl1(cs, "%s", cs->dlog);
412 AmdIrqOn(cs);
416 void Amd7930_interrupt(struct IsdnCardState *cs, BYTE irflags)
424 dsr1 = rByteAMD(cs, 0x02);
425 der = rWordAMD(cs, 0x03);
426 dsr2 = rByteAMD(cs, 0x07);
427 lsr = rByteAMD(cs, 0xA1);
429 if (cs->debug & L1_DEB_ISAC)
430 debugl1(cs, "Amd7930: interrupt: flags: 0x%02X, DSR1: 0x%02X, DSR2: 0x%02X, LSR: 0x%02X, DER=0x%04X", irflags, dsr1, dsr2, lsr, der);
435 if (cs->debug & L1_DEB_WARN)
436 debugl1(cs, "Amd7930: interrupt: D error DER=0x%04X", der);
440 wByteAMD(cs, 0x21, 0xC2);
441 wByteAMD(cs, 0x21, 0x02);
442 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
443 del_timer(&cs->dbusytimer);
444 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
445 schedule_event(cs, D_CLEARBUSY);
447 if (cs->tx_skb) {
448 skb_push(cs->tx_skb, cs->tx_cnt);
449 cs->tx_cnt = 0;
450 cs->dc.amd7930.tx_xmtlen = 0;
451 Amd7930_fill_Dfifo(cs);
454 debugl1(cs, "Amd7930: interrupt: D-Collision, no skb");
458 Amd7930_empty_Dfifo(cs, 1);
460 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
461 del_timer(&cs->dbusytimer);
462 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
463 schedule_event(cs, D_CLEARBUSY);
465 if (cs->tx_skb) {
466 skb_push(cs->tx_skb, cs->tx_cnt);
467 cs->tx_cnt = 0;
468 cs->dc.amd7930.tx_xmtlen = 0;
469 Amd7930_fill_Dfifo(cs);
475 if (cs->debug & L1_DEB_ISAC)
476 debugl1(cs, "Amd7930: interrupt: clear Timer and fill D-TX-FIFO if data");
479 AmdIrqOff(cs);
481 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
482 del_timer(&cs->dbusytimer);
483 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
484 schedule_event(cs, D_CLEARBUSY);
485 if (cs->tx_skb) {
486 if (cs->tx_skb->len)
487 Amd7930_fill_Dfifo(cs);
490 AmdIrqOn(cs);
496 if (cs->debug & L1_DEB_ISAC)
497 debugl1(cs, "Amd7930: interrupt: empty D-FIFO");
498 Amd7930_empty_Dfifo(cs, 0);
504 if (cs->debug & L1_DEB_ISAC) {
505 debugl1(cs, "Amd7930: interrupt: transmit packet ready");
508 AmdIrqOff(cs);
510 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
511 del_timer(&cs->dbusytimer);
512 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
513 schedule_event(cs, D_CLEARBUSY);
515 if (cs->tx_skb) {
516 if (cs->debug & L1_DEB_ISAC)
517 debugl1(cs, "Amd7930: interrupt: TX-Packet ready, freeing skb");
518 dev_kfree_skb_irq(cs->tx_skb);
519 cs->tx_cnt = 0;
520 cs->dc.amd7930.tx_xmtlen = 0;
521 cs->tx_skb = NULL;
523 if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
524 if (cs->debug & L1_DEB_ISAC)
525 debugl1(cs, "Amd7930: interrupt: TX-Packet ready, next packet dequeued");
526 cs->tx_cnt = 0;
527 cs->dc.amd7930.tx_xmtlen = 0;
528 Amd7930_fill_Dfifo(cs);
531 schedule_event(cs, D_XMTBUFREADY);
533 AmdIrqOn(cs);
539 AmdIrqOff(cs);
541 if (cs->debug & L1_DEB_ISAC)
542 debugl1(cs, "Amd: interrupt: LSR=0x%02X, LIU is in state %d", lsr, ((lsr & 0x7) + 2));
544 cs->dc.amd7930.ph_state = (lsr & 0x7) + 2;
546 schedule_event(cs, D_L1STATECHANGE);
548 AmdIrqOn(cs);
552 irflags = rByteAMD(cs, 0x00);
560 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
564 if (cs->debug & L1_DEB_ISAC)
565 debugl1(cs, "Amd7930: l1hw called, pr: 0x%04X", pr);
569 if (cs->debug & DEB_DLOG_HEX)
570 LogFrame(cs, skb->data, skb->len);
571 if (cs->debug & DEB_DLOG_VERBOSE)
572 dlogframe(cs, skb, 0);
573 spin_lock_irqsave(&cs->lock, flags);
574 if (cs->tx_skb) {
575 skb_queue_tail(&cs->sq, skb);
577 if (cs->debug & L1_DEB_LAPD)
578 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA Queued", 0);
581 cs->tx_skb = skb;
582 cs->tx_cnt = 0;
583 cs->dc.amd7930.tx_xmtlen = 0;
585 if (cs->debug & L1_DEB_LAPD)
586 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA", 0);
588 Amd7930_fill_Dfifo(cs);
590 spin_unlock_irqrestore(&cs->lock, flags);
593 spin_lock_irqsave(&cs->lock, flags);
594 if (cs->tx_skb) {
595 if (cs->debug & L1_DEB_WARN)
596 debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen");
597 skb_queue_tail(&cs->sq, skb);
598 spin_unlock_irqrestore(&cs->lock, flags);
601 if (cs->debug & DEB_DLOG_HEX)
602 LogFrame(cs, skb->data, skb->len);
603 if (cs->debug & DEB_DLOG_VERBOSE)
604 dlogframe(cs, skb, 0);
605 cs->tx_skb = skb;
606 cs->tx_cnt = 0;
607 cs->dc.amd7930.tx_xmtlen = 0;
609 if (cs->debug & L1_DEB_LAPD)
610 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA_PULLED", 0);
612 Amd7930_fill_Dfifo(cs);
613 spin_unlock_irqrestore(&cs->lock, flags);
617 if (cs->debug & L1_DEB_LAPD)
618 debugl1(cs, "Amd7930: l1hw: -> PH_REQUEST_PULL, skb: %s", (cs->tx_skb) ? "yes" : "no");
620 if (!cs->tx_skb) {
627 spin_lock_irqsave(&cs->lock, flags);
628 if ((cs->dc.amd7930.ph_state == 8)) {
631 Amd7930_ph_command(cs, 0x20, "HW_RESET REQUEST"); //LMR1 bit 5
632 spin_unlock_irqrestore(&cs->lock, flags);
634 Amd7930_ph_command(cs, 0x40, "HW_RESET REQUEST");
635 cs->dc.amd7930.ph_state = 2;
636 spin_unlock_irqrestore(&cs->lock, flags);
637 Amd7930_new_ph(cs);
641 cs->dc.amd7930.ph_state = 9;
642 Amd7930_new_ph(cs);
651 skb_queue_purge(&cs->rq);
652 skb_queue_purge(&cs->sq);
653 if (cs->tx_skb) {
654 dev_kfree_skb(cs->tx_skb);
655 cs->tx_skb = NULL;
657 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
658 del_timer(&cs->dbusytimer);
659 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
660 schedule_event(cs, D_CLEARBUSY);
663 if (cs->debug & L1_DEB_WARN)
664 debugl1(cs, "Amd7930: l1hw: unknown %04x", pr);
670 setstack_Amd7930(struct PStack *st, struct IsdnCardState *cs)
673 if (cs->debug & L1_DEB_ISAC)
674 debugl1(cs, "Amd7930: setstack called");
681 DC_Close_Amd7930(struct IsdnCardState *cs) {
682 if (cs->debug & L1_DEB_ISAC)
683 debugl1(cs, "Amd7930: DC_Close called");
688 dbusy_timer_handler(struct IsdnCardState *cs)
696 if (cs->debug & L1_DEB_ISAC)
697 debugl1(cs, "Amd7930: dbusy_timer expired!");
699 if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
700 spin_lock_irqsave(&cs->lock, flags);
703 dtcr = rWordAMD(cs, 0x85);
704 dsr1 = rByteAMD(cs, 0x02);
705 dsr2 = rByteAMD(cs, 0x07);
706 der = rWordAMD(cs, 0x03);
708 if (cs->debug & L1_DEB_ISAC)
709 debugl1(cs, "Amd7930: dbusy_timer_handler: DSR1=0x%02X, DSR2=0x%02X, DER=0x%04X, cs->tx_skb->len=%u, tx_stat=%u, dtcr=%u, cs->tx_cnt=%u", dsr1, dsr2, der, cs->tx_skb->len, cs->dc.amd7930.tx_xmtlen, dtcr, cs->tx_cnt);
711 if ((cs->dc.amd7930.tx_xmtlen - dtcr) < cs->tx_cnt) { /* D-Channel Busy */
712 test_and_set_bit(FLG_L1_DBUSY, &cs->HW_Flags);
713 stptr = cs->stlist;
714 spin_unlock_irqrestore(&cs->lock, flags);
722 test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags);
723 if (cs->tx_skb) {
724 dev_kfree_skb_any(cs->tx_skb);
725 cs->tx_cnt = 0;
726 cs->tx_skb = NULL;
727 cs->dc.amd7930.tx_xmtlen = 0;
730 debugl1(cs, "Amd7930: D-Channel Busy no skb");
734 wByteAMD(cs, 0x21, 0x82);
735 wByteAMD(cs, 0x21, 0x02);
736 spin_unlock_irqrestore(&cs->lock, flags);
737 cs->irq_func(cs->irq, cs);
739 if (cs->debug & L1_DEB_ISAC)
740 debugl1(cs, "Amd7930: dbusy_timer_handler: Transmitter reset");
747 void Amd7930_init(struct IsdnCardState *cs)
752 if (cs->debug & L1_DEB_ISAC)
753 debugl1(cs, "Amd7930: initamd called");
755 cs->dc.amd7930.tx_xmtlen = 0;
756 cs->dc.amd7930.old_state = 0;
757 cs->dc.amd7930.lmr1 = 0x40;
758 cs->dc.amd7930.ph_command = Amd7930_ph_command;
759 cs->setstack_d = setstack_Amd7930;
760 cs->DC_Close = DC_Close_Amd7930;
770 rByteAMD(cs, cmd);
772 wByteAMD(cs, 0x00, cmd);
774 rByteAMD(cs, 0x01);
779 wByteAMD(cs, cmd, LOBYTE(*ptr++));
782 wByteAMD(cs, 0x00, cmd);
784 wByteAMD(cs, 0x01, LOBYTE(*ptr++));
789 void setup_Amd7930(struct IsdnCardState *cs)
791 INIT_WORK(&cs->tqueue, Amd7930_bh);
792 cs->dbusytimer.function = (void *) dbusy_timer_handler;
793 cs->dbusytimer.data = (long) cs;
794 init_timer(&cs->dbusytimer);