Lines Matching refs:SR_INT
66 #define SR_INT 0x04 /* Shift register full/empty */
187 out_8(&via[IER], IER_SET|SR_INT); /* enable interrupt from SR */
272 out_8(&via[IER], SR_INT); /* disable SR interrupt from VIA */
278 out_8(&via[IFR], SR_INT);
287 WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (2)");
289 out_8(&via[IFR], SR_INT);
296 WAIT_FOR(in_8(&via[IFR]) & SR_INT, "CUDA response to sync (4)");
298 out_8(&via[IFR], SR_INT);
468 if ((in_8(&via[IFR]) & SR_INT) == 0) {
472 out_8(&via[IFR], SR_INT);