Cross Reference: /drivers/media/dvb-frontends/stb0899

Lines Matching refs:reg
224 static int _stb0899_read_reg(struct stb0899_state *state, unsigned int reg)
228 	u8 b0[] = { reg >> 8, reg & 0xff };
250 				reg, ret);
256 			reg, buf);
261 int stb0899_read_reg(struct stb0899_state *state, unsigned int reg)
265 	result = _stb0899_read_reg(state, reg);
271 	if ((reg != 0xf2ff) && (reg != 0xf6ff) &&
272 	    (((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
273 		_stb0899_read_reg(state, (reg | 0x00ff));
451 int stb0899_read_regs(struct stb0899_state *state, unsigned int reg, u8 *buf, u32 count)
455 	u8 b0[] = { reg >> 8, reg & 0xff };
475 			       __func__, reg, count, status);
483 	if ((reg != 0xf2ff) && (reg != 0xf6ff) &&
484 	    (((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
485 		_stb0899_read_reg(state, (reg | 0x00ff));
490 		printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg);
502 int stb0899_write_regs(struct stb0899_state *state, unsigned int reg, u8 *data, u32 count)
515 		       "%s: i2c wr reg=%04x: len=%d is too big!\n",
516 		       KBUILD_MODNAME, reg, count);
520 	buf[0] = reg >> 8;
521 	buf[1] = reg & 0xff;
527 		printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg);
539 	if ((((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
540 		stb0899_read_reg(state, (reg | 0x00ff));
545 				reg, data[0], count, ret);
552 int stb0899_write_reg(struct stb0899_state *state, unsigned int reg, u8 data)
554 	return stb0899_write_regs(state, reg, &data, 1);
650 	u32 reg;
666 	reg = STB0899_READ_S2REG(STB0899_S2DEMOD, IF_AGC_CNTRL);
667 	STB0899_SETFIELD_VAL(IF_GAIN_INIT, reg, internal->agc_gain);
668 	stb0899_write_s2reg(state, STB0899_S2DEMOD, STB0899_BASE_IF_AGC_CNTRL, STB0899_OFF0_IF_AGC_CNTRL, reg);
670 	reg = STB0899_READ_S2REG(STB0899_S2DEMOD, RRC_ALPHA);
671 	internal->rrc_alpha		= STB0899_GETFIELD(RRC_ALPHA, reg);
687 	u8 reg = 0;
691 		reg = stb0899_read_reg(state, STB0899_DISSTATUS);
692 		if (!STB0899_GETFIELD(FIFOFULL, reg))
706 	u8 reg, i;
712 	reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
713 	STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 1);
714 	stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
722 	reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
723 	STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0);
724 	stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
731 	u8 reg = 0;
734 	while (!STB0899_GETFIELD(RXEND, reg)) {
735 		reg = stb0899_read_reg(state, STB0899_DISRX_ST0);
749 	u8 reg, length = 0, i;
755 	reg = stb0899_read_reg(state, STB0899_DISRX_ST0);
756 	if (STB0899_GETFIELD(RXEND, reg)) {
758 		reg = stb0899_read_reg(state, STB0899_DISRX_ST1);
759 		length = STB0899_GETFIELD(FIFOBYTENBR, reg);
780 	u8 reg = 0;
783 	while (!STB0899_GETFIELD(TXIDLE, reg)) {
784 		reg = stb0899_read_reg(state, STB0899_DISSTATUS);
797 	u8 reg, old_state;
803 	reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
804 	old_state = reg;
806 	STB0899_SETFIELD_VAL(DISEQCMODE, reg, 0x03);
807 	STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x01);
808 	stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
819 	reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
820 	STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x00);
821 	stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
837 	u8 f22_tx, reg;
840 	reg = stb0899_read_reg(state, STB0899_DISCNTRL2);
841 	STB0899_SETFIELD_VAL(ONECHIP_TRX, reg, 0);
842 	stb0899_write_reg(state, STB0899_DISCNTRL2, reg);
845 	reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
846 	STB0899_SETFIELD_VAL(DISEQCRESET, reg, 1);
847 	stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
849 	reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
850 	STB0899_SETFIELD_VAL(DISEQCRESET, reg, 0);
851 	stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
865 	u8 reg;
970 	u32 reg;
976 			reg  = stb0899_read_reg(state, STB0899_VSTATUS);
977 			if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
979 				reg = stb0899_read_reg(state, STB0899_AGCIQIN);
980 				val = (s32)(s8)STB0899_GETFIELD(AGCIQVALUE, reg);
991 			reg = STB0899_READ_S2REG(STB0899_S2DEMOD, IF_AGC_GAIN);
992 			val = STB0899_GETFIELD(IF_AGC_GAIN, reg);
1015 	u32 reg;
1018 	reg  = stb0899_read_reg(state, STB0899_VSTATUS);
1023 			if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
1036 			reg = STB0899_READ_S2REG(STB0899_S2DEMOD, UWP_CNTRL1);
1037 			quant = STB0899_GETFIELD(UWP_ESN0_QUANT, reg);
1038 			reg = STB0899_READ_S2REG(STB0899_S2DEMOD, UWP_STAT2);
1039 			est = STB0899_GETFIELD(ESN0_EST, reg);
1069 	u8 reg;
1077 			reg  = stb0899_read_reg(state, STB0899_VSTATUS);
1078 			if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
1082 				reg = stb0899_read_reg(state, STB0899_PLPARM);
1083 				if (STB0899_GETFIELD(VITCURPUN, reg)) {
1095 			reg = STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_STAT2);
1096 			if (STB0899_GETFIELD(UWP_LOCK, reg) && STB0899_GETFIELD(CSM_LOCK, reg)) {
1101 				reg = stb0899_read_reg(state, STB0899_CFGPDELSTATUS1);
1102 				if (STB0899_GETFIELD(CFGPDELSTATUS_LOCK, reg)) {
1108 				if (STB0899_GETFIELD(CONTINUOUS_STREAM, reg)) {
1113 				if (STB0899_GETFIELD(ACCEPTED_STREAM, reg)) {
1212 	u8 div, reg;
1223 		reg = stb0899_read_reg(state, STB0899_ACRPRESC);
1224 		STB0899_SETFIELD_VAL(ACRPRESC, reg, 0x03);
1225 		stb0899_write_reg(state, STB0899_ACRPRESC, reg);
1282 	dprintk(state->verbose, FE_DEBUG, 1, "ID reg=[0x%02x]", id);
1307 	u8 reg;
1317 		reg = stb0899_read_reg(state, STB0899_FECM);
1318 		STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 0);
1319 		STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 1);
1320 		stb0899_write_reg(state, STB0899_FECM, reg);
1327 		reg = stb0899_read_reg(state, STB0899_TSTRES);
1328 		STB0899_SETFIELD_VAL(FRESLDPC, reg, 1);
1329 		stb0899_write_reg(state, STB0899_TSTRES, reg);
1345 		reg = stb0899_read_reg(state, STB0899_FECM);
1346 		STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 0);
1347 		STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 0);
1348 		stb0899_write_reg(state, STB0899_FECM, reg);
1355 		reg = stb0899_read_reg(state, STB0899_TSTRES);
1356 		STB0899_SETFIELD_VAL(FRESLDPC, reg, 0);
1357 		stb0899_write_reg(state, STB0899_TSTRES, reg);
1373 		reg = stb0899_read_reg(state, STB0899_FECM);
1374 		STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 1);
1375 		STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 1);
1376 		stb0899_write_reg(state, STB0899_FECM, reg);
1382 		reg = stb0899_read_reg(state, STB0899_TSTRES);
1383 		STB0899_SETFIELD_VAL(FRESLDPC, reg, 1);
1384 		stb0899_write_reg(state, STB0899_TSTRES, reg);
1415 	u32 reg;
1425 	reg = STB0899_READ_S2REG(STB0899_S2FEC, MAX_ITER);
1426 	STB0899_SETFIELD_VAL(MAX_ITERATIONS, reg, iter_scale);
1427 	stb0899_write_s2reg(state, STB0899_S2FEC, STB0899_BASE_MAX_ITER, STB0899_OFF0_MAX_ITER, reg);