Lines Matching defs:mt9p031
30 #include <media/mt9p031.h>
122 struct mt9p031 {
149 static struct mt9p031 *to_mt9p031(struct v4l2_subdev *sd)
151 return container_of(sd, struct mt9p031, subdev);
164 static int mt9p031_set_output_control(struct mt9p031 *mt9p031, u16 clear,
167 struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev);
168 u16 value = (mt9p031->output_control & ~clear) | set;
175 mt9p031->output_control = value;
179 static int mt9p031_set_mode2(struct mt9p031 *mt9p031, u16 clear, u16 set)
181 struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev);
182 u16 value = (mt9p031->mode2 & ~clear) | set;
189 mt9p031->mode2 = value;
193 static int mt9p031_reset(struct mt9p031 *mt9p031)
195 struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev);
207 MT9P031_PIXEL_CLOCK_DIVIDE(mt9p031->clk_div));
211 return mt9p031_set_output_control(mt9p031, MT9P031_OUTPUT_CONTROL_CEN,
215 static int mt9p031_clk_setup(struct mt9p031 *mt9p031)
233 struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev);
234 struct mt9p031_platform_data *pdata = mt9p031->pdata;
237 mt9p031->clk = devm_clk_get(&client->dev, NULL);
238 if (IS_ERR(mt9p031->clk))
239 return PTR_ERR(mt9p031->clk);
241 ret = clk_set_rate(mt9p031->clk, pdata->ext_freq);
254 mt9p031->clk_div = max_t(unsigned int, div, 64);
255 mt9p031->use_pll = false;
260 mt9p031->pll.ext_clock = pdata->ext_freq;
261 mt9p031->pll.pix_clock = pdata->target_freq;
262 mt9p031->use_pll = true;
264 return aptina_pll_calculate(&client->dev, &limits, &mt9p031->pll);
267 static int mt9p031_pll_enable(struct mt9p031 *mt9p031)
269 struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev);
272 if (!mt9p031->use_pll)
281 (mt9p031->pll.m << 8) | (mt9p031->pll.n - 1));
285 ret = mt9p031_write(client, MT9P031_PLL_CONFIG_2, mt9p031->pll.p1 - 1);
296 static inline int mt9p031_pll_disable(struct mt9p031 *mt9p031)
298 struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev);
300 if (!mt9p031->use_pll)
307 static int mt9p031_power_on(struct mt9p031 *mt9p031)
312 if (gpio_is_valid(mt9p031->reset)) {
313 gpio_set_value(mt9p031->reset, 0);
318 ret = regulator_bulk_enable(ARRAY_SIZE(mt9p031->regulators),
319 mt9p031->regulators);
324 if (mt9p031->clk) {
325 ret = clk_prepare_enable(mt9p031->clk);
327 regulator_bulk_disable(ARRAY_SIZE(mt9p031->regulators),
328 mt9p031->regulators);
334 if (gpio_is_valid(mt9p031->reset)) {
335 gpio_set_value(mt9p031->reset, 1);
342 static void mt9p031_power_off(struct mt9p031 *mt9p031)
344 if (gpio_is_valid(mt9p031->reset)) {
345 gpio_set_value(mt9p031->reset, 0);
349 regulator_bulk_disable(ARRAY_SIZE(mt9p031->regulators),
350 mt9p031->regulators);
352 if (mt9p031->clk)
353 clk_disable_unprepare(mt9p031->clk);
356 static int __mt9p031_set_power(struct mt9p031 *mt9p031, bool on)
358 struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev);
362 mt9p031_power_off(mt9p031);
366 ret = mt9p031_power_on(mt9p031);
370 ret = mt9p031_reset(mt9p031);
376 return v4l2_ctrl_handler_setup(&mt9p031->ctrls);
383 static int mt9p031_set_params(struct mt9p031 *mt9p031)
385 struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev);
386 struct v4l2_mbus_framefmt *format = &mt9p031->format;
387 const struct v4l2_rect *crop = &mt9p031->crop;
450 struct mt9p031 *mt9p031 = to_mt9p031(subdev);
455 ret = mt9p031_set_output_control(mt9p031,
460 return mt9p031_pll_disable(mt9p031);
463 ret = mt9p031_set_params(mt9p031);
468 ret = mt9p031_set_output_control(mt9p031, 0,
473 return mt9p031_pll_enable(mt9p031);
480 struct mt9p031 *mt9p031 = to_mt9p031(subdev);
485 code->code = mt9p031->format.code;
493 struct mt9p031 *mt9p031 = to_mt9p031(subdev);
495 if (fse->index >= 8 || fse->code != mt9p031->format.code)
508 __mt9p031_get_pad_format(struct mt9p031 *mt9p031, struct v4l2_subdev_fh *fh,
515 return &mt9p031->format;
522 __mt9p031_get_pad_crop(struct mt9p031 *mt9p031, struct v4l2_subdev_fh *fh,
529 return &mt9p031->crop;
539 struct mt9p031 *mt9p031 = to_mt9p031(subdev);
541 fmt->format = *__mt9p031_get_pad_format(mt9p031, fh, fmt->pad,
550 struct mt9p031 *mt9p031 = to_mt9p031(subdev);
558 __crop = __mt9p031_get_pad_crop(mt9p031, fh, format->pad,
574 __format = __mt9p031_get_pad_format(mt9p031, fh, format->pad,
588 struct mt9p031 *mt9p031 = to_mt9p031(subdev);
590 crop->rect = *__mt9p031_get_pad_crop(mt9p031, fh, crop->pad,
599 struct mt9p031 *mt9p031 = to_mt9p031(subdev);
623 __crop = __mt9p031_get_pad_crop(mt9p031, fh, crop->pad, crop->which);
629 __format = __mt9p031_get_pad_format(mt9p031, fh, crop->pad,
650 static int mt9p031_restore_blc(struct mt9p031 *mt9p031)
652 struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev);
655 if (mt9p031->blc_auto->cur.val != 0) {
656 ret = mt9p031_set_mode2(mt9p031, 0,
662 if (mt9p031->blc_offset->cur.val != 0) {
664 mt9p031->blc_offset->cur.val);
674 struct mt9p031 *mt9p031 =
675 container_of(ctrl->handler, struct mt9p031, ctrls);
676 struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev);
722 return mt9p031_set_mode2(mt9p031,
725 return mt9p031_set_mode2(mt9p031,
730 return mt9p031_set_mode2(mt9p031,
733 return mt9p031_set_mode2(mt9p031,
742 v4l2_ctrl_activate(mt9p031->blc_auto, ctrl->val == 0);
743 v4l2_ctrl_activate(mt9p031->blc_offset, ctrl->val == 0);
747 ret = mt9p031_restore_blc(mt9p031);
766 ret = mt9p031_set_mode2(mt9p031, MT9P031_READ_MODE_2_ROW_BLC,
780 ret = mt9p031_set_mode2(mt9p031,
882 struct mt9p031 *mt9p031 = to_mt9p031(subdev);
885 mutex_lock(&mt9p031->power_lock);
890 if (mt9p031->power_count == !on) {
891 ret = __mt9p031_set_power(mt9p031, !!on);
897 mt9p031->power_count += on ? 1 : -1;
898 WARN_ON(mt9p031->power_count < 0);
901 mutex_unlock(&mt9p031->power_lock);
912 struct mt9p031 *mt9p031 = to_mt9p031(subdev);
916 ret = mt9p031_power_on(mt9p031);
924 mt9p031_power_off(mt9p031);
940 struct mt9p031 *mt9p031 = to_mt9p031(subdev);
952 if (mt9p031->model == MT9P031_MODEL_MONOCHROME)
1034 struct mt9p031 *mt9p031;
1049 mt9p031 = devm_kzalloc(&client->dev, sizeof(*mt9p031), GFP_KERNEL);
1050 if (mt9p031 == NULL)
1053 mt9p031->pdata = pdata;
1054 mt9p031->output_control = MT9P031_OUTPUT_CONTROL_DEF;
1055 mt9p031->mode2 = MT9P031_READ_MODE_2_ROW_BLC;
1056 mt9p031->model = did->driver_data;
1057 mt9p031->reset = -1;
1059 mt9p031->regulators[0].supply = "vdd";
1060 mt9p031->regulators[1].supply = "vdd_io";
1061 mt9p031->regulators[2].supply = "vaa";
1063 ret = devm_regulator_bulk_get(&client->dev, 3, mt9p031->regulators);
1069 v4l2_ctrl_handler_init(&mt9p031->ctrls, ARRAY_SIZE(mt9p031_ctrls) + 6);
1071 v4l2_ctrl_new_std(&mt9p031->ctrls, &mt9p031_ctrl_ops,
1075 v4l2_ctrl_new_std(&mt9p031->ctrls, &mt9p031_ctrl_ops,
1078 v4l2_ctrl_new_std(&mt9p031->ctrls, &mt9p031_ctrl_ops,
1080 v4l2_ctrl_new_std(&mt9p031->ctrls, &mt9p031_ctrl_ops,
1082 v4l2_ctrl_new_std(&mt9p031->ctrls, &mt9p031_ctrl_ops,
1085 v4l2_ctrl_new_std_menu_items(&mt9p031->ctrls, &mt9p031_ctrl_ops,
1091 v4l2_ctrl_new_custom(&mt9p031->ctrls, &mt9p031_ctrls[i], NULL);
1093 mt9p031->subdev.ctrl_handler = &mt9p031->ctrls;
1095 if (mt9p031->ctrls.error) {
1097 __func__, mt9p031->ctrls.error);
1098 ret = mt9p031->ctrls.error;
1102 mt9p031->blc_auto = v4l2_ctrl_find(&mt9p031->ctrls, V4L2_CID_BLC_AUTO);
1103 mt9p031->blc_offset = v4l2_ctrl_find(&mt9p031->ctrls,
1106 mutex_init(&mt9p031->power_lock);
1107 v4l2_i2c_subdev_init(&mt9p031->subdev, client, &mt9p031_subdev_ops);
1108 mt9p031->subdev.internal_ops = &mt9p031_subdev_internal_ops;
1110 mt9p031->pad.flags = MEDIA_PAD_FL_SOURCE;
1111 ret = media_entity_init(&mt9p031->subdev.entity, 1, &mt9p031->pad, 0);
1115 mt9p031->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1117 mt9p031->crop.width = MT9P031_WINDOW_WIDTH_DEF;
1118 mt9p031->crop.height = MT9P031_WINDOW_HEIGHT_DEF;
1119 mt9p031->crop.left = MT9P031_COLUMN_START_DEF;
1120 mt9p031->crop.top = MT9P031_ROW_START_DEF;
1122 if (mt9p031->model == MT9P031_MODEL_MONOCHROME)
1123 mt9p031->format.code = V4L2_MBUS_FMT_Y12_1X12;
1125 mt9p031->format.code = V4L2_MBUS_FMT_SGRBG12_1X12;
1127 mt9p031->format.width = MT9P031_WINDOW_WIDTH_DEF;
1128 mt9p031->format.height = MT9P031_WINDOW_HEIGHT_DEF;
1129 mt9p031->format.field = V4L2_FIELD_NONE;
1130 mt9p031->format.colorspace = V4L2_COLORSPACE_SRGB;
1138 mt9p031->reset = pdata->reset;
1141 ret = mt9p031_clk_setup(mt9p031);
1145 v4l2_ctrl_handler_free(&mt9p031->ctrls);
1146 media_entity_cleanup(&mt9p031->subdev.entity);
1155 struct mt9p031 *mt9p031 = to_mt9p031(subdev);
1157 v4l2_ctrl_handler_free(&mt9p031->ctrls);
1165 { "mt9p031", MT9P031_MODEL_COLOR },
1173 { .compatible = "aptina,mt9p031", },
1183 .name = "mt9p031",