Lines Matching refs:reg
23 u32 reg = 0;
28 while (reg != 0 && --count > 0) {
31 reg = readl(regs + EXYNOS3250_SW_RESET);
34 reg = 0;
37 while (reg != 1 && --count > 0) {
41 reg = readl(regs + EXYNOS3250_JPGDRI);
65 u32 reg;
67 reg = readl(base + EXYNOS3250_JPGCMOD) & ~EXYNOS3250_HALF_EN_MASK;
69 writel(reg | EXYNOS3250_HALF_EN, base + EXYNOS3250_JPGCMOD);
74 u32 reg;
76 reg = readl(regs + EXYNOS3250_JPGCMOD) &
81 reg |= EXYNOS3250_MODE_SEL_ARGB8888;
84 reg |= EXYNOS3250_MODE_SEL_ARGB8888 | EXYNOS3250_SRC_SWAP_RGB;
87 reg |= EXYNOS3250_MODE_SEL_RGB565;
90 reg |= EXYNOS3250_MODE_SEL_RGB565 | EXYNOS3250_SRC_SWAP_RGB;
93 reg |= EXYNOS3250_MODE_SEL_422_1P_LUM_CHR;
96 reg |= EXYNOS3250_MODE_SEL_422_1P_LUM_CHR |
100 reg |= EXYNOS3250_MODE_SEL_422_1P_CHR_LUM;
103 reg |= EXYNOS3250_MODE_SEL_422_1P_CHR_LUM |
107 reg |= EXYNOS3250_MODE_SEL_420_2P | EXYNOS3250_SRC_NV12;
110 reg |= EXYNOS3250_MODE_SEL_420_2P | EXYNOS3250_SRC_NV21;
113 reg |= EXYNOS3250_MODE_SEL_420_3P;
120 writel(reg, regs + EXYNOS3250_JPGCMOD);
125 u32 reg;
127 reg = readl(regs + EXYNOS3250_JPGCMOD);
129 reg |= EXYNOS3250_MODE_Y16;
131 reg &= ~EXYNOS3250_MODE_Y16_MASK;
132 writel(reg, regs + EXYNOS3250_JPGCMOD);
137 u32 reg, m;
143 reg = readl(regs + EXYNOS3250_JPGMOD);
144 reg &= ~EXYNOS3250_PROC_MODE_MASK;
145 reg |= m;
146 writel(reg, regs + EXYNOS3250_JPGMOD);
151 u32 reg, m = 0;
165 reg = readl(regs + EXYNOS3250_JPGMOD);
166 reg &= ~EXYNOS3250_SUBSAMPLING_MODE_MASK;
167 reg |= m;
168 writel(reg, regs + EXYNOS3250_JPGMOD);
179 u32 reg;
181 reg = dri & EXYNOS3250_JPGDRI_MASK;
182 writel(reg, regs + EXYNOS3250_JPGDRI);
187 unsigned long reg;
189 reg = readl(regs + EXYNOS3250_QHTBL);
190 reg &= ~EXYNOS3250_QT_NUM_MASK(t);
191 reg |= (n << EXYNOS3250_QT_NUM_SHIFT(t)) &
193 writel(reg, regs + EXYNOS3250_QHTBL);
198 unsigned long reg;
200 reg = readl(regs + EXYNOS3250_QHTBL);
201 reg &= ~EXYNOS3250_HT_NUM_AC_MASK(t);
203 reg |= (0 << EXYNOS3250_HT_NUM_AC_SHIFT(t)) &
205 writel(reg, regs + EXYNOS3250_QHTBL);
210 unsigned long reg;
212 reg = readl(regs + EXYNOS3250_QHTBL);
213 reg &= ~EXYNOS3250_HT_NUM_DC_MASK(t);
215 reg |= (0 << EXYNOS3250_HT_NUM_DC_SHIFT(t)) &
217 writel(reg, regs + EXYNOS3250_QHTBL);
222 u32 reg;
224 reg = y & EXYNOS3250_JPGY_MASK;
225 writel(reg, regs + EXYNOS3250_JPGY);
230 u32 reg;
232 reg = x & EXYNOS3250_JPGX_MASK;
233 writel(reg, regs + EXYNOS3250_JPGX);
250 u32 reg;
252 reg = readl(regs + EXYNOS3250_JPGINTSE);
253 reg |= (EXYNOS3250_JPEG_DONE_EN |
260 writel(reg, regs + EXYNOS3250_JPGINTSE);
265 u32 reg;
267 reg = size & EXYNOS3250_ENC_STREAM_BOUND_MASK;
268 writel(reg, regs + EXYNOS3250_ENC_STREAM_BOUND);
273 u32 reg;
277 reg = EXYNOS3250_OUT_FMT_ARGB8888;
280 reg = EXYNOS3250_OUT_FMT_ARGB8888 | EXYNOS3250_OUT_SWAP_RGB;
283 reg = EXYNOS3250_OUT_FMT_RGB565;
286 reg = EXYNOS3250_OUT_FMT_RGB565 | EXYNOS3250_OUT_SWAP_RGB;
289 reg = EXYNOS3250_OUT_FMT_422_1P_LUM_CHR;
292 reg = EXYNOS3250_OUT_FMT_422_1P_LUM_CHR |
296 reg = EXYNOS3250_OUT_FMT_422_1P_CHR_LUM;
299 reg = EXYNOS3250_OUT_FMT_422_1P_CHR_LUM |
303 reg = EXYNOS3250_OUT_FMT_420_2P | EXYNOS3250_OUT_NV12;
306 reg = EXYNOS3250_OUT_FMT_420_2P | EXYNOS3250_OUT_NV21;
309 reg = EXYNOS3250_OUT_FMT_420_3P;
312 reg = 0;
316 writel(reg, regs + EXYNOS3250_OUTFORM);
369 u32 reg;
371 reg = (y_offset << EXYNOS3250_LUMA_YY_OFFSET_SHIFT) &
373 reg |= (x_offset << EXYNOS3250_LUMA_YX_OFFSET_SHIFT) &
376 writel(reg, regs + EXYNOS3250_LUMA_XY_OFFSET);
378 reg = (y_offset << EXYNOS3250_CHROMA_YY_OFFSET_SHIFT) &
380 reg |= (x_offset << EXYNOS3250_CHROMA_YX_OFFSET_SHIFT) &
383 writel(reg, regs + EXYNOS3250_CHROMA_XY_OFFSET);
385 reg = (y_offset << EXYNOS3250_CHROMA_CR_YY_OFFSET_SHIFT) &
387 reg |= (x_offset << EXYNOS3250_CHROMA_CR_YX_OFFSET_SHIFT) &
390 writel(reg, regs + EXYNOS3250_CHROMA_CR_XY_OFFSET);