Lines Matching refs:MT2063_REG_RSVD_20
188 MT2063_REG_RSVD_20, /* 0x20: Reserved */
1096 val = (state->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */
1097 if (state->reg[MT2063_REG_RSVD_20] !=
1101 MT2063_REG_RSVD_20,
1122 val = (state->reg[MT2063_REG_RSVD_20] & ~0x40); /* Set PD2MUX=0 */
1123 if (state->reg[MT2063_REG_RSVD_20] !=
1127 MT2063_REG_RSVD_20,
1148 val = (state->reg[MT2063_REG_RSVD_20] | 0x40); /* Set PD2MUX=1 */
1149 if (state->reg[MT2063_REG_RSVD_20] !=
1153 MT2063_REG_RSVD_20,
1174 val = (state->reg[MT2063_REG_RSVD_20] | 0x40); /* Set PD2MUX=1 */
1175 if (state->reg[MT2063_REG_RSVD_20] !=
1179 MT2063_REG_RSVD_20,