Lines Matching defs:rc5t583

26 #include <linux/mfd/rc5t583.h>
154 struct rc5t583 *rc5t583 = irq_data_get_irq_chip_data(irq_data);
155 mutex_lock(&rc5t583->irq_lock);
160 struct rc5t583 *rc5t583 = irq_data_get_irq_chip_data(irq_data);
161 unsigned int __irq = irq_data->irq - rc5t583->irq_base;
164 rc5t583->group_irq_en[data->grp_index] |= 1 << data->grp_index;
165 rc5t583->intc_inten_reg |= 1 << data->master_bit;
166 rc5t583->irq_en_reg[data->mask_reg_index] |= 1 << data->int_en_bit;
171 struct rc5t583 *rc5t583 = irq_data_get_irq_chip_data(irq_data);
172 unsigned int __irq = irq_data->irq - rc5t583->irq_base;
175 rc5t583->group_irq_en[data->grp_index] &= ~(1 << data->grp_index);
176 if (!rc5t583->group_irq_en[data->grp_index])
177 rc5t583->intc_inten_reg &= ~(1 << data->master_bit);
179 rc5t583->irq_en_reg[data->mask_reg_index] &= ~(1 << data->int_en_bit);
184 struct rc5t583 *rc5t583 = irq_data_get_irq_chip_data(irq_data);
185 unsigned int __irq = irq_data->irq - rc5t583->irq_base;
202 rc5t583->gpedge_reg[gpedge_index] &= ~(3 << gpedge_bit_pos);
203 rc5t583->gpedge_reg[gpedge_index] |= (val << gpedge_bit_pos);
212 struct rc5t583 *rc5t583 = irq_data_get_irq_chip_data(irq_data);
216 for (i = 0; i < ARRAY_SIZE(rc5t583->gpedge_reg); i++) {
217 ret = rc5t583_write(rc5t583->dev, gpedge_add[i],
218 rc5t583->gpedge_reg[i]);
220 dev_warn(rc5t583->dev,
225 for (i = 0; i < ARRAY_SIZE(rc5t583->irq_en_reg); i++) {
226 ret = rc5t583_write(rc5t583->dev, irq_en_add[i],
227 rc5t583->irq_en_reg[i]);
229 dev_warn(rc5t583->dev,
234 ret = rc5t583_write(rc5t583->dev, RC5T583_INTC_INTEN,
235 rc5t583->intc_inten_reg);
237 dev_warn(rc5t583->dev,
241 mutex_unlock(&rc5t583->irq_lock);
246 struct rc5t583 *rc5t583 = irq_data_get_irq_chip_data(irq_data);
247 return irq_set_irq_wake(rc5t583->chip_irq, on);
255 struct rc5t583 *rc5t583 = data;
266 ret = rc5t583_read(rc5t583->dev, RC5T583_INTC_INTMON, &master_int);
268 dev_err(rc5t583->dev,
278 ret = rc5t583_read(rc5t583->dev, irq_mon_add[i], &int_sts[i]);
280 dev_warn(rc5t583->dev,
299 ret = rc5t583_write(rc5t583->dev, irq_clr_add[i],
302 dev_warn(rc5t583->dev,
317 (rc5t583->group_irq_en[data->master_bit] &
319 handle_nested_irq(rc5t583->irq_base + i);
326 .name = "rc5t583-irq",
335 int rc5t583_irq_init(struct rc5t583 *rc5t583, int irq, int irq_base)
340 dev_warn(rc5t583->dev, "No interrupt support on IRQ base\n");
344 mutex_init(&rc5t583->irq_lock);
348 ret = rc5t583_write(rc5t583->dev, irq_en_add[i],
349 rc5t583->irq_en_reg[i]);
351 dev_warn(rc5t583->dev,
357 ret = rc5t583_write(rc5t583->dev, gpedge_add[i],
358 rc5t583->gpedge_reg[i]);
360 dev_warn(rc5t583->dev,
365 ret = rc5t583_write(rc5t583->dev, RC5T583_INTC_INTEN, 0x0);
367 dev_warn(rc5t583->dev,
373 ret = rc5t583_write(rc5t583->dev, irq_clr_add[i], 0);
375 dev_warn(rc5t583->dev,
380 rc5t583->irq_base = irq_base;
381 rc5t583->chip_irq = irq;
384 int __irq = i + rc5t583->irq_base;
385 irq_set_chip_data(__irq, rc5t583);
395 "rc5t583", rc5t583);
397 dev_err(rc5t583->dev,
402 int rc5t583_irq_exit(struct rc5t583 *rc5t583)
404 if (rc5t583->chip_irq)
405 free_irq(rc5t583->chip_irq, rc5t583);