Lines Matching refs:ssbi

27 #include <linux/ssbi.h>
74 struct ssbi {
79 int (*read)(struct ssbi *, u16 addr, u8 *buf, int len);
80 int (*write)(struct ssbi *, u16 addr, const u8 *buf, int len);
85 static inline u32 ssbi_readl(struct ssbi *ssbi, u32 reg)
87 return readl(ssbi->base + reg);
90 static inline void ssbi_writel(struct ssbi *ssbi, u32 val, u32 reg)
92 writel(val, ssbi->base + reg);
104 static int ssbi_wait_mask(struct ssbi *ssbi, u32 set_mask, u32 clr_mask)
110 val = ssbi_readl(ssbi, SSBI2_STATUS);
120 ssbi_read_bytes(struct ssbi *ssbi, u16 addr, u8 *buf, int len)
125 if (ssbi->controller_type == MSM_SBI_CTRL_SSBI2) {
126 u32 mode2 = ssbi_readl(ssbi, SSBI2_MODE2);
128 ssbi_writel(ssbi, mode2, SSBI2_MODE2);
132 ret = ssbi_wait_mask(ssbi, SSBI_STATUS_READY, 0);
136 ssbi_writel(ssbi, cmd, SSBI2_CMD);
137 ret = ssbi_wait_mask(ssbi, SSBI_STATUS_RD_READY, 0);
140 *buf++ = ssbi_readl(ssbi, SSBI2_RD) & 0xff;
149 ssbi_write_bytes(struct ssbi *ssbi, u16 addr, const u8 *buf, int len)
153 if (ssbi->controller_type == MSM_SBI_CTRL_SSBI2) {
154 u32 mode2 = ssbi_readl(ssbi, SSBI2_MODE2);
156 ssbi_writel(ssbi, mode2, SSBI2_MODE2);
160 ret = ssbi_wait_mask(ssbi, SSBI_STATUS_READY, 0);
164 ssbi_writel(ssbi, ((addr & 0xff) << 16) | *buf, SSBI2_CMD);
165 ret = ssbi_wait_mask(ssbi, 0, SSBI_STATUS_MCHN_BUSY);
181 ssbi_pa_transfer(struct ssbi *ssbi, u32 cmd, u8 *data)
186 ssbi_writel(ssbi, cmd, SSBI_PA_CMD);
189 rd_status = ssbi_readl(ssbi, SSBI_PA_RD_STATUS);
206 ssbi_pa_read_bytes(struct ssbi *ssbi, u16 addr, u8 *buf, int len)
214 ret = ssbi_pa_transfer(ssbi, cmd, buf);
226 ssbi_pa_write_bytes(struct ssbi *ssbi, u16 addr, const u8 *buf, int len)
233 ret = ssbi_pa_transfer(ssbi, cmd, NULL);
246 struct ssbi *ssbi = to_ssbi(dev);
250 spin_lock_irqsave(&ssbi->lock, flags);
251 ret = ssbi->read(ssbi, addr, buf, len);
252 spin_unlock_irqrestore(&ssbi->lock, flags);
260 struct ssbi *ssbi = to_ssbi(dev);
264 spin_lock_irqsave(&ssbi->lock, flags);
265 ret = ssbi->write(ssbi, addr, buf, len);
266 spin_unlock_irqrestore(&ssbi->lock, flags);
276 struct ssbi *ssbi;
279 ssbi = devm_kzalloc(&pdev->dev, sizeof(*ssbi), GFP_KERNEL);
280 if (!ssbi)
284 ssbi->base = devm_ioremap_resource(&pdev->dev, mem_res);
285 if (IS_ERR(ssbi->base))
286 return PTR_ERR(ssbi->base);
288 platform_set_drvdata(pdev, ssbi);
296 if (strcmp(type, "ssbi") == 0)
297 ssbi->controller_type = MSM_SBI_CTRL_SSBI;
299 ssbi->controller_type = MSM_SBI_CTRL_SSBI2;
301 ssbi->controller_type = MSM_SBI_CTRL_PMIC_ARBITER;
307 if (ssbi->controller_type == MSM_SBI_CTRL_PMIC_ARBITER) {
308 ssbi->read = ssbi_pa_read_bytes;
309 ssbi->write = ssbi_pa_write_bytes;
311 ssbi->read = ssbi_read_bytes;
312 ssbi->write = ssbi_write_bytes;
315 spin_lock_init(&ssbi->lock);
321 { .compatible = "qcom,ssbi" },
329 .name = "ssbi",
338 MODULE_ALIAS("platform:ssbi");