Lines Matching refs:host
29 #include <linux/mmc/host.h>
231 static void mmc_davinci_sg_to_buf(struct mmc_davinci_host *host)
233 host->buffer_bytes_left = sg_dma_len(host->sg);
234 host->buffer = sg_virt(host->sg);
235 if (host->buffer_bytes_left > host->bytes_left)
236 host->buffer_bytes_left = host->bytes_left;
239 static void davinci_fifo_data_trans(struct mmc_davinci_host *host,
245 if (host->buffer_bytes_left == 0) {
246 host->sg = sg_next(host->data->sg);
247 mmc_davinci_sg_to_buf(host);
250 p = host->buffer;
251 if (n > host->buffer_bytes_left)
252 n = host->buffer_bytes_left;
253 host->buffer_bytes_left -= n;
254 host->bytes_left -= n;
260 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) {
262 writel(*((u32 *)p), host->base + DAVINCI_MMCDXR);
266 iowrite8_rep(host->base + DAVINCI_MMCDXR, p, (n & 3));
271 *((u32 *)p) = readl(host->base + DAVINCI_MMCDRR);
275 ioread8_rep(host->base + DAVINCI_MMCDRR, p, (n & 3));
279 host->buffer = p;
282 static void mmc_davinci_start_command(struct mmc_davinci_host *host,
288 dev_dbg(mmc_dev(host->mmc), "CMD%d, arg 0x%08x%s\n",
308 host->cmd = cmd;
329 dev_dbg(mmc_dev(host->mmc), "unknown resp_type %04x\n",
338 if (host->do_dma)
341 if (host->version == MMC_CTLR_VERSION_2 && host->data != NULL &&
342 host->data_dir == DAVINCI_MMC_DATADIR_READ)
354 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE)
357 if (host->bus_mode == MMC_BUSMODE_PUSHPULL)
361 writel(0x1FFF, host->base + DAVINCI_MMCTOR);
365 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) {
368 if (!host->do_dma)
370 } else if (host->data_dir == DAVINCI_MMC_DATADIR_READ) {
373 if (!host->do_dma)
381 if (!host->do_dma && (host->data_dir == DAVINCI_MMC_DATADIR_WRITE))
382 davinci_fifo_data_trans(host, rw_threshold);
384 writel(cmd->arg, host->base + DAVINCI_MMCARGHL);
385 writel(cmd_reg, host->base + DAVINCI_MMCCMD);
387 host->active_request = true;
389 if (!host->do_dma && host->bytes_left <= poll_threshold) {
392 while (host->active_request && count--) {
393 mmc_davinci_irq(0, host);
398 if (host->active_request)
399 writel(im_val, host->base + DAVINCI_MMCIM);
406 static void davinci_abort_dma(struct mmc_davinci_host *host)
410 if (host->data_dir == DAVINCI_MMC_DATADIR_READ)
411 sync_dev = host->dma_rx;
413 sync_dev = host->dma_tx;
418 static int mmc_davinci_send_dma_request(struct mmc_davinci_host *host,
425 if (host->data_dir == DAVINCI_MMC_DATADIR_WRITE) {
428 .dst_addr = host->mem_res->start + DAVINCI_MMCDXR,
433 chan = host->dma_tx;
434 dmaengine_slave_config(host->dma_tx, &dma_tx_conf);
436 desc = dmaengine_prep_slave_sg(host->dma_tx,
438 host->sg_len,
442 dev_dbg(mmc_dev(host->mmc),
450 .src_addr = host->mem_res->start + DAVINCI_MMCDRR,
455 chan = host->dma_rx;
456 dmaengine_slave_config(host->dma_rx, &dma_rx_conf);
458 desc = dmaengine_prep_slave_sg(host->dma_rx,
460 host->sg_len,
464 dev_dbg(mmc_dev(host->mmc),
478 static int mmc_davinci_start_dma_transfer(struct mmc_davinci_host *host,
485 host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
491 for (i = 0; i < host->sg_len; i++) {
493 dma_unmap_sg(mmc_dev(host->mmc),
502 host->do_dma = 1;
503 ret = mmc_davinci_send_dma_request(host, data);
509 davinci_release_dma_channels(struct mmc_davinci_host *host)
511 if (!host->use_dma)
514 dma_release_channel(host->dma_tx);
515 dma_release_channel(host->dma_rx);
518 static int __init davinci_acquire_dma_channels(struct mmc_davinci_host *host)
526 host->dma_tx =
528 &host->txdma, mmc_dev(host->mmc), "tx");
529 if (!host->dma_tx) {
530 dev_err(mmc_dev(host->mmc), "Can't get dma_tx channel\n");
534 host->dma_rx =
536 &host->rxdma, mmc_dev(host->mmc), "rx");
537 if (!host->dma_rx) {
538 dev_err(mmc_dev(host->mmc), "Can't get dma_rx channel\n");
546 dma_release_channel(host->dma_tx);
554 mmc_davinci_prepare_data(struct mmc_davinci_host *host, struct mmc_request *req)
560 if (host->version == MMC_CTLR_VERSION_2)
563 host->data = data;
565 host->data_dir = DAVINCI_MMC_DATADIR_NONE;
566 writel(0, host->base + DAVINCI_MMCBLEN);
567 writel(0, host->base + DAVINCI_MMCNBLK);
571 dev_dbg(mmc_dev(host->mmc), "%s %s, %d blocks of %d bytes\n",
575 dev_dbg(mmc_dev(host->mmc), " DTO %d cycles + %d ns\n",
578 (data->timeout_ns / host->ns_in_one_cycle);
582 writel(timeout, host->base + DAVINCI_MMCTOD);
583 writel(data->blocks, host->base + DAVINCI_MMCNBLK);
584 writel(data->blksz, host->base + DAVINCI_MMCBLEN);
589 host->data_dir = DAVINCI_MMC_DATADIR_WRITE;
591 host->base + DAVINCI_MMCFIFOCTL);
593 host->base + DAVINCI_MMCFIFOCTL);
597 host->data_dir = DAVINCI_MMC_DATADIR_READ;
599 host->base + DAVINCI_MMCFIFOCTL);
601 host->base + DAVINCI_MMCFIFOCTL);
605 host->buffer = NULL;
606 host->bytes_left = data->blocks * data->blksz;
616 if (host->use_dma && (host->bytes_left & (rw_threshold - 1)) == 0
617 && mmc_davinci_start_dma_transfer(host, data) == 0) {
619 host->bytes_left = 0;
622 host->sg_len = data->sg_len;
623 host->sg = host->data->sg;
624 mmc_davinci_sg_to_buf(host);
630 struct mmc_davinci_host *host = mmc_priv(mmc);
638 mmcst1 = readl(host->base + DAVINCI_MMCST1);
644 dev_err(mmc_dev(host->mmc), "still BUSY? bad ... \n");
650 host->do_dma = 0;
651 mmc_davinci_prepare_data(host, req);
652 mmc_davinci_start_command(host, req->cmd);
655 static unsigned int calculate_freq_for_card(struct mmc_davinci_host *host,
660 mmc_pclk = host->mmc_input_clk;
674 host->ns_in_one_cycle = (1000000) / (((mmc_pclk
677 host->ns_in_one_cycle = (1000000) / (((mmc_pclk
687 struct mmc_davinci_host *host = mmc_priv(mmc);
701 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK;
703 writel(temp, host->base + DAVINCI_MMCCLK);
706 host->ns_in_one_cycle = (1000000) / (MMCSD_INIT_CLOCK/1000);
709 mmc_push_pull_freq = calculate_freq_for_card(host, ios->clock);
714 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKEN;
715 writel(temp, host->base + DAVINCI_MMCCLK);
719 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK;
721 writel(temp, host->base + DAVINCI_MMCCLK);
723 writel(temp | MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK);
731 struct mmc_davinci_host *host = mmc_priv(mmc);
735 dev_dbg(mmc_dev(host->mmc),
753 dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n");
754 writel((readl(host->base + DAVINCI_MMCCTL) &
756 host->base + DAVINCI_MMCCTL);
759 dev_dbg(mmc_dev(host->mmc), "Enabling 4 bit mode\n");
760 if (host->version == MMC_CTLR_VERSION_2)
761 writel((readl(host->base + DAVINCI_MMCCTL) &
763 host->base + DAVINCI_MMCCTL);
765 writel(readl(host->base + DAVINCI_MMCCTL) |
767 host->base + DAVINCI_MMCCTL);
770 dev_dbg(mmc_dev(host->mmc), "Enabling 1 bit mode\n");
771 if (host->version == MMC_CTLR_VERSION_2)
772 writel(readl(host->base + DAVINCI_MMCCTL) &
774 host->base + DAVINCI_MMCCTL);
776 writel(readl(host->base + DAVINCI_MMCCTL) &
778 host->base + DAVINCI_MMCCTL);
784 host->bus_mode = ios->bus_mode;
790 writel(0, host->base + DAVINCI_MMCARGHL);
791 writel(MMCCMD_INITCK, host->base + DAVINCI_MMCCMD);
793 u32 tmp = readl(host->base + DAVINCI_MMCST0);
802 dev_warn(mmc_dev(host->mmc), "powerup timeout\n");
809 mmc_davinci_xfer_done(struct mmc_davinci_host *host, struct mmc_data *data)
811 host->data = NULL;
813 if (host->mmc->caps & MMC_CAP_SDIO_IRQ) {
819 if (host->sdio_int && !(readl(host->base + DAVINCI_SDIOST0) &
821 writel(SDIOIST_IOINT, host->base + DAVINCI_SDIOIST);
822 mmc_signal_sdio_irq(host->mmc);
826 if (host->do_dma) {
827 davinci_abort_dma(host);
829 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
833 host->do_dma = false;
835 host->data_dir = DAVINCI_MMC_DATADIR_NONE;
837 if (!data->stop || (host->cmd && host->cmd->error)) {
838 mmc_request_done(host->mmc, data->mrq);
839 writel(0, host->base + DAVINCI_MMCIM);
840 host->active_request = false;
842 mmc_davinci_start_command(host, data->stop);
845 static void mmc_davinci_cmd_done(struct mmc_davinci_host *host,
848 host->cmd = NULL;
853 cmd->resp[3] = readl(host->base + DAVINCI_MMCRSP01);
854 cmd->resp[2] = readl(host->base + DAVINCI_MMCRSP23);
855 cmd->resp[1] = readl(host->base + DAVINCI_MMCRSP45);
856 cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67);
859 cmd->resp[0] = readl(host->base + DAVINCI_MMCRSP67);
863 if (host->data == NULL || cmd->error) {
866 mmc_request_done(host->mmc, cmd->mrq);
867 writel(0, host->base + DAVINCI_MMCIM);
868 host->active_request = false;
872 static inline void mmc_davinci_reset_ctrl(struct mmc_davinci_host *host,
877 temp = readl(host->base + DAVINCI_MMCCTL);
883 writel(temp, host->base + DAVINCI_MMCCTL);
888 davinci_abort_data(struct mmc_davinci_host *host, struct mmc_data *data)
890 mmc_davinci_reset_ctrl(host, 1);
891 mmc_davinci_reset_ctrl(host, 0);
896 struct mmc_davinci_host *host = dev_id;
899 status = readl(host->base + DAVINCI_SDIOIST);
901 dev_dbg(mmc_dev(host->mmc),
903 writel(status | SDIOIST_IOINT, host->base + DAVINCI_SDIOIST);
904 mmc_signal_sdio_irq(host->mmc);
911 struct mmc_davinci_host *host = (struct mmc_davinci_host *)dev_id;
915 struct mmc_data *data = host->data;
917 if (host->cmd == NULL && host->data == NULL) {
918 status = readl(host->base + DAVINCI_MMCST0);
919 dev_dbg(mmc_dev(host->mmc),
922 writel(0, host->base + DAVINCI_MMCIM);
926 status = readl(host->base + DAVINCI_MMCST0);
936 if (host->bytes_left && (status & (MMCST0_DXRDY | MMCST0_DRRDY))) {
946 im_val = readl(host->base + DAVINCI_MMCIM);
947 writel(0, host->base + DAVINCI_MMCIM);
950 davinci_fifo_data_trans(host, rw_threshold);
951 status = readl(host->base + DAVINCI_MMCST0);
953 } while (host->bytes_left &&
962 writel(im_val, host->base + DAVINCI_MMCIM);
968 if ((host->do_dma == 0) && (host->bytes_left > 0)) {
972 davinci_fifo_data_trans(host, host->bytes_left);
977 dev_err(mmc_dev(host->mmc),
978 "DATDNE with no host->data\n");
987 dev_dbg(mmc_dev(host->mmc),
991 davinci_abort_data(host, data);
1006 u32 temp = readb(host->base + DAVINCI_MMCDRSP);
1011 dev_dbg(mmc_dev(host->mmc), "data %s %s error\n",
1015 davinci_abort_data(host, data);
1020 if (host->cmd) {
1021 dev_dbg(mmc_dev(host->mmc),
1023 host->cmd->opcode, qstatus);
1024 host->cmd->error = -ETIMEDOUT;
1027 davinci_abort_data(host, data);
1035 dev_dbg(mmc_dev(host->mmc), "Command CRC error\n");
1036 if (host->cmd) {
1037 host->cmd->error = -EILSEQ;
1044 end_command = (int) host->cmd;
1048 mmc_davinci_cmd_done(host, host->cmd);
1050 mmc_davinci_xfer_done(host, data);
1076 struct mmc_davinci_host *host = mmc_priv(mmc);
1079 if (!(readl(host->base + DAVINCI_SDIOST0) & SDIOST0_DAT1_HI)) {
1080 writel(SDIOIST_IOINT, host->base + DAVINCI_SDIOIST);
1081 mmc_signal_sdio_irq(host->mmc);
1083 host->sdio_int = true;
1084 writel(readl(host->base + DAVINCI_SDIOIEN) |
1085 SDIOIEN_IOINTEN, host->base + DAVINCI_SDIOIEN);
1088 host->sdio_int = false;
1089 writel(readl(host->base + DAVINCI_SDIOIEN) & ~SDIOIEN_IOINTEN,
1090 host->base + DAVINCI_SDIOIEN);
1108 struct mmc_davinci_host *host;
1113 host = container_of(nb, struct mmc_davinci_host, freq_transition);
1114 mmc = host->mmc;
1115 mmc_pclk = clk_get_rate(host->clk);
1119 host->mmc_input_clk = mmc_pclk;
1127 static inline int mmc_davinci_cpufreq_register(struct mmc_davinci_host *host)
1129 host->freq_transition.notifier_call = mmc_davinci_cpufreq_transition;
1131 return cpufreq_register_notifier(&host->freq_transition,
1135 static inline void mmc_davinci_cpufreq_deregister(struct mmc_davinci_host *host)
1137 cpufreq_unregister_notifier(&host->freq_transition,
1141 static inline int mmc_davinci_cpufreq_register(struct mmc_davinci_host *host)
1146 static inline void mmc_davinci_cpufreq_deregister(struct mmc_davinci_host *host)
1150 static void __init init_mmcsd_host(struct mmc_davinci_host *host)
1153 mmc_davinci_reset_ctrl(host, 1);
1155 writel(0, host->base + DAVINCI_MMCCLK);
1156 writel(MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK);
1158 writel(0x1FFF, host->base + DAVINCI_MMCTOR);
1159 writel(0xFFFF, host->base + DAVINCI_MMCTOD);
1161 mmc_davinci_reset_ctrl(host, 0);
1232 struct mmc_davinci_host *host = NULL;
1262 host = mmc_priv(mmc);
1263 host->mmc = mmc; /* Important */
1269 host->rxdma = r->start;
1275 host->txdma = r->start;
1277 host->mem_res = mem;
1278 host->base = ioremap(mem->start, mem_size);
1279 if (!host->base)
1283 host->clk = clk_get(&pdev->dev, "MMCSDCLK");
1284 if (IS_ERR(host->clk)) {
1285 ret = PTR_ERR(host->clk);
1288 clk_enable(host->clk);
1289 host->mmc_input_clk = clk_get_rate(host->clk);
1291 init_mmcsd_host(host);
1294 host->nr_sg = pdata->nr_sg - 1;
1296 if (host->nr_sg > MAX_NR_SG || !host->nr_sg)
1297 host->nr_sg = MAX_NR_SG;
1299 host->use_dma = use_dma;
1300 host->mmc_irq = irq;
1301 host->sdio_irq = platform_get_irq(pdev, 1);
1303 if (host->use_dma && davinci_acquire_dma_channels(host) != 0)
1304 host->use_dma = 0;
1318 host->version = id_entry->driver_data;
1343 dev_dbg(mmc_dev(host->mmc), "max_segs=%d\n", mmc->max_segs);
1344 dev_dbg(mmc_dev(host->mmc), "max_blk_size=%d\n", mmc->max_blk_size);
1345 dev_dbg(mmc_dev(host->mmc), "max_req_size=%d\n", mmc->max_req_size);
1346 dev_dbg(mmc_dev(host->mmc), "max_seg_size=%d\n", mmc->max_seg_size);
1348 platform_set_drvdata(pdev, host);
1350 ret = mmc_davinci_cpufreq_register(host);
1360 ret = request_irq(irq, mmc_davinci_irq, 0, mmc_hostname(mmc), host);
1364 if (host->sdio_irq >= 0) {
1365 ret = request_irq(host->sdio_irq, mmc_davinci_sdio_irq, 0,
1366 mmc_hostname(mmc), host);
1373 dev_info(mmc_dev(host->mmc), "Using %s, %d-bit mode\n",
1374 host->use_dma ? "DMA" : "PIO",
1380 mmc_davinci_cpufreq_deregister(host);
1382 if (host) {
1383 davinci_release_dma_channels(host);
1385 if (host->clk) {
1386 clk_disable(host->clk);
1387 clk_put(host->clk);
1390 if (host->base)
1391 iounmap(host->base);
1407 struct mmc_davinci_host *host = platform_get_drvdata(pdev);
1409 if (host) {
1410 mmc_davinci_cpufreq_deregister(host);
1412 mmc_remove_host(host->mmc);
1413 free_irq(host->mmc_irq, host);
1414 if (host->mmc->caps & MMC_CAP_SDIO_IRQ)
1415 free_irq(host->sdio_irq, host);
1417 davinci_release_dma_channels(host);
1419 clk_disable(host->clk);
1420 clk_put(host->clk);
1422 iounmap(host->base);
1424 release_resource(host->mem_res);
1426 mmc_free_host(host->mmc);
1436 struct mmc_davinci_host *host = platform_get_drvdata(pdev);
1438 writel(0, host->base + DAVINCI_MMCIM);
1439 mmc_davinci_reset_ctrl(host, 1);
1440 clk_disable(host->clk);
1448 struct mmc_davinci_host *host = platform_get_drvdata(pdev);
1450 clk_enable(host->clk);
1451 mmc_davinci_reset_ctrl(host, 0);