Lines Matching refs:host
2 * linux/drivers/mmc/host/pxa.c - PXA MMCI driver
28 #include <linux/mmc/host.h>
83 static inline void pxamci_init_ocr(struct pxamci_host *host)
86 host->vcc = regulator_get_optional(mmc_dev(host->mmc), "vmmc");
88 if (IS_ERR(host->vcc))
89 host->vcc = NULL;
91 host->mmc->ocr_avail = mmc_regulator_get_ocrmask(host->vcc);
92 if (host->pdata && host->pdata->ocr_mask)
93 dev_warn(mmc_dev(host->mmc),
97 if (host->vcc == NULL) {
99 host->mmc->ocr_avail = host->pdata ?
100 host->pdata->ocr_mask :
105 static inline int pxamci_set_power(struct pxamci_host *host,
111 if (host->vcc) {
115 ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd);
119 ret = mmc_regulator_set_ocr(host->mmc, host->vcc, 0);
124 if (!host->vcc && host->pdata &&
125 gpio_is_valid(host->pdata->gpio_power)) {
126 on = ((1 << vdd) & host->pdata->ocr_mask);
127 gpio_set_value(host->pdata->gpio_power,
128 !!on ^ host->pdata->gpio_power_invert);
130 if (!host->vcc && host->pdata && host->pdata->setpower)
131 return host->pdata->setpower(mmc_dev(host->mmc), vdd);
136 static void pxamci_stop_clock(struct pxamci_host *host)
138 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
142 writel(STOP_CLOCK, host->base + MMC_STRPCL);
145 v = readl(host->base + MMC_STAT);
152 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
156 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
160 spin_lock_irqsave(&host->lock, flags);
161 host->imask &= ~mask;
162 writel(host->imask, host->base + MMC_I_MASK);
163 spin_unlock_irqrestore(&host->lock, flags);
166 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
170 spin_lock_irqsave(&host->lock, flags);
171 host->imask |= mask;
172 writel(host->imask, host->base + MMC_I_MASK);
173 spin_unlock_irqrestore(&host->lock, flags);
176 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
185 host->data = data;
190 writel(nob, host->base + MMC_NOB);
191 writel(data->blksz, host->base + MMC_BLKLEN);
193 clks = (unsigned long long)data->timeout_ns * host->clkrate;
195 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
196 writel((timeout + 255) / 256, host->base + MMC_RDTO);
199 host->dma_dir = DMA_FROM_DEVICE;
201 DRCMR(host->dma_drcmrtx) = 0;
202 DRCMR(host->dma_drcmrrx) = host->dma | DRCMR_MAPVLD;
204 host->dma_dir = DMA_TO_DEVICE;
206 DRCMR(host->dma_drcmrrx) = 0;
207 DRCMR(host->dma_drcmrtx) = host->dma | DRCMR_MAPVLD;
212 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
213 host->dma_dir);
215 for (i = 0; i < host->dma_len; i++) {
217 host->sg_cpu[i].dcmd = dcmd | length;
219 host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN;
224 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
225 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
227 host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
228 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
230 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
233 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
242 DALGN |= (1 << host->dma);
244 DALGN &= ~(1 << host->dma);
245 DDADR(host->dma) = host->sg_dma;
254 DCSR(host->dma) = DCSR_RUN;
257 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
259 WARN_ON(host->cmd != NULL);
260 host->cmd = cmd;
280 writel(cmd->opcode, host->base + MMC_CMD);
281 writel(cmd->arg >> 16, host->base + MMC_ARGH);
282 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
283 writel(cmdat, host->base + MMC_CMDAT);
284 writel(host->clkrt, host->base + MMC_CLKRT);
286 writel(START_CLOCK, host->base + MMC_STRPCL);
288 pxamci_enable_irq(host, END_CMD_RES);
291 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
293 host->mrq = NULL;
294 host->cmd = NULL;
295 host->data = NULL;
296 mmc_request_done(host->mmc, mrq);
299 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
301 struct mmc_command *cmd = host->cmd;
308 host->cmd = NULL;
314 v = readl(host->base + MMC_RES) & 0xffff;
316 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
317 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
338 pxamci_disable_irq(host, END_CMD_RES);
339 if (host->data && !cmd->error) {
340 pxamci_enable_irq(host, DATA_TRAN_DONE);
345 if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE)
346 DCSR(host->dma) = DCSR_RUN;
348 pxamci_finish_request(host, host->mrq);
354 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
356 struct mmc_data *data = host->data;
361 DCSR(host->dma) = 0;
362 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
363 host->dma_dir);
381 pxamci_disable_irq(host, DATA_TRAN_DONE);
383 host->data = NULL;
384 if (host->mrq->stop) {
385 pxamci_stop_clock(host);
386 pxamci_start_cmd(host, host->mrq->stop, host->cmdat);
388 pxamci_finish_request(host, host->mrq);
396 struct pxamci_host *host = devid;
400 ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK);
403 unsigned stat = readl(host->base + MMC_STAT);
408 handled |= pxamci_cmd_done(host, stat);
410 handled |= pxamci_data_done(host, stat);
412 mmc_signal_sdio_irq(host->mmc);
422 struct pxamci_host *host = mmc_priv(mmc);
425 WARN_ON(host->mrq != NULL);
427 host->mrq = mrq;
429 pxamci_stop_clock(host);
431 cmdat = host->cmdat;
432 host->cmdat &= ~CMDAT_INIT;
435 pxamci_setup_data(host, mrq->data);
446 pxamci_start_cmd(host, mrq->cmd, cmdat);
451 struct pxamci_host *host = mmc_priv(mmc);
453 if (host->pdata && gpio_is_valid(host->pdata->gpio_card_ro)) {
454 if (host->pdata->gpio_card_ro_invert)
455 return !gpio_get_value(host->pdata->gpio_card_ro);
457 return gpio_get_value(host->pdata->gpio_card_ro);
459 if (host->pdata && host->pdata->get_ro)
460 return !!host->pdata->get_ro(mmc_dev(mmc));
470 struct pxamci_host *host = mmc_priv(mmc);
473 unsigned long rate = host->clkrate;
476 if (host->clkrt == CLKRT_OFF)
477 clk_prepare_enable(host->clk);
481 host->clkrt = 7;
494 host->clkrt = fls(clk) - 1;
501 pxamci_stop_clock(host);
502 if (host->clkrt != CLKRT_OFF) {
503 host->clkrt = CLKRT_OFF;
504 clk_disable_unprepare(host->clk);
508 if (host->power_mode != ios->power_mode) {
511 host->power_mode = ios->power_mode;
513 ret = pxamci_set_power(host, ios->power_mode, ios->vdd);
526 host->cmdat |= CMDAT_INIT;
530 host->cmdat |= CMDAT_SD_4DAT;
532 host->cmdat &= ~CMDAT_SD_4DAT;
535 host->clkrt, host->cmdat);
538 static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable)
540 struct pxamci_host *pxa_host = mmc_priv(host);
557 struct pxamci_host *host = devid;
562 writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
565 mmc_hostname(host->mmc), dma, dcsr);
566 host->data->error = -EIO;
567 pxamci_data_done(host, 0);
573 struct pxamci_host *host = mmc_priv(devid);
575 mmc_detect_change(devid, msecs_to_jiffies(host->pdata->detect_delay_ms));
626 struct pxamci_host *host = NULL;
672 host = mmc_priv(mmc);
673 host->mmc = mmc;
674 host->dma = -1;
675 host->pdata = pdev->dev.platform_data;
676 host->clkrt = CLKRT_OFF;
678 host->clk = clk_get(&pdev->dev, NULL);
679 if (IS_ERR(host->clk)) {
680 ret = PTR_ERR(host->clk);
681 host->clk = NULL;
685 host->clkrate = clk_get_rate(host->clk);
690 mmc->f_min = (host->clkrate + 63) / 64;
691 mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate;
693 pxamci_init_ocr(host);
696 host->cmdat = 0;
699 host->cmdat |= CMDAT_SDIO_INT_EN;
705 host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
706 if (!host->sg_cpu) {
711 spin_lock_init(&host->lock);
712 host->res = r;
713 host->irq = irq;
714 host->imask = MMC_I_MASK_ALL;
716 host->base = ioremap(r->start, SZ_4K);
717 if (!host->base) {
723 * Ensure that the host controller is shut down, and setup
726 pxamci_stop_clock(host);
727 writel(0, host->base + MMC_SPI);
728 writel(64, host->base + MMC_RESTO);
729 writel(host->imask, host->base + MMC_I_MASK);
731 host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
732 pxamci_dma_irq, host);
733 if (host->dma < 0) {
738 ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
749 host->dma_drcmrrx = dmarx->start;
756 host->dma_drcmrtx = dmatx->start;
758 if (host->pdata) {
759 gpio_cd = host->pdata->gpio_card_detect;
760 gpio_ro = host->pdata->gpio_card_ro;
761 gpio_power = host->pdata->gpio_power;
770 host->pdata->gpio_power_invert);
797 if (host->pdata && host->pdata->init)
798 host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
800 if (gpio_is_valid(gpio_power) && host->pdata->setpower)
802 if (gpio_is_valid(gpio_ro) && host->pdata->get_ro)
816 if (host) {
817 if (host->dma >= 0)
818 pxa_free_dma(host->dma);
819 if (host->base)
820 iounmap(host->base);
821 if (host->sg_cpu)
822 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
823 if (host->clk)
824 clk_put(host->clk);
838 struct pxamci_host *host = mmc_priv(mmc);
842 if (host->pdata) {
843 gpio_cd = host->pdata->gpio_card_detect;
844 gpio_ro = host->pdata->gpio_card_ro;
845 gpio_power = host->pdata->gpio_power;
855 if (host->vcc)
856 regulator_put(host->vcc);
858 if (host->pdata && host->pdata->exit)
859 host->pdata->exit(&pdev->dev, mmc);
861 pxamci_stop_clock(host);
864 host->base + MMC_I_MASK);
866 DRCMR(host->dma_drcmrrx) = 0;
867 DRCMR(host->dma_drcmrtx) = 0;
869 free_irq(host->irq, host);
870 pxa_free_dma(host->dma);
871 iounmap(host->base);
872 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
874 clk_put(host->clk);
876 release_resource(host->res);