Lines Matching refs:host
18 #include <linux/mmc/host.h>
135 #define dbg(host, channels, args...) \
138 dev_err(&host->pdev->dev, args); \
140 dev_info(&host->pdev->dev, args); \
142 dev_dbg(&host->pdev->dev, args); \
145 static void finalize_request(struct s3cmci_host *host);
147 static void s3cmci_reset(struct s3cmci_host *host);
151 static void dbg_dumpregs(struct s3cmci_host *host, char *prefix)
156 con = readl(host->base + S3C2410_SDICON);
157 pre = readl(host->base + S3C2410_SDIPRE);
158 cmdarg = readl(host->base + S3C2410_SDICMDARG);
159 cmdcon = readl(host->base + S3C2410_SDICMDCON);
160 cmdsta = readl(host->base + S3C2410_SDICMDSTAT);
161 r0 = readl(host->base + S3C2410_SDIRSP0);
162 r1 = readl(host->base + S3C2410_SDIRSP1);
163 r2 = readl(host->base + S3C2410_SDIRSP2);
164 r3 = readl(host->base + S3C2410_SDIRSP3);
165 timer = readl(host->base + S3C2410_SDITIMER);
166 bsize = readl(host->base + S3C2410_SDIBSIZE);
167 datcon = readl(host->base + S3C2410_SDIDCON);
168 datcnt = readl(host->base + S3C2410_SDIDCNT);
169 datsta = readl(host->base + S3C2410_SDIDSTA);
170 fsta = readl(host->base + S3C2410_SDIFSTA);
171 imask = readl(host->base + host->sdiimsk);
173 dbg(host, dbg_debug, "%s CON:[%08x] PRE:[%08x] TMR:[%08x]\n",
176 dbg(host, dbg_debug, "%s CCON:[%08x] CARG:[%08x] CSTA:[%08x]\n",
179 dbg(host, dbg_debug, "%s DCON:[%08x] FSTA:[%08x]"
183 dbg(host, dbg_debug, "%s R0:[%08x] R1:[%08x]"
188 static void prepare_dbgmsg(struct s3cmci_host *host, struct mmc_command *cmd,
191 snprintf(host->dbgmsg_cmd, 300,
193 host->ccnt, (stop ? " (STOP)" : ""),
197 snprintf(host->dbgmsg_dat, 300,
199 host->dcnt, cmd->data->blksz,
203 host->dbgmsg_dat[0] = '\0';
207 static void dbg_dumpcmd(struct s3cmci_host *host, struct mmc_command *cmd,
216 dbg(host, dbglvl, "CMD[OK] %s R0:0x%08x\n",
217 host->dbgmsg_cmd, cmd->resp[0]);
219 dbg(host, dbglvl, "CMD[ERR %i] %s Status:%s\n",
220 cmd->error, host->dbgmsg_cmd, host->status);
227 dbg(host, dbglvl, "DAT[OK] %s\n", host->dbgmsg_dat);
229 dbg(host, dbglvl, "DAT[ERR %i] %s DCNT:0x%08x\n",
230 cmd->data->error, host->dbgmsg_dat,
231 readl(host->base + S3C2410_SDIDCNT));
235 static void dbg_dumpcmd(struct s3cmci_host *host,
238 static void prepare_dbgmsg(struct s3cmci_host *host, struct mmc_command *cmd,
241 static void dbg_dumpregs(struct s3cmci_host *host, char *prefix) { }
246 * s3cmci_host_usedma - return whether the host is using dma or pio
247 * @host: The host state
249 * Return true if the host is using DMA to transfer data, else false
253 static inline bool s3cmci_host_usedma(struct s3cmci_host *host)
262 static inline u32 enable_imask(struct s3cmci_host *host, u32 imask)
266 newmask = readl(host->base + host->sdiimsk);
269 writel(newmask, host->base + host->sdiimsk);
274 static inline u32 disable_imask(struct s3cmci_host *host, u32 imask)
278 newmask = readl(host->base + host->sdiimsk);
281 writel(newmask, host->base + host->sdiimsk);
286 static inline void clear_imask(struct s3cmci_host *host)
288 u32 mask = readl(host->base + host->sdiimsk);
292 writel(mask, host->base + host->sdiimsk);
297 * @host: The host to check.
307 static void s3cmci_check_sdio_irq(struct s3cmci_host *host)
309 if (host->sdio_irqen) {
312 mmc_signal_sdio_irq(host->mmc);
317 static inline int get_data_buffer(struct s3cmci_host *host,
322 if (host->pio_active == XFER_NONE)
325 if ((!host->mrq) || (!host->mrq->data))
328 if (host->pio_sgptr >= host->mrq->data->sg_len) {
329 dbg(host, dbg_debug, "no more buffers (%i/%i)\n",
330 host->pio_sgptr, host->mrq->data->sg_len);
333 sg = &host->mrq->data->sg[host->pio_sgptr];
338 host->pio_sgptr++;
340 dbg(host, dbg_sg, "new buffer (%i/%i)\n",
341 host->pio_sgptr, host->mrq->data->sg_len);
346 static inline u32 fifo_count(struct s3cmci_host *host)
348 u32 fifostat = readl(host->base + S3C2410_SDIFSTA);
354 static inline u32 fifo_free(struct s3cmci_host *host)
356 u32 fifostat = readl(host->base + S3C2410_SDIFSTA);
364 * @host: The device state.
375 static void s3cmci_enable_irq(struct s3cmci_host *host, bool more)
382 host->irq_enabled = more;
383 host->irq_disabled = false;
385 enable = more | host->sdio_irqen;
387 if (host->irq_state != enable) {
388 host->irq_state = enable;
391 enable_irq(host->irq);
393 disable_irq(host->irq);
402 static void s3cmci_disable_irq(struct s3cmci_host *host, bool transfer)
410 host->irq_disabled = transfer;
412 if (transfer && host->irq_state) {
413 host->irq_state = false;
414 disable_irq(host->irq);
420 static void do_pio_read(struct s3cmci_host *host)
428 /* write real prescaler to host, it might be set slow to fix */
429 writel(host->prescaler, host->base + S3C2410_SDIPRE);
431 from_ptr = host->base + host->sdidata;
433 while ((fifo = fifo_count(host))) {
434 if (!host->pio_bytes) {
435 res = get_data_buffer(host, &host->pio_bytes,
436 &host->pio_ptr);
438 host->pio_active = XFER_NONE;
439 host->complete_what = COMPLETION_FINALIZE;
441 dbg(host, dbg_pio, "pio_read(): "
446 dbg(host, dbg_pio,
448 host->pio_bytes, host->pio_ptr);
451 dbg(host, dbg_pio,
453 fifo, host->pio_bytes,
454 readl(host->base + S3C2410_SDIDCNT));
461 if (fifo >= host->pio_bytes)
462 fifo = host->pio_bytes;
466 host->pio_bytes -= fifo;
467 host->pio_count += fifo;
470 ptr = host->pio_ptr;
473 host->pio_ptr = ptr;
478 u8 *p = (u8 *)host->pio_ptr;
487 if (!host->pio_bytes) {
488 res = get_data_buffer(host, &host->pio_bytes, &host->pio_ptr);
490 dbg(host, dbg_pio,
492 host->pio_active = XFER_NONE;
493 host->complete_what = COMPLETION_FINALIZE;
499 enable_imask(host,
503 static void do_pio_write(struct s3cmci_host *host)
510 to_ptr = host->base + host->sdidata;
512 while ((fifo = fifo_free(host)) > 3) {
513 if (!host->pio_bytes) {
514 res = get_data_buffer(host, &host->pio_bytes,
515 &host->pio_ptr);
517 dbg(host, dbg_pio,
519 host->pio_active = XFER_NONE;
524 dbg(host, dbg_pio,
526 host->pio_bytes, host->pio_ptr);
534 if (fifo >= host->pio_bytes)
535 fifo = host->pio_bytes;
539 host->pio_bytes -= fifo;
540 host->pio_count += fifo;
543 ptr = host->pio_ptr;
546 host->pio_ptr = ptr;
549 enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
554 struct s3cmci_host *host = (struct s3cmci_host *) data;
556 s3cmci_disable_irq(host, true);
558 if (host->pio_active == XFER_WRITE)
559 do_pio_write(host);
561 if (host->pio_active == XFER_READ)
562 do_pio_read(host);
564 if (host->complete_what == COMPLETION_FINALIZE) {
565 clear_imask(host);
566 if (host->pio_active != XFER_NONE) {
567 dbg(host, dbg_err, "unfinished %s "
569 (host->pio_active == XFER_READ) ? "read" : "write",
570 host->pio_count, host->pio_bytes);
572 if (host->mrq->data)
573 host->mrq->data->error = -EINVAL;
576 s3cmci_enable_irq(host, false);
577 finalize_request(host);
579 s3cmci_enable_irq(host, true);
585 * host->mrq points to current request
586 * host->complete_what Indicates when the request is considered done
591 * host->complete_request is the completion-object the driver waits for
593 * 1) Driver sets up host->mrq and host->complete_what
597 * 5) Driver waits for host->complete_rquest
599 * 6) ISR sets host->mrq->cmd->error and host->mrq->data->error
600 * 7) ISR completes host->complete_request
611 struct s3cmci_host *host = dev_id;
617 mci_dsta = readl(host->base + S3C2410_SDIDSTA);
618 mci_imsk = readl(host->base + host->sdiimsk);
623 writel(mci_dclear, host->base + S3C2410_SDIDSTA);
625 mmc_signal_sdio_irq(host->mmc);
630 spin_lock_irqsave(&host->complete_lock, iflags);
632 mci_csta = readl(host->base + S3C2410_SDICMDSTAT);
633 mci_dcnt = readl(host->base + S3C2410_SDIDCNT);
634 mci_fsta = readl(host->base + S3C2410_SDIFSTA);
637 if ((host->complete_what == COMPLETION_NONE) ||
638 (host->complete_what == COMPLETION_FINALIZE)) {
639 host->status = "nothing to complete";
640 clear_imask(host);
644 if (!host->mrq) {
645 host->status = "no active mrq";
646 clear_imask(host);
650 cmd = host->cmd_is_stop ? host->mrq->stop : host->mrq->cmd;
653 host->status = "no active cmd";
654 clear_imask(host);
658 if (!s3cmci_host_usedma(host)) {
659 if ((host->pio_active == XFER_WRITE) &&
662 disable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
663 tasklet_schedule(&host->pio_tasklet);
664 host->status = "pio tx";
667 if ((host->pio_active == XFER_READ) &&
670 disable_imask(host,
674 tasklet_schedule(&host->pio_tasklet);
675 host->status = "pio rx";
680 dbg(host, dbg_err, "CMDSTAT: error CMDTIMEOUT\n");
682 host->status = "error: command timeout";
687 if (host->complete_what == COMPLETION_CMDSENT) {
688 host->status = "ok: command sent";
697 if (host->mrq->cmd->flags & MMC_RSP_136) {
698 dbg(host, dbg_irq,
706 * host->status = "error: bad command crc";
716 if (host->complete_what == COMPLETION_RSPFIN) {
717 host->status = "ok: command response received";
721 if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
722 host->complete_what = COMPLETION_XFERFINISH;
734 if (host->is2440) {
736 dbg(host, dbg_err, "FIFO failure\n");
737 host->mrq->data->error = -EILSEQ;
738 host->status = "error: 2440 fifo failure";
743 dbg(host, dbg_err, "FIFO failure\n");
745 host->status = "error: fifo failure";
751 dbg(host, dbg_err, "bad data crc (outgoing)\n");
753 host->status = "error: bad data crc (outgoing)";
758 dbg(host, dbg_err, "bad data crc (incoming)\n");
760 host->status = "error: bad data crc (incoming)";
765 dbg(host, dbg_err, "data timeout\n");
767 host->status = "error: data timeout";
772 if (host->complete_what == COMPLETION_XFERFINISH) {
773 host->status = "ok: data transfer completed";
777 if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
778 host->complete_what = COMPLETION_RSPFIN;
784 writel(mci_cclear, host->base + S3C2410_SDICMDSTAT);
785 writel(mci_dclear, host->base + S3C2410_SDIDSTA);
790 host->pio_active = XFER_NONE;
793 host->complete_what = COMPLETION_FINALIZE;
795 clear_imask(host);
796 tasklet_schedule(&host->pio_tasklet);
801 dbg(host, dbg_irq,
803 mci_csta, mci_dsta, mci_fsta, mci_dcnt, host->status);
805 spin_unlock_irqrestore(&host->complete_lock, iflags);
816 struct s3cmci_host *host = (struct s3cmci_host *)dev_id;
818 dbg(host, dbg_irq, "card detect\n");
820 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
827 struct s3cmci_host *host = arg;
830 BUG_ON(!host->mrq);
831 BUG_ON(!host->mrq->data);
833 spin_lock_irqsave(&host->complete_lock, iflags);
835 dbg(host, dbg_dma, "DMA FINISHED\n");
837 host->dma_complete = 1;
838 host->complete_what = COMPLETION_FINALIZE;
840 tasklet_schedule(&host->pio_tasklet);
841 spin_unlock_irqrestore(&host->complete_lock, iflags);
845 static void finalize_request(struct s3cmci_host *host)
847 struct mmc_request *mrq = host->mrq;
851 if (host->complete_what != COMPLETION_FINALIZE)
856 cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd;
860 if (s3cmci_host_usedma(host) && (!host->dma_complete)) {
861 dbg(host, dbg_dma, "DMA Missing (%d)!\n",
862 host->dma_complete);
868 cmd->resp[0] = readl(host->base + S3C2410_SDIRSP0);
869 cmd->resp[1] = readl(host->base + S3C2410_SDIRSP1);
870 cmd->resp[2] = readl(host->base + S3C2410_SDIRSP2);
871 cmd->resp[3] = readl(host->base + S3C2410_SDIRSP3);
873 writel(host->prescaler, host->base + S3C2410_SDIPRE);
881 dbg_dumpcmd(host, cmd, debug_as_failure);
884 writel(0, host->base + S3C2410_SDICMDARG);
885 writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
886 writel(0, host->base + S3C2410_SDICMDCON);
887 clear_imask(host);
892 if (cmd->data && cmd->data->stop && (!host->cmd_is_stop)) {
893 host->cmd_is_stop = 1;
894 s3cmci_send_request(host->mmc);
913 if (s3cmci_host_usedma(host))
914 dmaengine_terminate_all(host->dma);
916 if (host->is2440) {
920 host->base + S3C2410_SDIFSTA);
925 mci_con = readl(host->base + S3C2410_SDICON);
928 writel(mci_con, host->base + S3C2410_SDICON);
933 host->complete_what = COMPLETION_NONE;
934 host->mrq = NULL;
936 s3cmci_check_sdio_irq(host);
937 mmc_request_done(host->mmc, mrq);
940 static void s3cmci_send_command(struct s3cmci_host *host,
949 enable_imask(host, imsk);
952 host->complete_what = COMPLETION_XFERFINISH_RSPFIN;
954 host->complete_what = COMPLETION_RSPFIN;
956 host->complete_what = COMPLETION_CMDSENT;
958 writel(cmd->arg, host->base + S3C2410_SDICMDARG);
969 writel(ccon, host->base + S3C2410_SDICMDCON);
972 static int s3cmci_setup_data(struct s3cmci_host *host, struct mmc_data *data)
979 writel(0, host->base + S3C2410_SDIDCON);
994 while (readl(host->base + S3C2410_SDIDSTA) &
997 dbg(host, dbg_err,
1000 writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
1001 s3cmci_reset(host);
1004 dbg_dumpregs(host, "DRF");
1011 if (s3cmci_host_usedma(host))
1014 if (host->bus_width == MMC_BUS_WIDTH_4)
1030 if (host->is2440) {
1035 writel(dcon, host->base + S3C2410_SDIDCON);
1039 writel(data->blksz, host->base + S3C2410_SDIBSIZE);
1045 enable_imask(host, imsk);
1049 if (host->is2440) {
1050 writel(0x007FFFFF, host->base + S3C2410_SDITIMER);
1052 writel(0x0000FFFF, host->base + S3C2410_SDITIMER);
1056 writel(0xFF, host->base + S3C2410_SDIPRE);
1064 static int s3cmci_prepare_pio(struct s3cmci_host *host, struct mmc_data *data)
1070 host->pio_sgptr = 0;
1071 host->pio_bytes = 0;
1072 host->pio_count = 0;
1073 host->pio_active = rw ? XFER_WRITE : XFER_READ;
1076 do_pio_write(host);
1077 enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
1079 enable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF
1086 static int s3cmci_prepare_dma(struct s3cmci_host *host, struct mmc_data *data)
1091 .src_addr = host->mem->start + host->sdidata,
1092 .dst_addr = host->mem->start + host->sdidata,
1100 writel(host->prescaler, host->base + S3C2410_SDIPRE);
1107 dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
1110 dmaengine_slave_config(host->dma, &conf);
1111 desc = dmaengine_prep_slave_sg(host->dma, data->sg, data->sg_len,
1117 desc->callback_param = host;
1119 dma_async_issue_pending(host->dma);
1124 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
1131 struct s3cmci_host *host = mmc_priv(mmc);
1132 struct mmc_request *mrq = host->mrq;
1133 struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd;
1135 host->ccnt++;
1136 prepare_dbgmsg(host, cmd, host->cmd_is_stop);
1141 writel(0xFFFFFFFF, host->base + S3C2410_SDICMDSTAT);
1142 writel(0xFFFFFFFF, host->base + S3C2410_SDIDSTA);
1143 writel(0xFFFFFFFF, host->base + S3C2410_SDIFSTA);
1146 int res = s3cmci_setup_data(host, cmd->data);
1148 host->dcnt++;
1151 dbg(host, dbg_err, "setup data error %d\n", res);
1159 if (s3cmci_host_usedma(host))
1160 res = s3cmci_prepare_dma(host, cmd->data);
1162 res = s3cmci_prepare_pio(host, cmd->data);
1165 dbg(host, dbg_err, "data prepare error %d\n", res);
1175 s3cmci_send_command(host, cmd);
1178 s3cmci_enable_irq(host, true);
1183 struct s3cmci_host *host = mmc_priv(mmc);
1184 struct s3c24xx_mci_pdata *pdata = host->pdata;
1196 struct s3cmci_host *host = mmc_priv(mmc);
1198 host->status = "mmc request";
1199 host->cmd_is_stop = 0;
1200 host->mrq = mrq;
1203 dbg(host, dbg_err, "%s: no medium present\n", __func__);
1204 host->mrq->cmd->error = -ENOMEDIUM;
1210 static void s3cmci_set_clk(struct s3cmci_host *host, struct mmc_ios *ios)
1216 host->real_rate = host->clk_rate / (host->clk_div*(mci_psc+1));
1218 if (host->real_rate <= ios->clock)
1225 host->prescaler = mci_psc;
1226 writel(host->prescaler, host->base + S3C2410_SDIPRE);
1230 host->real_rate = 0;
1235 struct s3cmci_host *host = mmc_priv(mmc);
1240 mci_con = readl(host->base + S3C2410_SDICON);
1249 if (host->pdata->set_power)
1250 host->pdata->set_power(ios->power_mode, ios->vdd);
1252 if (!host->is2440)
1261 if (host->is2440)
1264 if (host->pdata->set_power)
1265 host->pdata->set_power(ios->power_mode, ios->vdd);
1270 s3cmci_set_clk(host, ios);
1278 writel(mci_con, host->base + S3C2410_SDICON);
1282 dbg(host, dbg_conf, "running at %lukHz (requested: %ukHz).\n",
1283 host->real_rate/1000, ios->clock/1000);
1285 dbg(host, dbg_conf, "powered down.\n");
1288 host->bus_width = ios->bus_width;
1291 static void s3cmci_reset(struct s3cmci_host *host)
1293 u32 con = readl(host->base + S3C2410_SDICON);
1296 writel(con, host->base + S3C2410_SDICON);
1301 struct s3cmci_host *host = mmc_priv(mmc);
1302 struct s3c24xx_mci_pdata *pdata = host->pdata;
1316 struct s3cmci_host *host = mmc_priv(mmc);
1322 con = readl(host->base + S3C2410_SDICON);
1323 host->sdio_irqen = enable;
1325 if (enable == host->sdio_irqen)
1330 enable_imask(host, S3C2410_SDIIMSK_SDIOIRQ);
1332 if (!host->irq_state && !host->irq_disabled) {
1333 host->irq_state = true;
1334 enable_irq(host->irq);
1337 disable_imask(host, S3C2410_SDIIMSK_SDIOIRQ);
1340 if (!host->irq_enabled && host->irq_state) {
1341 disable_irq_nosync(host->irq);
1342 host->irq_state = false;
1346 writel(con, host->base + S3C2410_SDICON);
1351 s3cmci_check_sdio_irq(host);
1363 /* This is currently here to avoid a number of if (host->pdata)
1374 struct s3cmci_host *host;
1379 host = container_of(nb, struct s3cmci_host, freq_transition);
1380 newclk = clk_get_rate(host->clk);
1381 mmc = host->mmc;
1383 if ((val == CPUFREQ_PRECHANGE && newclk > host->clk_rate) ||
1384 (val == CPUFREQ_POSTCHANGE && newclk < host->clk_rate)) {
1387 host->clk_rate = newclk;
1391 s3cmci_set_clk(host, &mmc->ios);
1399 static inline int s3cmci_cpufreq_register(struct s3cmci_host *host)
1401 host->freq_transition.notifier_call = s3cmci_cpufreq_transition;
1403 return cpufreq_register_notifier(&host->freq_transition,
1407 static inline void s3cmci_cpufreq_deregister(struct s3cmci_host *host)
1409 cpufreq_unregister_notifier(&host->freq_transition,
1414 static inline int s3cmci_cpufreq_register(struct s3cmci_host *host)
1419 static inline void s3cmci_cpufreq_deregister(struct s3cmci_host *host)
1429 struct s3cmci_host *host = seq->private;
1431 seq_printf(seq, "Register base = 0x%08x\n", (u32)host->base);
1432 seq_printf(seq, "Clock rate = %ld\n", host->clk_rate);
1433 seq_printf(seq, "Prescale = %d\n", host->prescaler);
1434 seq_printf(seq, "is2440 = %d\n", host->is2440);
1435 seq_printf(seq, "IRQ = %d\n", host->irq);
1436 seq_printf(seq, "IRQ enabled = %d\n", host->irq_enabled);
1437 seq_printf(seq, "IRQ disabled = %d\n", host->irq_disabled);
1438 seq_printf(seq, "IRQ state = %d\n", host->irq_state);
1439 seq_printf(seq, "CD IRQ = %d\n", host->irq_cd);
1440 seq_printf(seq, "Do DMA = %d\n", s3cmci_host_usedma(host));
1441 seq_printf(seq, "SDIIMSK at %d\n", host->sdiimsk);
1442 seq_printf(seq, "SDIDATA at %d\n", host->sdidata);
1486 struct s3cmci_host *host = seq->private;
1491 readl(host->base + rptr->addr));
1493 seq_printf(seq, "SDIIMSK\t=0x%08x\n", readl(host->base + host->sdiimsk));
1511 static void s3cmci_debugfs_attach(struct s3cmci_host *host)
1513 struct device *dev = &host->pdev->dev;
1515 host->debug_root = debugfs_create_dir(dev_name(dev), NULL);
1516 if (IS_ERR(host->debug_root)) {
1521 host->debug_state = debugfs_create_file("state", 0444,
1522 host->debug_root, host,
1525 if (IS_ERR(host->debug_state))
1528 host->debug_regs = debugfs_create_file("regs", 0444,
1529 host->debug_root, host,
1532 if (IS_ERR(host->debug_regs))
1536 static void s3cmci_debugfs_remove(struct s3cmci_host *host)
1538 debugfs_remove(host->debug_regs);
1539 debugfs_remove(host->debug_state);
1540 debugfs_remove(host->debug_root);
1544 static inline void s3cmci_debugfs_attach(struct s3cmci_host *host) { }
1545 static inline void s3cmci_debugfs_remove(struct s3cmci_host *host) { }
1551 struct s3cmci_host *host;
1577 host = mmc_priv(mmc);
1578 host->mmc = mmc;
1579 host->pdev = pdev;
1580 host->is2440 = is2440;
1582 host->pdata = pdev->dev.platform_data;
1583 if (!host->pdata) {
1585 host->pdata = &s3cmci_def_pdata;
1588 spin_lock_init(&host->complete_lock);
1589 tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host);
1592 host->sdiimsk = S3C2440_SDIIMSK;
1593 host->sdidata = S3C2440_SDIDATA;
1594 host->clk_div = 1;
1596 host->sdiimsk = S3C2410_SDIIMSK;
1597 host->sdidata = S3C2410_SDIDATA;
1598 host->clk_div = 2;
1601 host->complete_what = COMPLETION_NONE;
1602 host->pio_active = XFER_NONE;
1604 host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1605 if (!host->mem) {
1613 host->mem = request_mem_region(host->mem->start,
1614 resource_size(host->mem), pdev->name);
1616 if (!host->mem) {
1622 host->base = ioremap(host->mem->start, resource_size(host->mem));
1623 if (!host->base) {
1629 host->irq = platform_get_irq(pdev, 0);
1630 if (host->irq == 0) {
1636 if (request_irq(host->irq, s3cmci_irq, 0, DRIVER_NAME, host)) {
1646 disable_irq(host->irq);
1647 host->irq_state = false;
1649 if (!host->pdata->no_detect) {
1650 ret = gpio_request(host->pdata->gpio_detect, "s3cmci detect");
1656 host->irq_cd = gpio_to_irq(host->pdata->gpio_detect);
1658 if (host->irq_cd >= 0) {
1659 if (request_irq(host->irq_cd, s3cmci_irq_cd,
1662 DRIVER_NAME, host)) {
1670 "host detect has no irq available\n");
1671 gpio_direction_input(host->pdata->gpio_detect);
1674 host->irq_cd = -1;
1676 if (!host->pdata->no_wprotect) {
1677 ret = gpio_request(host->pdata->gpio_wprotect, "s3cmci wp");
1683 gpio_direction_input(host->pdata->gpio_wprotect);
1688 if (s3cmci_host_usedma(host)) {
1694 host->dma = dma_request_slave_channel_compat(mask,
1696 if (!host->dma) {
1703 host->clk = clk_get(&pdev->dev, "sdi");
1704 if (IS_ERR(host->clk)) {
1706 ret = PTR_ERR(host->clk);
1707 host->clk = NULL;
1711 ret = clk_prepare_enable(host->clk);
1717 host->clk_rate = clk_get_rate(host->clk);
1726 mmc->f_min = host->clk_rate / (host->clk_div * 256);
1727 mmc->f_max = host->clk_rate / host->clk_div;
1729 if (host->pdata->ocr_avail)
1730 mmc->ocr_avail = host->pdata->ocr_avail;
1739 dbg(host, dbg_debug,
1741 (host->is2440?"2440":""),
1742 host->base, host->irq, host->irq_cd, host->dma);
1744 ret = s3cmci_cpufreq_register(host);
1752 dev_err(&pdev->dev, "failed to add mmc host.\n");
1756 s3cmci_debugfs_attach(host);
1760 s3cmci_host_usedma(host) ? "dma" : "pio",
1766 s3cmci_cpufreq_deregister(host);
1769 clk_disable_unprepare(host->clk);
1772 clk_put(host->clk);
1775 if (s3cmci_host_usedma(host))
1776 dma_release_channel(host->dma);
1779 if (!host->pdata->no_wprotect)
1780 gpio_free(host->pdata->gpio_wprotect);
1783 if (!host->pdata->no_detect)
1784 gpio_free(host->pdata->gpio_detect);
1787 if (host->irq_cd >= 0)
1788 free_irq(host->irq_cd, host);
1791 free_irq(host->irq, host);
1794 iounmap(host->base);
1797 release_mem_region(host->mem->start, resource_size(host->mem));
1813 struct s3cmci_host *host = mmc_priv(mmc);
1815 if (host->irq_cd >= 0)
1816 free_irq(host->irq_cd, host);
1818 s3cmci_debugfs_remove(host);
1819 s3cmci_cpufreq_deregister(host);
1821 clk_disable_unprepare(host->clk);
1827 struct s3cmci_host *host = mmc_priv(mmc);
1828 struct s3c24xx_mci_pdata *pd = host->pdata;
1833 clk_put(host->clk);
1835 tasklet_disable(&host->pio_tasklet);
1837 if (s3cmci_host_usedma(host))
1838 dma_release_channel(host->dma);
1840 free_irq(host->irq, host);
1852 iounmap(host->base);
1853 release_mem_region(host->mem->start, resource_size(host->mem));